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Digital Alpha VME 4/224 and
1
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First Printing, July 1996
2
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Operating the Digital Alpha VME 4 Computer
4
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System Address Mapping
5
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Module Display Control Register
8
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Purpose of this Manual
21
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Names and Symbols
25
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For More Information
28
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1.1 Product Description
29
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Figure 1–1 Digital Alpha VME 4 Block Diagram
31
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1.3 Physical and Environmental Requirements
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Figure 2–1 Digital Alpha VME 4 Module Components
36
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Table 2–1 Digital Alpha VME 4 Hardware Kit Items
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Table 2–2 Digital Alpha VME 4 Memory Modules
38
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Table 2–4 Additional Hardware Installation Items
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Figure 2–2 Digital Alpha VME 4 Module Layout
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Figure 2–3 I/O Module Layout
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Figure 2–4 Installing the Main Memory Modules
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Table 2–8 Digital Alpha VME 4 Memory Configurations
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Figure 2–5 Cache Memory Modules
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Table 2–10 J10 Cache Jumper Settings
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Figure 2–7 Alpha VME 4 Primary Breakout Module
50
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Figure 2–10 Installing the Primary Breakout Module
53
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Figure 2–11 Secondary Breakout Module Jumpers
54
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2.2.1 Installing the PMC I/O Companion Card
57
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Figure 2–15 Connecting the PMC I/O Companion Card
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Figure 2–16 Installing the PMC I/O Companion Card
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Table 2–11 SROM Test Numbers and Descriptions
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Table 2–12 Console Code Test Letters and Names
63
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Table 2–13 Troubleshooting
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2.5 Repair and Warranty Information
66
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2.5.2.2 Return-to-Digital Process
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2.5.4 Field Replaceable Units and Order Numbers
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Operating the Digital Alpha VME 4
71
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Figure 3–1 Controls and Indicators
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3.2 Console Mode
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Table 3–2 (Cont.) Environment Variable Summary
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Table 4–1 Console Diagnostic Tests
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Table 4–1 (Cont.) Console Diagnostic Tests
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POST Non-Volatile RAM Diagnostic
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POST Memory Diagnostic
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4.3.4 Console Diagnostic Test Descriptions
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Heartbeat Timer Test
87
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Interval Timer Tests
88
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DECchip 21040 Ethernet Controller Tests
94
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DALLAS DS1386 RAMified Watchdog Timekeeper Tests
96
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Local Area Network Address ROM Test
100
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NCR 53C810 PCI-SCSI I/O Processor Tests
102
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Watchdog Timer Interrupt Test
105
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VME Interface Tests
106
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4.4 Initialization Sequence
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Figure 4–4 Console POST Flows
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Figure 4–5 Console POST Flows
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Figure 5–1 System Bus Address Map
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Table 5–1 System Bus Address Space Description
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5.1.4 DECchip 21071-DA CSR Space (0x1A0000000 to
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Figure 5–3 PCI Memory Space Address Translation
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Table 5–6 PCI Target Window Enables
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Figure 5–4 PCI Target Window Compare Scheme
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Table 5–8 Scatter-Gather Map Address
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Cache and Memory Subsystem
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Figure 6–3 21071-CA Block Diagram
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6.1 System Bus Interface
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6.2 Bcache Control
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6.3.1 Memory Organization
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6.3.2 Memory Address Generation
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6.3.7 Presence Detect Logic
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6.6 Description of CSRs
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Table 6–2 General Control Register
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Table 6–2 (Cont.) General Control Register
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6.6.3 Tag Enable Register
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Table 6–4 Cache Size Tag Enable Values
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Table 6–5 Maximum Memory Tag Enable Values
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Figure 6–9 Error Low Address Register: 0x180000080
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Table 6–6 Configuration Register for Banks 0 and 1
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Table 6–7 (Cont.) Timing Register A
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Table 6–8 Timing Register B
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Figure 6–19 Global Timing Register: 0x180000200
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Table 6–10 (Cont.) Refresh Timing Register
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6.7.1 Memory Read Buffer
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6.7.5 Memory Write Buffer
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PCI Host Bridge
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Figure 7–2 DECchip 21071-DA Block Diagram
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7.1.2 Buffering System Bus Transactions
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7.2.3 Burst Length and Prefetching for PCI bus
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7.3.3 Data Coherency
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7.3.7 Retry Timeout
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Table 7–1 (Cont.) DECchip 21071-DA CSR Addresses
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Figure 7–4 PCI Error Address Register: 0x1A0000020
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Table 7–4 System Bus Error Address Register
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Table 7–5 Translated Base Registers 1 and 2
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Table 7–6 (Cont.) PCI Base Registers 1 and 2
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Table 7–7 PCI Mask Registers 1 and 2
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Table 7–8 Host Address Extension Register 1
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7.5.11 PCI Master Latency Timer Register
184
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Table 7–12 TLB Data Registers 0 Through 7
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8.1 Ethernet Controller
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Figure 8–2 PCI Configuration Registers
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Table 8–1 Ethernet Controller CSRs
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8.1.4 Ethernet Address
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8.2.2 SCSI ID
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Figure 8–4 PCI Configuration Block
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Table 8–2 SCSI Controller CSRs
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Table 8–2 (Cont.) SCSI Controller CSRs
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8.3 PCI I/O Companion Card
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Figure 9–2 SIO Configuration Block
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9.1.1.2 ISA Controller Recovery Timer Register
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Module display control
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Figure 9–3 Module Display Control Register
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Table 9–2 (Cont.) Module Configuration Register
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Figure 9–7 Memory Identification Register
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Table 9–4 Presence Detect
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Table 9–5 ID Bits
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Table 9–7 (Cont.) Reset Reason Registers
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Figure 9–9 Module Control Register 1
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Table 9–8 (Cont.) Module Control Register
214
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Table 9–9 Bcache Size and Speed Decode
215
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Figure 9–11 Flash ROM Layout/Addressing
216
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9.6.1 TOY Clock Timekeeping Registers
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Enable Oscillator bit.
222
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Table 9–14 (Cont.) TOY Clock Command Register
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Table 9–15 Timer Interface Registers
224
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Table 9–16 Interval Timing Control Register
225
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Figure 9–14 82C54 Timer Data Access
226
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Table 9–18 (Cont.) Timer Interrupt Status Register
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9.9 Nonvolatile RAM
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The VME interface serves the following purposes:
236
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Figure 10–3 Mapping Pages From PCI to VME
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Figure 10–4 Outbound Scatter-Gather Entry
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10.1.1.1 Address Modifier
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10.2.2 Inbound Scatter-Gather Entries
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Table 10–3 (Cont.) VME Address
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10.3.1 Arbitrating the VMEbus
252
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Table 10–7 Arbiter/Requester Configuration Register
253
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Table 10–8 (Cont.) VIC Release Control Register
255
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10.3.3.2 VMEbus Transfer Timers
256
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Figure 10–14 VIC Interrupt Request/Status Register
258
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10.4 Byte Swapping
260
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Figure 10–17 Swap Modes
261
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Figure 10–18 Big Endian VME Byte Lane Formats
262
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Local IPL setting for end of DMA interrupt.
267
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VMEbus request level.
270
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Interleave period. Recommend a value of 0xF.
271
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Table 10–16 (Cont.) VME_IF_BASE +
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10.7 VME Subsystem Restrictions (as of 03-Jun-94)
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11.1 System Interrupts
275
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Figure 11–1 Block Diagram of the Interrupt Logic
276
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Figure 11–4 Interrupt/Mask Register #3
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11.1.2.1 Basic Operation
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Table 11–2 VIC64 Chip Interrupt Ranking
280
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Figure 11–9 VME IRQ* ICRs
282
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Figure 11–11 VIC Error Group ICR
284
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11.1.4.2 NMI Status and Control Register
286
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12.1.3 Shell Operators
291
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Table 12–2 (Cont.) Console Shell Operators
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[ elif command_sequence then command_sequence ]
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VMS PALcode V5.56-4, OSF PALcode X1.45-8
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help examine deposit
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12.4.1 Accessing Memory
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# Examine R0 symbolically,...
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12.5 Using Pipes and grep to Filter Output
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# Check to see if foo exists.
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# Display complete process status.
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ls -l sample
304
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Ctrl/S—Suspends output to the console terminal
310
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13.1.4 Console Command Dictionary
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alloc — allocate a block of memory
312
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boot — bootstrap the system
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of the network
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boot -fi //usr//local//bootfile//alphavme_v1_1-0
321
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break — break from a program loop
322
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cat — copy files
323
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chmod — change file attributes
324
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chmod +x script
325
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chown — change ownership of memory block
326
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clear — delete environment variable
327
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clear_log — clear error log in NVRAM
328
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date — display or change time
329
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deposit — write memory data
331
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d -l -n 10 -s 200 pmem:0 8
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dynamic — show memory
336
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echo — display text output
338
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echo > foo ’this is the simplest way
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eval — evaluate expression
340
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Displays the output as binary values.
341
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examine — display memory data
342
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The data size is octaword.
345
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Look at the next instruction.
347
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exer — exercise devices
348
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Write without lock from buffer1
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exer -eb 64 -bc 4 -a ’?w-Rc’ dka0
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exer -bs 1 -bc a -l a -a ’w’ -d1 ’myd myd ~ =’ foo
355
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exit — exit current shell
357
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false — return failure status
358
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free — deallocate memory
359
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grep — search for regular expressions
360
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deposit -q pmem:fffff0 0
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hd — dump file contents
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00000000 6874 2065 7571 6369 206B 7262 776F 206E
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help— help on commands
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# List all topics and associated text.
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init_ev — initialize environment variables
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kill — delete process
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line — read a line
370
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ls — list files
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memexer — memory exerciser
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memtest — memory test
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The random test:
375
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net — MOP function
380
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ps — show process
383
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pwrup — run power-on diagnostics
384
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rm — remove file
385
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sa — set process affinity
386
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semaphore — show system semaphores
387
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set — set environment variable
388
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set AUTO_ACTION BOOT
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set led — display char on LED
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set reboot srom
392
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set toy sleep
393
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sh — create new shell
394
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# start a new shell
395
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show — display system information
396
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Commonly Used Environment Variables
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show config — display system configuration
398
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show device — displays devices
399
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show device e
400
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show hwrpb — display HWRPB
401
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show led — display LED character
402
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show map — display memory map
403
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show_log — display NVRAM error log information
404
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show_log -n 3
405
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sleep — suspend execution
406
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sort — sort a file
407
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sp — set priority
408
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start — start program
409
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stop — stop CPU or device
410
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update — update flash ROMs on the system
411
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The program will take at most several minutes.
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Module Connector Pinouts
415
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A.2.1 VMEbus (J1) Connector Pinouts
416
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Table A–1 (Cont.) VMEbus (J1) Connector
417
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A.2.3 Ethernet (J9) Connector Pinouts
418
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Table A–5 Keyboard and Mouse (J1) Connector
422
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Table A–6 (Cont.) Parallel Port (J6) Connector
423
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ACFAIL* assertion, 11–8
425
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BOOTED_FILE environment variable,
426
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with -t 1, 4–10
427
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Connector pinouts (cont’d)
428
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DECchip 21040-AA, 8–3
429
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NCR810 internal loopback test, 4–25
430
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D_OPER environment variable, 3–5
431
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General control register, 6–11
432
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Interval timing registers, 9–25
433
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memtest command, 13–65
434
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Operating system, booting, 3–7
435
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PCI mezzanine card adapter, 8–11
436
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dummy registers, 7–15
437
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local interrupt vector base register,
438
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show led command, 13–94
439
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VMEbus arbitration, 10–21
440
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VME interface (cont’d)
441