Infineon Cypress S29GL01GS Manuals

www.infineon.com Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as “Cypress” document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio. Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document. Future revisions will occur when appropriate, and any changes will be set out on the document history page. Continuity of ordering part numbers Infineon continues to support existing part numbers. Please continue to use the ordering part numbers listed in the datasheet for ordering. Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Document Number: 001-98285 Rev. *R Revised June 21, 2018 S29GL01GS/S29GL512S S29GL256S/S29GL128S 1-Gbit (128 Mbyte)/512-Mbit (64 Mbyte)/ 256-Mbit (32 Mbyte)/128-Mbit (16 Mbyte), 3.0 V, GL-S Flash Memory General Description The Cypress® S29GL01G/512/256/128S are MirrorBit® Eclipse flash products fabricated on 65 nm process technology. These devices offer a fast page access time as fast as 15 ns with a corresponding random access time as fast as 90 ns. They feature a Write Buffer that allows a maximum of 256 words/512 bytes to be programmed in one operation, resulting in faster effective programming time than standard programming algorithms. This makes these devices ideal for today’s embedded applications that require higher density, better performance and lower power consumption. Distinctive Characteristics CMOS 3.0 Volt Core with Versatile I/O 65 nm MirrorBit Eclipse Technology Single supply (VCC) for read / program / erase (2.7 V to 3.6 V) Versatile I/O Feature – Wide I/O voltage range (VIO): 1.65 V to VCC ×16 data bus Asynchronous 32-byte Page read 512-byte Programming Buffer – Programming in Page multiples, up to a maximum of 512 bytes Single word and multiple program on same word options Automatic Error Checking and Correction (ECC) – internal hardware ECC with single bit error correction Sector Erase – Uniform 128-kbyte sectors Suspend and Resume commands for Program and Erase operations Status Register, Data Polling, and Ready/Busy pin methods to determine device status Advanced Sector Protection (ASP) – Volatile and non-volatile protection methods for each sector Separate 1024-byte One Time Program (OTP) array with two lockable regions Common Flash Interface (CFI) parameter table Temperature Range / Grade – Industrial (-40 °C to +85 °C) – Industrial Plus(-40 °C to +105 °C) – Automotive, AEC-Q100 Grade 3 (-40 °C to +85 °C) – Automotive, AEC-Q100 Grade 2 (-40 °C to +105 °C) 100,000 Program / Erase Cycles 20 Years Data Retention Packaging Options – 56-pin TSOP – 64-ball LAA Fortified BGA, 13 mm × 11 mm – 64-ball LAE Fortified BGA, 9 mm × 9 mm – 56-ball VBU Fortified BGA, 9 mm × 7 mm Document Number: 001-98285 Rev. *R Page 3 of 108 S29GL01GS/S29GL512S S29GL256S/S29GL128S Performance Summary Maximum Read Access Times Density Voltage Range Random Access Time (tACC) Page Access Time (tPACC) CE# Access Time (tCE) OE# Access Time (tOE) 128 Mb Full VCC = VIO 90 15 90 25 VersatileIO VIO 100 25 100 35 256 Mb Full VCC = VIO 90 15 90 25 VersatileIO VIO 100 25 100 35 512 Mb Full VCC = VIO 100 15 100 25 VersatileIO VIO 110 25 110 35 1 Gb Full VCC = VIO 100 15 100 25 VersatileIO VIO 110 25 110 35 Typical Program and Erase Rates Buffer Programming (512 bytes) 1.5 MB/s Sector Erase (128 kbytes) 477 kB/s Maximum Current Consumption Active Read at 5 MHz, 30 pF 60 mA Program 100 mA Erase 100 mA Standby 100 µA Document Number: 001-98285 Rev. *R Page 3 of 108 S29GL01GS/S29GL512S S29GL256S/S29GL128S Contents General Description ............................................................. 2 Distinctive Characteristics .................................................. 2 Performance Summary ........................................................ 3 1. Product Overview ........................................................ 4 2. Address Space Maps................................................... 6 2.1 Flash Memory Array....................................................... 7 2.2 Device ID and CFI (ID-CFI) ASO................................... 8 2.3 Device ID and Common Flash Interface (ID-CFI) ASO Map — Automotive Only ....................................... 9 2.4 Status Register ASO.................................................... 10 2.5 Data Polling Status ASO.............................................. 10 2.6 Secure Silicon Region ASO......................................... 10 2.7 Sector Protection Control............................................. 11 2.8 ECC Status ASO.......................................................... 11 3. Data Protection .......................................................... 13 3.1 Device Protection Methods.......................................... 13 3.2 Command Protection ................................................... 13 3.3 Secure Silicon Region (OTP)....................................... 13 3.4 Sector Protection Methods........................................... 14 4. Read Operations ........................................................ 19 4.1 Asynchronous Read..................................................... 19 4.2 Page Mode Read......................................................... 19 5. Embedded Operations............................................... 20 5.1 Embedded Algorithm Controller (EAC)........................ 20 5.2 Program and Erase Summary ..................................... 21 5.3 Automatic ECC ............................................................ 22 5.4 Command Set.............................................................. 23 5.5 Status Monitoring......................................................... 34 5.6 Error Types and Clearing Procedures ......................... 40 5.7 Embedded Algorithm Performance Table.................... 43 6. Data Integrity .............................................................. 54 6.1 Erase Endurance ......................................................... 54 6.2 Data Retention............................................................. 54 7. Software Interface Reference ................................... 55 7.1 Command Summary.................................................... 55 7.2 Device ID and Common Flash Interface (ID-CFI) ASO Map ..................................................................... 58 7.3 Device ID and Common Flash Interface (ID-CFI) ASO Map ..................................................................... 63 8. Signal Descriptions ................................................... 64 8.1 Address and Data Configuration.................................. 64 8.2 Input/Output Summary................................................. 64 8.3 Versatile I/O Feature.................................................... 65 8.4 Ready/Busy# (RY/BY#) ............................................... 65 8.5 Hardware Reset........................................................... 65 9. Signal Protocols......................................................... 66 9.1 Interface States............................................................ 66 9.2 Power-Off with Hardware Data Protection................... 66 9.3 Power Conservation Modes......................................... 67 9.4 Read ............................................................................. 67 9.5 Write ............................................................................. 68 10. Electrical Specifications............................................. 69 10.1 Absolute Maximum Ratings .......................................... 69 10.2 Latchup Characteristics ................................................ 69 10.3 Thermal Resistance...................................................... 69 10.4 Operating Ranges......................................................... 69 10.5 DC Characteristics........................................................ 72 10.6 Capacitance Characteristics ......................................... 74 11. Timing Specifications................................................. 75 11.1 Key to Switching Waveforms ........................................ 75 11.2 AC Test Conditions....................................................... 75 11.3 Power-On Reset (POR) and Warm Reset .................... 76 11.4 AC Characteristics ........................................................ 78 12. Physical Interface ....................................................... 90 12.1 56-pin TSOP ................................................................. 90 12.2 64-Ball FBGA................................................................ 92 12.3 56-Ball FBGA................................................................ 95 13. Special Handling Instructions for FBGA Package ...................................................... 96 14. Ordering Information.................................................. 97 15. Other Resources....................................................... 102 15.1 Cypress Flash Memory Roadmap .............................. 102 15.2 Links to Software ........................................................ 102 15.3 Links to Application Notes........................................... 102 16. Revision History........................................................ 103