Acqiris U5309A Operation & User’s Manual

DC to 500 GHz bandwidth, with real-time processing User's Manual

No part of this manual may be reproduced in any form or by any means (including electronic storage and retrieval or translation into a foreign language) without prior agreement and written consent from Acqiris SA as governed by international copyright laws. Version U5300-90016 July 2018 Contact us Acqiris Americas [email protected] Acqiris Europe [email protected] Acqiris Asia-Pacific [email protected] Acqiris Japan [email protected] Worldwide contact for support [email protected] Acqiris SA Chemin des Aulx, 12 1228 Plan-Les-Ouates Switzerland www.acqiris.com 2 U5309A User's Manual

3 Welcome This help document is intended to provide in-depth information and reference material specific to your ADC Card product. For information on getting started with your ADC Card, please refer to the Startup Guide which can be downloaded from www.acqiris.com or which is installed with your software. General information SafetyNotes(page77) CleaningPrecautions(page79) ProductMarkings(page79) Content Introduction 4 U5309A Front Panel Features 6 Channel Input Specifications 7 Data Acquisition 9 Trigger 13 External Clock and Reference 17 Calibration 19 Trigger Output 21 Multi-Purpose Inputs and Outputs 23 Signal Processing Options 25 Programming Information 53

channels, with an analog bandwidth of DC to 500 MHz. Featuring a large DDR3 memory for long acquisition time, the U5309A also includes a Xilinx Virtex-6 FPGA allowing implementation of custom real-time processing algorithms. Benefiting from the very high data transfer rates of the PCIe 2.0 eight-lane interface, and occupying a single slot in a host PC, the U5309A offers high performance in a small footprint, making it an ideal platform for many commercial, industrial and aerospace & defense embedded systems. Typical Applications Pulsed Radar Analytical time-of-flight LASER ranging / Emission monitoring Ultrasonic imaging Key Features Sampling rate up to 2 GS/s 2 channels or 8 channels with 8-bit resolution and DC to 500 MHz analog bandwidth Up to 2 GB of DDR3 on-board memory Controlled by a Xilinx Virtex-6 FPGA with support for custom real-time processing 4 U5309A User's Manual

5 U5309A -CH2 block diagram U5309A -CH8 block diagram Most of the technical specifications concerning your particular ADC card are covered in this manual, however for the complete specifications please refer to the product's datasheet from www.acqiris.com.

U5309A Front Panel Features Front Panel Connectors Connector Type Description TRG IN MMCXfemale Externaltrigger signalinput,50 Ω terminated. Levelrangeis±5 V. IN 1 to IN 2 1 1 to 8 2 SSMC male Analogsignalinput. DC-coupledand50 Ωterminated. Maximuminputvoltage±3.4VDC (or ±5V DC)3. JTAG MicroUSB ProvidesconnectiontotheDPU for usewith theU5340AFPGADevelopmentKit. TRG OUT MMCXfemale Trigger Outsignal. I/O 1, 2, 3 MMCXfemale User configurableInput/Outputsignal. 3.3VCMOSandTTL compatible. CLK IN MMCXfemale Externalclockinput. AC coupledand50Ωterminated, signallevel:+5to+15dBm. Pleaserefer todatasheetfor details. REF IN MMCXfemale Externalreferenceclockinput, AC coupledand50Ωterminated. Itcanaccepta100 MHzsignalfrom-3to+3 dBm. Note: It is recommendedtofirst connect theSSMC endof theinput cableandtightenusing the torquewrench(U1092A-WCK)beforeconnectingtheSMA end, this minimizes strainonthe connector. A 1m SSMC toSMA cableis availableas anaccessory (U1092A-CB3)A 1m SSMC toBNC cableis alsoavailable(U5300A-100). 1For the 2 channels version (U5309A-CH2 option) 2For the 8 channels version (U5309A-CH8 option) 3For cards delivered after April 2015. The driver automatically adjusts offset accordingly. 6 U5309A User's Manual

U5309A User's Manual 7 Channel Input Specifications This section provides information and specifications regarding the input characteristics of the ADC card. Channel Input The U5309A offer several options for the number of channel input. Model Input channel(s) U5309A-CH1 1channelavailable(IN 1) U5309A-CH2 2channelsavailable(IN 1andIN 2) U5309A-CH4 4channelsavailablesimultaneously (1or 2,3or 4,5or 6,and7or 8) U5309A-CH8 8channelsavailablesimultaneously(from1to8) The U5309A has the following front end capabilities: Model Impedance / Coupling Bandwidth (nom- inal) Full Scale Ranges (FSR) Absolute Max- imum DC Voltage Offset Adjustment Range U5309A-F03** DC 50Ω 300MHz 250mV,500mV,1V, 2.5V,and5V ±3.4V (or ±5VDC)* ±0.6FSR U5309A-F05** 500MHz U5309A-F03- LVR*** 300MHz 50mVto1V ±3.4V (or ±5VDC)* ±0.5FSR U5309A-F05- LVR*** 500MHz * For modules delivered after April 2015. The driver automatically adjusts offset accordingly. ** Standard Voltage Range *** LVR: Low Voltage Range - Devices delivered after April 2015. For more information, please contact [email protected] Impedance & Coupling The input channel termination is 50 Ω. The input coupling is DC. Input Protection The input amplifiers are designed to accept signals below the absolute maximum level shown in the table. Mezzanine Front-end The front-end electronics are all mounted on a removable mezzanine card. In the event of accidental damage or as components fatigue over time (e.g. relays in high duty cycle automated testing applications), the

mezzanine card allows for fast and efficient replacement. Bandwidth and Rise Time The bandwidth specification indicates the frequency at which an input signal will be attenuated by 3 dB (approximately 30% loss of amplitude). The bandwidth also has an impact on the minimum rise and fall times that can be passed through the front-end electronics. A pulse with a very sharp edge will be observed to have a minimum rise timeTmin determined by the front-end electronics. In general a pulse with a given 10-90% rise time T10-90real will be observed with a lower value given by: T10-902=T10-90real2+Tmin2 where Tmin(ns)≈0.35/BW(GHz) Vertical Resolution The U5309A ADC Card uses a 8-bit ADC giving 256 levels at each input full scale range. 8 U5309A User's Manual

9 Data Acquisition The sections below summarize the data acquisition characteristics. Sampling Rate The U5309A Acquisition card contains an analog-to-digital conversion (ADC) system that can sample waveforms, in a real time sampling mode, at rates shown in the table below. Model Channel Con- figuration Option Max. Samp- ling Rate Available Channels Resolution Acquisition Modes U5309A CH1/CH2 -SR0 500MS/s CH1:1 CH2:2 8bits Singleor multi- record (upto131'072 records) -SR1 1GS/s -SR2 2GS/s CH4/CH8 -SR1 1GS/s CH4:4 CH8:8 The External Clock can be used to vary the sampling rate of the ADC card, see External ClockandReference(page17). Acquisition Memory Data from the ADC is stored in on-board acquisition memory. The amount of memory in use for acquisition can be programmed and is selectable from 1 point to the full amount of acquisition memory available. Model Option Acquisition memory Max samples/channel U5309A -CH2 -M01 128MB 64MS/ch -M05 512MB 256MS/ch -M20 2GB 1GS/ch U5309A -CH8 -M01 128MB 16MS/ch -M05 512MB 64MS/ch -M20 2GB 256MS/ch U5309A -CH1 -M01 64MB 64MS/ch -M05 256MB 256MS/ch -M20 1GB 1GS/ch U5309A -CH4 -M01 64MB 16MS/ch -M05 256MB 64MS/ch -M20 1GB 256MS/ch

For technical reasons, a certain acquisition memory “overhead” is required for each waveform, reducing the available memory by a small amount. The effective maximum memory available for acquisition depends on several parameters, such as the acquisition mode (single / multi-record), sampling rate, record size, number of records, trigger delay, etc.... This maximum is determined by the driver for each specific configuration. The AQMD3_ATTR_MAX_SAMPLES_PER_ CHANNEL attribute in IVI-C or IAqMD3Acquisition.MaxSamplesPerChannel property in IVI.NET can be used to retrieve the maximum number of samples per channel that can be acquired for a specific configuration. When using the Soft Front Panel, the Max Samples per channel parameter is given on the Acquisition panel. Single and Multi-Record Acquisition Modes ADC cards acquire waveforms in association with triggers. Each waveform is made of a series of measured voltage values (sample points) that are made by the ADC at a uniform clock rate. To maximize sampling rates and utilize memory as efficiently as possible the ADC cards include both single and multi-record modes. For both of these modes the data of all of the active channels is acquired synchronously; all of the ADC's are acquiring data at the same time, to within a small fraction of the maximum sampling rate. The single acquisition mode is the normal operation of most ADC card products. In this mode an acquisition consists of a waveform recorded with a single trigger. The user selects the sampling rate and acquisition memory size and sets the number of records to 1 (default value). For details about the trigger sources, see . The ADC cards also feature a multi-record acquisition mode. This mode allows the capture and storage of consecutive “single” waveforms. Multi-record acquisition mode is useful as it can optimize the ADC card's sampling rate and memory requirements for applications where only portions of the signal being analyzed are important. The mode is extremely useful in almost all impulse-response type applications (RADAR, SONAR, LIDAR, Time-of-Flight, Ultrasonics, Medical and Biomedical Research, etc.). In multi-record acquisition mode the acquisition memory is divided into a pre-selected number of records. Waveforms are stored in successive memory records as they arrive. Each waveform requires its own individual trigger. 10 U5309A User's Manual

11 Multi-record acquisition mode enables successive events, occurring within a very short time, to be captured and stored without loss. A very fast trigger rearm time is a crucial feature for multi-record acquisitions. Thanks to fast trigger rearm U5309A achieves very low “dead time” between the records of a multi-record acquisition. The “dead time” is the period after the end of an event when the card cannot digitize data for a new trigger event. Program examples for Single record or multi-records acquisitions are available: For IVI-C C:\Program FilesC1\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI-C For IVI.NET C:\Program Files1\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI.NET Time stamps The ADC card also measures and stores the arrival time of each trigger using the information from the on board Trigger Time Interpolator (TTI). See Trigger TimeInterpolator andTimestamps(page14) for details. Timebase Range The timebase range defines the time period over which data is being acquired. For example, the U5309A- M01-SR1 has a standard acquisition memory of 64 MS/ch and maximum sampling rate of 1 GS/s. Therefore, at the maximum sampling rate, the ADC card can record a signal over a time window of up to 67 ms (approx 67 M points * 1 ns/point). Binary Decimation A programmable binary decimation may be used to lower the sample rate by a ratio of 2n, where n is defined in the range of 1 to 10, depending on the model and configuration (See Table below). To enable decimation, user should set the sampling rate to required decimated sampling rate. Model Sampling rate option Acquisition mode Maximum Decimation Ratio Lower supported sampling rate CH1/CH2 -SR0 Singlerecord 28 1.9531MS/s Multi-Record 23 62.5MS/s 1Or the alternative drive letter where the Acqiris MD3 Software has been installed on your machine.

Model Sampling rate option Acquisition mode Maximum Decimation Ratio Lower supported sampling rate -SR1 Singlerecord 29 1.9531MS/s Multi-Record 24 62.5MS/s -SR2 Singlerecord 210 1.9531MS/s Multi-Record 25 62.5MS/s CH4/CH8 -SR1 - Notsupported N/A The accuracy of absolute trigger time is guaranteed (as specified in the datasheet) down to sample rates 1/16 of the highest sample rate (1/32 of the highest sample rate with interleaving). Maximum Acquisition Time There is a limit on the acquisition time / acquisition length in DGT mode depending on the record size, post trigger delay and binary decimation factor. Above this «limit », the driver returns a PostTrigger overflow. This limitation is given by the table below, where acquisition time = record size x sampling interval + post- trigger delay. Sample rate Max acquisition time (in seconds) 1.00E+09 68.72 12 U5309A User's Manual

13 Trigger The trigger settings applied to the ADC card are used to determine at which time the device will stop acquiring data. The various trigger settings are outlined below. Trigger Source The trigger source can be a signal applied to either an Input Channel (digital internal triggering) or on the TRG IN front panel input connector (external triggering). The trigger can also be managed through software (Please see Please refer to AqMD3.chm (IVI-C) or Acqiris.AqMD3.Fx40.chm (IVI.NET) for details). Trigger Impedance & Coupling The U5309A has a fixed 50 Ω termination impedance with DC coupling. Trigger Input Bandwidths The bandwidth depends on the trigger source. Channel trigger The -3 dB bandwidth of the comparator of the channel triggers is the same as the bandwidth of the channel input. This is option dependent. Please refer to the table in the ChannelInput(page7) section. For input signals with high frequency components, this means that the signal acquired and displayed doesn’t correspond exactly to the signal seen from the trigger comparator input. Since, the signal seen on the trigger comparator can be attenuated, this should be taken into account when selecting channel triggers and specifying the trigger level. External trigger The external trigger input has a bandwidth from DC to 2 GHz. Trigger Level The trigger level specifies the voltage at which the selected trigger source will produce a valid trigger. All trigger circuits have sensitivity levels that must be exceeded in order for reliable triggering to occur. The external trigger input has a hysteresis of 5% of FSR (Full Scale Range), and FSR is ±5 V, therefore the ADC card will trigger on signals with a peak-to-peak amplitude > 0.5 V. The internal channel trigger of the U5309A, is implemented digitally and as such, the level may be configured via the driver, within the limits shown in the table below. "offset" and "range" refer to the channel's current Vertical Offset and Vertical Range settings. Slope Min Max Positive =offset- range*127/256+Hysteresis =offset+range*126/256 Negative =offset- range*127/256 =offset+range*126/256- Hysteresis

The hysteresis is configured automatically as a function of the vertical FSR, as follows: Full Scale Range (Volts) Hysteresis (LSB) Hysteresis (Volts) 5 6 0.12 2.5 6 0.06 1 8 0.03 0.5 8 0.016 0.25 14 0.014 Edge Trigger Slope The trigger slope defines which one of the two possible transitions will be used to initiate the trigger when it passes through the specified trigger level. Positive slope indicates that the signal is transitioning from a lower voltage to a higher voltage. Negative slope indicates the signal is transitioning from a higher voltage to a lower voltage. Trigger Time Interpolator and Time stamps The ADC card also measures and stores the arrival time of each trigger using the information from the on board Trigger Time Interpolator (TTI). This information is essential for determining the precise relation between the trigger and the digitized samples of the signal. The TTI resolution determines the resolution of the trigger time stamps. Please refer to Trigger section of your product Data sheet for the relevant specifications. The timestamps counter is started up at the first initialization of the card after a power up of the system. The timestamps counter is reset each time the card is re-initialized, with reset flag = 1. The InitialXTimeSeconds and InitialXTimeFraction parameters returned by the fetch and read functions are then relative to the last initialization with reset flag = 1 or the first initialization. The trigger time interpolator is only applicable to the external trigger input (TRG IN), it does not operate on the channel trigger of the U5309A. Trigger precision and resolution The U5309A trigger time interpolator offers a resolution of 8 ps (nominal) and a precision of 15 ps RMS (nominal) . The channel trigger resolution and precision are both equal to 1 sample. The accuracy of absolute trigger time is guaranteed (as specified in the datasheet) down to sample rates 1/16 of the highest sample rate (1/32 of the highest sample rate with interleaving). 14 U5309A User's Manual

U5309A User's Manual 15 If comparing the initial trigger time T0 measured using the same waveform either used as channel input trigger or as an external trigger, the T0 position can be slightly different (especially if the waveform used as trigger has a slow edge). First, the analog bandwidth can be different for the channel trigger input and the external trigger input, resulting in a different slope and so a different T0. Secondly, compared with the channel trigger, the external trigger threshold is not calibrated. The input channel trigger calibration allows a T0 adjustment both in threshold and in timing, resulting in a more accurate T0. However, when using the external trigger, the measured T0 is still precise and theT0 position difference stays stable. Using a signal with faster edge as external trigger can reduce this effect. Pre- and Post-Trigger Delay To increase trigger flexibility, a pre- or post-trigger delay can be applied to the trigger position. The amount of pre-trigger delay can be adjusted between 0 and 100% of the acquisition time window (i.e. sampling interval x number of samples), whereas the post-trigger delay can be adjusted within the time interval: from 0 to (232 – 1) * block_size (samples) where block_size is 16 . Pre- or post-trigger delays are just different aspects of the same trigger positioning parameter:

The condition of 100% pre-trigger indicates that all data points are acquired prior to the trigger, i.e. the trig- ger point is at the end of the acquired waveform. The condition of 0% pre-trigger (which is identical to a post-trigger of 0%) indicates that all data points are acquired immediately after the trigger, i.e. the trigger point is at the beginning of the acquired waveform. The condition of a non-zero post-trigger delay indicates that the data points are acquired after the trigger occurs, at a time that corresponds to the post-trigger delay, i.e. the trigger point is before the acquired waveform. The ADC card hardware accepts pre- and post-trigger adjustments in increments of 16 samples. By definition post-trigger settings are a positive number and pre-trigger settings are a negative number. Thus it is only natural that the software drivers treat pre- and post-trigger delays as a single parameter in seconds that can vary between: – NbrSamples * SamplingInterval (100% pre-trigger) and +maxPostTrigSamples * SamplingInterval (max post-trigger). You can refer to section How tosettheexternaltrigger?(page66) for additionnal infomation. 16 U5309A User's Manual

U5309A User's Manual 17 External Clock and Reference For applications for which the user wants to replace the internal clock of the acquisition card and drive the ADC with an external source, either an external clock or an external reference signal can be used. The clock or reference signal can be entered into the ADC card by the dedicated REF IN and CLK IN connectors. External Clock (CLK IN) The External Clock may be used to vary the sampling rate of the ADC card. If selected for the ADC card, it must be continuously present to operate correctly. The input is AC coupled. Parameter Value CH2 CH8 FrequencyRange 1.8GHzto2.2GHz 3.6GHzto4.4GHz Amplitude +5to+15dBm Threshold 0V Note that the sample rate will depend on the model option, as shown in the table below: Channel Con- figuration Option Sample rate CH2 -SR0 =Externalclockfrequency/4 -SR1 =Externalclockfrequency/2 -SR2 =Externalclockfrequency CH8 -SR0 N/A -SR1 =Externalclockfrequency/4 -SR2 N/A External Reference (REF IN) For applications that require greater timing precision and long-term stability than is obtainable from the internal clock, a 100 MHz Reference signal can be used. The External Reference is nominally at 100 MHz. However, frequencies in a range will be accepted. If your input is not at exactly the specified value, you must remember to compensate for the difference in your application since the ADC card and the driver have no way to know about such deviations. The input is 50 Ω terminated and AC coupled. Parameter Value Tolerance NominalFrequency 100MHz ±100kHz

Parameter Value Tolerance Signallevel -3dBmto+3dBm Impedance 50Ω Coupling AC If synchronization between several ADC cards is required, the reference signal should be applied to all of them. 18 U5309A User's Manual

19 Calibration The U5309A is factory calibrated ans shipped with a calibration certificate. The internal calibration refers to the adjustment of ADC card internal parameters, corresponding to user selected parameters and required before starting acquisition. Internal Calibration The internal calibration (or self-calibration) measures and adjusts the internal timing, gain and offset parameters between the ADCs and against a precise reference. The ADC card includes a high precision voltage source and a 16-bit DAC, used to perform the input voltage and offset calibration. The supplied software drivers include self-calibration function which can be executed upon user request. The ADC cards are never calibrated in an “automatic” way, (i.e. as a consequence of another operation). This ensures programmers have full control of all calibration operations performed through software in order to maintain proper event synchronization within automated test applications. For accurate time and voltage measurements it is recommended to perform a calibration once the module has attained a stable operating temperature (usually reached after 20 minutes of ADC card operation after power on). A full internal calibration of a ADC card can be time consuming because of the many possible configuration states. Therefore, the self-calibration is performed only for the current configuration state, and is mandatory before making any acquisition. Indeed the AqMD3 driver prevents an acquisition from being performed unless a self-calibration has first been completed. Note that some configuration changes do not require a new self- calibration. To avoid unnecessary self-calibrations, the IAqMD3Calibration.IsRequired IVI.NET property or the AQMD3_ATTR_CALIBRATION_IS_REQUIRED IVI-C attribute should be queried. ADC card can usually work with signals present at the channel input, trigger input. However, to ensure the best performance, or if the calibration is found to be unreliable (as shown by a calibration failure status), it is recommended to remove such signals. Similarly, when working with internal clock, it is recommended to remove external reference and external clock inputs during calibration to avoid parasitic effects. Smart-calibration The smart calibration implemented in MD3 drivers allows to save time by automatically saving and restoring calibration information from any self-calibration performed since the beginning of the session. When the acquisition parameters are changed, no re-calibration of the instrument is necessary if a self-calibration has already been performed with the same acquisition conditions (i.e. the same set of parameters), unless the clock mode parameters are changed. Indeed, any change in the clock mode parameters (i.e. External clock frequency, Clock source or Reference mode parameters), induces a restart of the clocks which requires a new self-calibration. For details, see Parameter changerequiringanew selfcalibration(page59)

lab instruments that have significantly better performance than the DUT. Lab instrument performance must be traceable to the International System (SI) Units via a national metrology institute (NIST, NPL, NRC, PTB, CENAM, INMETRO, BIPM, etc.) The measured performance is then compared to published datasheet specifications. For each factory calibration, Acqiris tests the performance corresponding to all datasheet specifications, for every installed option. If needed, the DUT is adjusted and re-qualified ; ensuring it is in line with full specifications. Our ADC cards are calibrated at factory during the production phase. There is no need to systematically calibrate each year. First, the cards include a self-calibration function providing a good degree of confidence that your instrument is operating within its specifications on a day-to-day basis, and triggering an error message if out of calibration relative to the internal calibration signal. Secondly, our cards are warranted to stay within specification over the standard 3-year warranty. They usually stay within specification much longer and we rarely have to effectively recalibrate the cards. Lastly, a onetime calibration can be ordered in case customer detects a deviation in the measure of its final product that appears to be caused by the ADC card. The onetime calibration consists in processing the card through production test to determine if it is still within specification: If yes, the card is returned with the certificate of calibration which certifies it is within specification. If not, the required calibration is performed, and another production test is done to provide the cer- tificate of calibration. If repair is required, and the card is out of warranty, a repair quote will be provided. For more information, or to request for a calibration, please contact technical support [email protected]. 20 U5309A User's Manual

21 Trigger Output A trigger output pulse can be generated for external use. When the ADC card is ready to be triggered and a valid trigger signal occurs, a trigger output pulse is generated. This signal is available on the front panel TRG OUT MMCX connector, and may be enabled or disabled as required. In idle state, Trigger Out signal is low. When a trigger is accepted a high level pulse occurs. There are several trigger sources or signals which may be assigned to the trigger out connector (See Table below). Trigger out sources Description of signal TriggerAccepted ApulsesignalissentdirectlytotheTrigger Out. TriggerAcceptedResync Apulsesignalresynchronizedtoasub-multipleofsampleclockissenttotheTrigger Out. TriggerCompare Thetrigger inputconditionhasbeensatisfied,butnotnecessarilytriggerede.gthe trigger enablewasnotasserted. HighLevel Fixedhighlevelsignalfor debugpurposes. LowLevel(default) Fixedlow levelsignalfor debugpurposes. Trigger output signal behavior By default, the trigger source is LowLevel. If selecting a trigger output source, e.g. TriggerAcceptedResync or TriggerAccepted as trigger output source, when the ADC card is ready to be triggered and a valid trigger signal occurs, a trigger output pulse is generated. Selecting the trigger output source The trigger output can be selected using following property / attribute: Driver Attribute / Property Available Instance Value IVI-C AQMD3_ATTR_TRIGGER_OUTPUT_ ENABLED Boolean AQMD3_ATTR_TRIGGER_OUTPUT_ OFFSET Real64 AQMD3_ATTR_TRIGGER_OUTPUT_ SOURCE LowLevel HighLevel TriggerAccepted TriggerAcceptedResync TriggerCompare IVI.NET IAqMD3TriggerOutput.Source IAqMD3TriggerOutput.Enabled Boolean IAqMD3TriggerOutput.Offset Double

In the default software configuration, the output swing is 1.6 V (±0.8 V) when unloaded and 0.8 V (±0.4 V) when terminated on 50 Ω. The rise and fall times are 2.5 ns typical. The offset can be adjusted, by software control in the range [–2.5 V to +2.5 V] unloaded, or [-1.25 V to +1.25 V] into 50 Ω. The maximum output current capability is ±15 mA. As the output is retro-terminated, it is possible to drive a 50 Ω line un-terminated (HiZ) without loss of performance. For a TTL compatible signal, set the offset to 1.0 V and the swing at destination will be +0.2 to +1.8 V. For an ECL compatible signal, terminated on 50 Ω to –1.2 V, set the offset to –1.2 V and the output will be in the range [–0.8 to –1.6 V]). Alternatively, to reduce the current drawn from the ADC card, the terminations shown here can be used: Suggested trigger signal terminations. The External Trigger Output functionality is implemented in the hardware. No Trigger Out signal occurs for software-generated or digital triggers. 22 U5309A User's Manual

U5309A User's Manual 23 Multi-Purpose Inputs and Outputs The multi-purpose IO connectors may be used for any of the functions shown in the following table: IO Connector Functions Type Description of signal Notes Inputs Disabled - IO connector isdisabled. In-ToLogicDevices - ThePio_IninputsignaltotheDPU user core IO 1-Pio_In(0),IO 2-Pio_In(1) Thesesignalsareresynchronizedtothesampling clockdividedby16andtransferredfromtheControl FPGAtotheDPU withanon-deterministicclock cyclelatency. Usedonlywith the-FDKoption. In-AccumulationEnable Level Requires-AVG or -PKD option. IO 1only. Outputs Out-LogicDeviceDPUA - ThePio_OutoutputsignalfromtheDPU user core. IO 2-Pio_Out(1) ThesesignalsaretransferredfromtheDPU tothe ControlFPGAwithanon-deterministicclockcycle latency. Usedonlywith the-FDKoption. Out-FPGASyncOut Pulse TheSyncOutoutputsignalfromtheDPU user core ThissignalistransferredfromtheDPU totheCon- trolFPGAwithadeterministicclockcyclelatency. Usedonlywith the-FDKoption. Out-100MHzRe- ferenceClockDivBy2 Clock The100MHzreferenceclockdividedby2(50MHz) IO 1only Out-SamplingClockDivBy32 Clock Thesamplingclockdividedby32 IO 1only Out-AcquisitionActive Level Indicatesthattheacquisitioniscurrentlyrunning. IO 1&2only Out-TriggerArmed Level Trigger isarmed. IO 1&2only Out-LowLevel Level Fixed'low'levelsignalfor debugpurposes. Out-HighLevel Level Fixed'high'levelsignalfor debugpurposes. Out-TriggerAcceptedResync Pulse Activewhenavalidtrigger eventhasoccurred.This signalisresynchronizedtothesampleclock. Out-AccumulationActive Level Indicatesthattheaccumulationiscurrentlyrunning. IO 2only. Requires-AVG or -PKD option. The list of Available signals is indicated (as a comma separated list) by member IAqMD3ControlIO.AvailableSignals (IVI.NET) or attribute AQMD3_ATTR_CONTROL_IO_ AVAILABLE_SIGNALS (IVI-C). Signal Logic Levels The multi-purpose IO signals are 3.3 V CMOS compatible (5V Tolerant buffer). The levels shown in the table below should be observed.

Direction Low level High level Input <0.8V >2.0to3.45V Output Intherange0to0.8V Intherange1.6to3.3V As an Input The input is high-impedance and will be pulled high if unconnected via an internal weak pull-up (42.2 k pull-up resistor). IO-P schematic As an Output The high level output will typically give 1.6 V into 50 Ω. As can be seen in the diagram below, the 3.3 V output buffer has a 50 Ω resistor in series. Therefore the available output high level voltage will depend on the load applied. In the example below a 50 Ω termination will result in a nominal high level of 1.6 V. (Vo = (Rload/(50 + Rload)) * 3.3). Output equivalent circuit. 24 U5309A User's Manual

U5309A User's Manual 25 Signal Processing Options This section describes each real-time signal processing options. The following table show the availability of firmware options versus channel configuration and sampling rate. Firmware Channel Configuration & Sampling Rate -CH1/-CH2 -CH8 -SR0 -SR1 -SR2 -SR1 -DGT ü ü ü ü -AVG ü ü ü On-CH1only — -PKD ü ü ü On-CH1only — -TSR ü ü ü — Combining-AVG &-TSR ü On-CH1only ü On-CH1only ü On-CH1only — Averager (AVG) Introduction Averaging signals reduces random noise effects, improving the signal-to-noise ratio, as well as increasing resolution and dynamic range. The main features are: Synchronous, single-channel and dual-channel, real-time sampling and averaging up to 2 GS/s. Averaging from 1 to 520'000 triggers. in steps of 8 triggers (excepted when using less than 8 triggers). Some possible values are 1, 2, 3, 4, 5, 6, 7, 8, 16, 24, 32, … triggers. Effective acquisition length from 1 K up to 240 KSamples in dual-channel mode, or up to 480 KSamples if using only a single channel (CH1 option or if a single channel is used and the other one is disabled). Noise Suppressed Accumulation (NSA). Self-Trigger mode for minimal synchronous (pattern) noise. Noise Suppressed Accumulation (NSA) In some applications, such as time-of-flight spectroscopy, the signal is a rare event sitting on top of a noisy baseline and the averaging process reduces the random noise.

synchronous noise, the averaging firmware allows the user to set a Threshold that must be exceeded for each data value to be entered into the sum. Furthermore, the NoiseBase can be subtracted from each data value above threshold before the accumulation is done (See Figure below). The NoiseBase should always be equal or smaller than the Threshold. Signal detection using noise suppressed accumulation It is possible to use the NSA on negative signal. by enabling the channel “Data Inversion” capability, the signal will be inverted before applying the NSA settings. Parameters (Channels2.Item2.Accumulation.NSA interface): Enabled: Specifies whether the Noise Suppressed Accumulation is active. This attribute affects instrument behavior only when the Acquisition Mode attribute is set to Averager. NoiseBase: Specifies the noise base value for the Noise Suppressed Accumulation. The noise base is subtracted from data values which are higher than the configured threshold. This parameter is defined per channel in ADC counts. It can be configured in the range [0 to 255] . Threshold: Specifies the threshold of the Noise Suppressed Accumulation. Each data value must exceed the threshold value to be entered into the sum. This parameter is defined per channel in ADC counts. It can be configured in the range [0 to 255] . The NSA Base Noise must be equal or smaller than NSA Threshold. Timing sequence The minimum time between summed events depends on the trigger Rearm Time as specified in the Data sheet. 26 U5309A User's Manual

27 Timing sequence in AVG mode Current solution supports a single record sequence mode. The number of potential trigger lost between two AVG acquisition sequences depends on several factors: The time needed to perform the last accumulation AVG Dead Time, which depends on the number of samples acquired. The AVG Dead Time can be estimated by #Samples x 2.1 [ns] for SR2, or by #Samples x 1.77 [ns] for SR3. The time to read the previous AVG acquisition sequence, depending on the number of samples to transfer and mainly on the PCIe connection. The time to initiate the next acquisition. A solution to reduce the time between AVG acquisition sequences, is to combine AVG and TSR mode (See Averager withTriggeredSimultaneousAcquisitionandReadout(AVG/TSR option) (page43)). Trigger Modes Apart from the trigger sources described in the section Trigger (internal and external triggering), this option provides another trigger mode to warranty minimum synchronous (pattern) noise. This trigger source is called Self-Trigger. In applications where multiple waveforms are accumulated, the synchronicity between ADCs sequence and trigger results in a synchronous noise which often becomes the dominant factor. In theory, setting the external trigger at a specific trigger frequency which ensures that each waveform to be accumulated starts with a different ADC, the user can reduce the synchronous noise. However, in a real application it is not possible to ensure the trigger stability at the optimum condition due to multiple factors, for instance temperature variations. Therefore, the only way to warranty the minimum synchronous noise is using the Self-Trigger mode. Self Trigger In this mode, the trigger is generated internally in the ADC card and propagated outside the ADC card through the front panel IO 3. The trigger is controlled to ensure that each waveform to be accumulated starts at a different ADC in the ADC sequence. To use the Self-Trigger mode, the Trigger ActiveSource must be set to "SelfTrigger". Figure below shows the signal to noise ratio using an external trigger at a frequency multiple of the sampling frequency (worst case) and the Self-Trigger at any frequency (best case), on a U5303A -Similar SNR improvement is expected on a U5309A starting from minimum SNR.

Example of signal to noise ratio vs Number of averagers for U5303A. Parameters ActiveSource (IAqMD3Trigger.ActiveSource property): Specifies the trigger source. There are three trigger sources: internal, external and self-trigger. If the Self-Trigger mode is selected the Self-Trigger parameters should be set and the IO 3 output should be enabled. Frequency (IAqMD3TriggerSourceSelfTriggerSquareWave Interface): Specifies the frequency of the Self-Trigger square wave signal. The units are Hertz. DutyCycle (IAqMD3TriggerSourceSelfTriggerSquareWave Interface): Configures the duty cycle of the Self-Trigger square wave signal. Units are percentage of the period. Slope (IAqMD3TriggerSourceSelfTriggerSquareWave Interface): Specifies whether a rising or a falling edge of the generated waveform triggers the acquisition card. Out-AveragerAwg (ControlIOs interface): Self-Trigger signal is propagated through the IO 3. Post Trigger Delay The post trigger delay step depends on sampling rate and channel options, it can be summarized as follow: U5309A -CH1 -CH2 -SR2 multipleof16ns Notsupported -SR1 multipleof32ns multipleof16ns -SR0 multipleof64ns multipleof32ns For a procedure to help you with the parameters optimization, see How tooptimizeNSA settings?(page69). Multi-Purpose Inputs and Outputs (IO 1, 2) The multi-purpose inputs and outputs (IO 1, 2) in the front panel may be used to control the accumulation or read the ADC card status: 28 U5309A User's Manual

U5309A User's Manual 29 Parameters (ControlIO interface) In-AccumulationEnable: ADC card input (IO 1). This signal controls the averaging sequence checking its value only at the averager start. If the accumulation enable is '1' at the start, the averager will perform the average independently of this input value. By the contrary, if the accumulation enable is '0' at the start, the ADC card will wait until the accumulation enable rises to start the averaging at that moment (no need for a new start). Out-AccumulationActive: ADC card output (IO 2). This signal informs that the ADC card is busy acquiring or accumulating the last averages. Out-AcquisitionActive: ADC card output (IO 1 or IO 2). This signal informs that the ADC card is busy acquiring. Data readout when using FetchAccumulatedWaveformInt32 The data returned by the driver is unsigned. Since the API is limited to signed data type (for AVG fetch Int32), a conversion should be applied to interpret data returned through API as unsigned int (32-bit) as in provided examples. IVI.NET To convert from raw value to Volts: IAqMD3AccumulatedWaveformCollection waveformCollection = null ; waveformCollection = instrument.Channels [«Channel1»].Measurement.FetchAccumulatedWaveform(0, nbrRecords, 0, nbrSamples, waveformCollection); foreach (var waveform in waveformCollection) { for (int point = 0; point < waveform.ValidPointCount; ++point) { double sampleInVolts = waveform.GetScaled(point); } } IVI-C To convert from raw value to Volts: ViReal64 valueInVolts = static_cast(dataArray[firstValidPoint[currentRecord] + currentPoint]) * scaleFactor + scaleOffset; Partial readout after an incomplete accumulation It is possible to read data after an incomplete accumulation. If user stops the acquisition using an Acquisition.Abort before reaching the specified number of triggers, the accumulated data can be read, excepted for incomplete block of 8 triggers. For instance: - If the number of acquired triggers is <8, no data is available. - If the number of acquired triggers is between 8 and 16, the data accumulation for the first 8 triggers can be read. - If the number of acquired triggers is between 16 and 24, the data accumulation for the first 16 triggers can be read.

And so on in multiple of 8 accumulations. After an Acquisition.Abort and an incomplete accumulation, the ScaleFactor and ScaleOffset returned by the Fetch function refer to the complete accumulation. In case of partial average readout, the effective scale factor is obtained from the returned ScaleFactor multiplied by the configured number of averages, and divided by the actual number of averages. Other AVG Parameters Finally, below are specific parameters commonly used in the averager: NumberOfAverages: number of waveforms to average in the record. DataInversionEnabled: the data acquired may be inverted if desired. Mode: select the averager mode (IAqMD3Acquisition.Modeproperty in IVI.NET or AQMD3_VAL_ ACQUISITION_MODE_AVERAGER in IVI-C) Enabling the Averager mode IVI.NET The average mode is selected by setting IAqMD3Acquisition.Mode property to Acqiris.AqMD3.AcquisitionMode.Averager: instrument.Acquisition.Mode = AcquisitionMode.Averager; IVI-C The attribute AQMD3_ATTR_ACQUISITION_MODE (ViInt32) must be set to value AQMD3_VAL_ ACQUISITION_MODE_AVERAGER: AqMD3_SetAttributeViInt32( session, "", AQMD3_ATTR_ACQUISITION_MODE, AQMD3_VAL_ ACQUISITION_MODE_AVERAGER ); Program examples for acquisitions with real-time averaging are available: For IVI-C C:\Program FilesC1\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI-C For IVI.NET C:\Program Files1\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI.NET AVG Configuration The interfaces/methods/properties (functions/attributes) listed below are provided by the Acqiris MD3 Software. Detailed help on these interfaces may be found in the AqMD3 IVI Driver Help - Please refer to AqMD3.chm (IVI-C) or Acqiris.AqMD3.Fx40.chm (IVI.NET) . IVI.NET Interface Method / Property name Description IAqMD3TriggerSourceSelfTrigger AbortGeneration Stopsthegenerationoftheself-trigger signalpreviouslyinitiated. InitiateGeneration Startsthegenerationoftheself-trigger signal. Mode Definestheself-trigger signalgeneration mode. 1Or the alternative drive letter where the Acqiris MD3 Software has been installed on your machine. 30 U5309A User's Manual

31 Interface Method / Property name Description PulseDuration Definestheself-trigger signalpulsedur- ation. IAqMD3TriggerSourceSelfTrigger SquareWave Configure Configuresthesquarewavesignalprop- ertiesoftheself-trigger generator. Callingthisfunctionwillautomaticallyset theself-trigger modetoSquareWave. DutyCycle Configuresthedutycycleoftheselftrig- ger squarewavesignal.Behavior dependsontheconfigurationofthe Slopeproperty(e.g.ifSlopeissettopos- itiveDutyCycledefinesthepercentage thatthesquarewaveisinthehighstate). Unitsarepercentageoftheperiod. Frequency Specifiesthefrequencyoftheself-trigger squarewavesignal.TheunitsareHertz. Slope Specifieswhether arisingor afalling edgeofthegeneratedwaveformtrig- gerstheADC card. IAqMD3TriggerSourceSelfTrigger CustomWave LoadConfigurationFile Loadstheconfigurationfor theself-trig- ger generator fromaspecifiedcon- figurationfile.Callingthisfunctionwill automaticallysettheself-trigger modeto CustomWave. IAqMD3Acquisition Mode Theacquisitionmode. IAqMD3Acquisition NumberOfAverages Specifiesthenumber ofwaveformsto averageintherecord.Thisattribute affectsinstrumentbehavior onlywhen theAcquisitionModeattributeissetto Averager or PeakDetection. IAqMD3Channel DataInversionEnabled Specifieswhether thedataacquiredis inverted. IAqMD3ChannelAccumulationNSA Configure ConfigurestheNoiseSuppressedAccu- mulationproperties. Enabled Specifieswhether theNoiseSuppressed Accumulationisactive.Thisattribute affectsinstrumentbehavior onlywhen theAcquisitionModeattributeissetto Averager. NoiseBase Specifiesthenoisebasevaluefor the NoiseSuppressedAccumulation.The noisebaseissubtractedfromdataval- ueswhicharehigher thantheconfigured threshold.TheunitsareADC counts. Threshold SpecifiesthethresholdoftheNoiseSup- pressedAccumulation.Eachdatavalue mustexceedthethresholdvaluetobe

Description enteredintothesum.TheunitsareADC counts. IAqMD3ChannelMeasurement FetchAccumulatedWaveformInt32 Thisfunctionreturnstheaccumulated waveformwhichtheADC cardhas acquiredfor thespecifiedchannel.This waveformisfromapreviouslyinitiated accumulatedacquisitioninAverager or PeakDetectionmode.Returnedwave- formdataunitsareraw accumulated ADC valueswhichmaybeconvertedto Voltsbytheformula:V=ScaleFactor * data+ScaleOffset. FetchAccumulatedWaveformReal64 Thisfunctionreturnstheaveragedwave- formwhichtheADC cardhasacquired for thespecifiedchannel.Thiswaveform isfromapreviouslyinitiatedaccumulated acquisitioninAverager or PeakDetec- tionmode.Returnedwaveformdata unitsareVolts. IVI-C Functions Function Description AqMD3_SelfTriggerAbortGeneration Stops the generation of the self-trigger signal previously ini- tiated. AqMD3_SelfTriggerInitiateGeneration Starts the generation of the self-trigger signal. AqMD3_SelfTriggerSquareWaveConfigure Configures the square wave signal properties of the self-trig- ger generator. Calling this function will automatically set the self-trigger mode to Square Wave. AqMD3_ SelfTriggerCustomWaveLoadConfiguration File Loads the configuration for the self-trigger generator from a specified configuration file. Calling this function will auto- matically set the self-trigger mode to Custom Wave. AqMD3_NSAConfigure Configures the Noise Suppressed Accumulation properties. Attributes Attribute Description AQMD3_ATTR_SELF_TRIGGER_ MODE Defines the self-trigger signal generation mode. AQMD3_ATTR_SELF_TRIGGER_ SQUARE_WAVE_DUTY_CYCLE Configures the duty cycle of the self trigger square wave signal. Beha- vior depends on the configuration of the Slope property (e.g. if Slope is set to positive DutyCycle defines the percentage that the square wave is in the high state). Units are percentage of the period. AQMD3_ATTR_SELF_TRIGGER_ Specifies the frequency of the self-trigger square wave signal. The 32 U5309A User's Manual

33 Attribute Description SQUARE_WAVE_FREQUENCY units are Hertz. AQMD3_ATTR_SELF_TRIGGER_ SQUARE_WAVE_SLOPE Specifies whether a rising or a falling edge of the generated wave- form triggers the ADC card. AQMD3_ATTR_ACQUISITION_ MODE The acquisition mode. AQMD3_ATTR_ACQUISITION_ NUMBER_OF_AVERAGES Specifies the number of waveforms to average in the record. This attribute affects instrument behavior only when the Acquisition Mode attribute is set to Averager or PeakDetection. AQMD3_ATTR_CHANNEL_DATA_ INVERSION_ENABLED Specifies whether the data acquired is inverted. AQMD3_ATTR_NSA_ENABLED Specifies whether the Noise Suppressed Accumulation is active. This attribute affects instrument behavior only when the Acquisition Mode attribute is set to Averager. AQMD3_ATTR_NSA_NOISE_ BASE Specifies the noise base value for the Noise Suppressed Accu- mulation. The noise base is subtracted from data values which are higher than the configured threshold. The units are ADC counts. AQMD3_ATTR_NSA_THRESHOLD Specifies the threshold of the Noise Suppressed Accumulation. Each data value must exceed the threshold value to be entered into the sum. The units are ADC counts.

Peak Detection (PKD) Introduction The Peak Detection firmware allows real-time acquisition and peak detection for the models supported. Moreover, there is the possibility to generate a histogram of peak versus time for successive acquisitions (accumulation). Note that PKD does not reduce the amount of data memorized. This function searches for the peaks, sets the rest of the data to zero (where there is no peak) and memorizes the data set to zero and the peaks. The main features are: Synchronous, single-channel and dual-channel, real-time sampling and peak detection up to 2 GS/s. Accumulation of 1 to 520,000 triggers in steps of 8 triggers (except the first 8 triggers). Some possible values are 1,2,3,4,5,6,7,8,16,24,32,… triggers. Effective acquisition length from 1 K up to 240 KSamples. Self-Trigger mode for minimal synchronous noise. Peak Detection Algorithm Nine samples are used to validate if a sample corresponds to a peak; the sample itself, along with the four samples before and after that sample are considered. The sample will be considered as a peak, if within the 9 samples analyzed: a rising edge is found before the sample that exceeds the programmable delta ΔRise, a falling edge is found after the sample that exceeds the programmable delta ΔFall, and the sample is the maximum of all points between the two defined rising and falling edges. There is additional verification to make sure that only one peak is found within the rising and falling edge region. Using this algorithm, peaks can be found on-the-fly in signals with frequencies up to half the sample rate. Peak detection algorithm Parameters(Channels.Item.PeakDetection interface): AmplitudeAccumulationEnabled: selects if the peak value is stored or the peak value is forced to '1'.RisingDelta: defines the amount by which two consecutive samples must differ to be considered as rising edge in the peak detection algorithm. FallingDelta: defines the amount by which two consecutive samples must differ to be considered as falling edge in the peak detection algorithm. Timing sequence The minimum time between summed events depends on the trigger Rearm Time as specified in the U5309A Datasheet. 34 U5309A User's Manual

35 Timing sequence in PKD mode Current solution supports a single sequence mode. The number of potential trigger lost depends on several factors: The time needed to perform the last accumulation PKDDead Time, which depends on the number of samples acquired (For instance, PKD Dead Time is 2.189 ms for an acquisition of 480 ksamples), The time to read the previous PKD acquisition sequence, depending on the number of samples to transfer and mainly on the PCIe connection. The time to initiate the next acquisition. Trigger Modes Apart from the trigger sources described in the section Trigger (internal and external triggering), this option provides another trigger mode to warranty minimum synchronous (pattern) noise. This trigger source is called Self-Trigger. In applications where multiple waveforms are accumulated, the synchronicity between ADCs sequence and trigger results in a synchronous noise which often becomes the dominant factor. In theory, setting the external trigger at a specific trigger frequency which ensures that each waveform to be accumulated starts with a different ADC, the user can reduce the synchronous noise. However, in a real application it is not possible to ensure the trigger stability at the optimum condition due to multiple factors, for instance temperature variations. Therefore, the only way to warranty the minimum synchronous noise is using the Self-Trigger mode. Self Trigger In this mode, the trigger is generated internally in the ADC card and propagated outside the ADC card through the front panel IO 3. The trigger is controlled to ensure that each waveform to be accumulated starts at a different ADC in the ADC sequence. To use the Self-Trigger mode, the Trigger ActiveSource must be set to "SelfTrigger". Figure below shows the signal to noise ratio using an external trigger at a frequency multiple of the sampling frequency (worst case) and the Self-Trigger at any frequency (best case), on a U5303A -Similar SNR improvement is expected on a U5309A starting from minimum SNR.

Example of signal to noise ratio vs Number of averagers for U5303A. Parameters ActiveSource (IAqMD3Trigger.ActiveSource property): Specifies the trigger source. There are three trigger sources: internal, external and self-trigger. If the Self-Trigger mode is selected the Self-Trigger parameters should be set and the IO 3 output should be enabled. Frequency (IAqMD3TriggerSourceSelfTriggerSquareWave Interface): Specifies the frequency of the Self-Trigger square wave signal. The units are Hertz. DutyCycle (IAqMD3TriggerSourceSelfTriggerSquareWave Interface): Configures the duty cycle of the Self-Trigger square wave signal. Units are percentage of the period. Slope (IAqMD3TriggerSourceSelfTriggerSquareWave Interface): Specifies whether a rising or a falling edge of the generated waveform triggers the acquisition card. Out-AveragerAwg (ControlIOs interface): Self-Trigger signal is propagated through the IO 3. Post Trigger Delay The post trigger delay step depends on sampling rate and channel options, it can be summarized as follow: U5309A -CH1 -CH2 -SR2 multipleof16ns Notsupported -SR1 multipleof32ns multipleof16ns -SR0 multipleof64ns multipleof32ns For a procedure to help you with the parameters optimization, see How tooptimizeNSA settings?(page69). Multi-Purpose Inputs and Outputs (IO 1, 2) The multi-purpose inputs and outputs (IO 1, 2) in the front panel may be used to control the accumulation or read the ADC card status: 36 U5309A User's Manual

U5309A User's Manual 37 Parameters (ControlIO interface) In-AccumulationEnable: ADC card input (IO 1). This signal controls the averaging sequence checking its value only at the averager start. If the accumulation enable is '1' at the start, the averager will perform the average independently of this input value. By the contrary, if the accumulation enable is '0' at the start, the ADC card will wait until the accumulation enable rises to start the averaging at that moment (no need for a new start). Out-AccumulationActive: ADC card output (IO 2). This signal informs that the ADC card is busy acquiring or accumulating the last averages. Out-AcquisitionActive: ADC card output (IO 1 or IO 2). This signal informs that the ADC card is busy acquiring. Other PKD Parameters NumberOfAverages: number of waveforms to average in the record. DataInversionEnabled: the data acquired may be inverted if desired. PKD Configuration The interfaces/methods/properties (functions/attributes) listed below are provided by the Acqiris MD3 driver. Detailed help may be found in the AqMD3 IVI Driver Help (  Please refer to AqMD3.chm (IVI-C) or Acqiris.AqMD3.Fx40.chm (IVI.NET) ). Program examples for acquisitions with real-time peak detect are available: For IVI-C C:\Program FilesC1\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI-C For IVI.NET C:\Program Files1\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI.NET IVI.NET Interface Method / Property name IAqMD3TriggerSourceSelfTrigger AbortGeneration IAqMD3TriggerSourceSelfTrigger InitiateGeneration IAqMD3TriggerSourceSelfTrigger Mode IAqMD3TriggerSourceSelfTriggerSquareWave Configure IAqMD3TriggerSourceSelfTriggerSquareWave DutyCycle IAqMD3TriggerSourceSelfTriggerSquareWave Frequency IAqMD3TriggerSourceSelfTriggerSquareWave Slope IAqMD3TriggerSourceSelfTriggerCustomWave LoadConfigurationFile IAqMD3Acquisition Mode IAqMD3Acquisition NumberOfAverages IAqMD3Channel DataInversionEnabled IAqMD3ChannelPeakDetection Configure IAqMD3ChannelPeakDetection AmplitudeAccumulationEnabled 1Or the alternative drive letter where the Acqiris MD3 Software has been installed on your machine.

IAqMD3ChannelPeakDetection FallingDelta IAqMD3ChannelPeakDetection RisingDelta IVI-C Functions AqMD3_SelfTriggerAbortGeneration AqMD3_SelfTriggerInitiateGeneration AqMD3_SelfTriggerSquareWaveConfigure AqMD3_SelfTriggerCustomWaveLoadConfigurationFile AqMD3_PeakDetectionConfigure Attributes AQMD3_ATTR_SELF_TRIGGER_MODE AQMD3_ATTR_SELF_TRIGGER_SQUARE_WAVE_DUTY_CYCLE AQMD3_ATTR_SELF_TRIGGER_SQUARE_WAVE_FREQUENCY AQMD3_ATTR_SELF_TRIGGER_SQUARE_WAVE_SLOPE AQMD3_ATTR_ACQUISITION_MODE AQMD3_ATTR_ACQUISITION_NUMBER_OF_AVERAGES AQMD3_ATTR_CHANNEL_DATA_INVERSION_ENABLED AQMD3_ATTR_PEAK_DETECTION_RISING_DELTA AQMD3_ATTR_PEAK_DETECTION_FALLING_DELTA AQMD3_ATTR_PEAK_DETECTION_AMPLITUDE_ACCUMULATION_ENABLED 38 U5309A User's Manual

U5309A User's Manual 39 Triggered Simultaneous Acquisition and Readout (TSR) Overview The purpose of the TSR option is to acquire in multi-record mode and read the data simultaneously. This solution allows longer acquisition duration compare with standard DGT and is dedicated to applications requiring no trigger loss. TSR option is not supported in association with average (AVG) or peak detection (PKD) mode. Functional Description Standard Acquisition vs. TSR Acquisition The following pictures illustrate the differences between a standard acquisition and a TSR acquisition. In a Standard Acquisition and Readout the duration of the acquisition is limited by the ADC card internal buffer memory size. The readout of the data is performed after the acquisition has stopped. The acquisition data rate supported is up to the maximum allowed by the ADC card. In a Triggered Simultaneous Acquisition and Readout, the readout of the data is performed during the acquisition. The readout can be performed as soon as a programmable number of records is acquired. Each segment is triggered by an external or software trigger. Unlike CSR mode, this mode allows gaps in the acquisition.

circular buffer which can be read simultaneously. Thanks to TSR mode, the data rate can be sustained without losing any trigger. The maximum performances of the system depend on the records size and trigger rate of the application. Mode of Operation TSR option implements an optimal and automated control of memory addressing. It results in an easy to use solution when compared with solutions requiring memory bank management. User does not need to select the number of records. The driver provided with the ADC card will automatically select the maximum number of records depending on the memory option and the number of samples per records. If the TSR Enabled property is set to true (and the Initiate Acquisition function is launched), the instrument will acquire data and store them into a circular buffer which can be read simultaneously. Once the Acquisition is initiated, the user has to poll on the TSR IsAcquisitionComplete property to check for the availability of data. When minimum programmable number of records are acquired, data can be fetched through standard (single- or multi-record) fetch functions. The TSR Continue function can be called to release the buffer containing the read data and make it available for the next acquisitions. User can also release the buffer without reading any or all the data. The TSR MemoryOverflowOccurred property indicates that no more memory is available to perform additional acquisitions, implying that follow-on triggers may be lost. For maximum performance, it is recommended to optimize the number of record to be acquired before the readout starts (NumRecordsToAcquire). Typically, if the number of samples per record is low, reading several records in one single Direct Memory Access (DMA) optimize the DMA transfer. There is a compromise between memory readout frequency and PCIe delay.(Recommendation is to set the number of record before readout to reach around 1 MB of data). It is recommended to set the NumRecordsToAcquire to a value close to 1 MB/(Record size). 40 U5309A User's Manual

41 If an overflow occurs, the writing is disabled, implying that follow-on triggers may be lost. A property indicates that no more memory is available to perform additional acquisitions. The already acquired data are still valid and can be read-out. Memory can be cleared only with Acquisition -> Abort() A typical usage example is shown below (pseudo-instructions): EnableTSR operation Initiateacquisition Loopuntilneeded Checkfor memoryoverflow Pollfor acquisitioncompletion Fetchdata Continue(releasememory) Endloop Abortacquisition Code example Program examples are available: For IVI-C C:\Program FilesC1\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI-C For IVI.NET C:\Program Files1\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI.NET Due to design constraints, the number of trigger events needed to have an acquisition complete can be higher than the number of records configured (through NumRecordsToAcquire property). It is therefore mandatory to query the TSR IsAcquisitionComplete property to check for data availability. TSR Configuration The interfaces/methods/properties (functions/attributes) listed below are provided by the Acqiris MD3 driver. Detailed help may be found in the AqMD3 IVI Driver Help (  Please refer to AqMD3.chm (IVI-C) or Acqiris.AqMD3.Fx40.chm (IVI.NET) ). IVI.NET Interface Method / Property name IAqMD3AcquisitionTSR Continue IAqMD3AcquisitionTSR Enabled IAqMD3AcquisitionTSR IsAcquisitionComplete IAqMD3AcquisitionTSR MemoryOverflowOccurred 1Or the alternative drive letter where the Acqiris MD3 Software has been installed on your machine.

U5309A User's Manual 43 Averager with Triggered Simultaneous Acquisition and Readout (AVG/TSR option) Overview The AVG & TSR option combination allows signal acquisition, real time averaging and data readout simultaneously, avoiding trigger loss. The averager features are the same as with AVG option (max number of average, baseline correction, max record size, NSA, triggering, …), (See detail in section Averager (AVG) (page25)). The addition of TSR on top of AVG option, enable minimal dead time between accumulations. Functional Description The architecture is based on TSR (Triggered simultaneous acquisition and readout), and enables simultaneous real time averaging and transfer of average records to host processor. Acquisition sequence As illustrated below, the readout of an "averager record" is performed during the next averager accumulation The readout can be performed as soon an "averager record" is acquired. Sequence in AVG and TSR mode When compared with standard averager mode, the AVG&TSR mode has neither AVG dead time nor readout time between acquisition sequences. The overall time dead between average records is minimum and limited to trigger re-arm time ~ 800 ns, minimizing the risk of trigger loss.

The number of averages for an "averager sequence" can be selected: from 1 to 520'000 triggers . When the abort command occurs, the ongoing partial accumulated record cannot be read. Usage Supported configurations U5309A-AVG/TSR, all sampling rates supported: SR0 @ 500 MS/s SR1 @ 1 GS/s SR2 @ 2 GS/s U5309A-CH4 and U5309A-CH8 are not supported. Acquisition sequence First, user should configure the averager: Accumulation settings/features same as standard AVG. Then TSR mode has to be enabled. Acquisition are performed continuously until you stop them. See detailed acquisition sequence below. 44 U5309A User's Manual

of the system depends on the number of average and the trigger rate. The minimum number of average is 8. The maximum number of average records only depends on the record size and the size of the storage device. Output format The readout of the averager records and output format are the same than with standard averager mode. Each AVG readout sequence illustrated on figure above, has a latency time (similar to "AVG deadtime") before starting data readout. But there is no trigger lost during this time, contrary to standard AVG mode. Limited risk of overflow There is a risk of overflow only with configurations using minimum number of averages, and very high trigger rate. If an overflow occurs, the writing is disabled, implying that follow-on triggers may be lost. A property indicates that there is no more memory available to perform additional acquisitions. In this case, memory can be cleared only with Acquisition -> Abort() AVG/TSR Configuration Regarding averager AVG function, the interfaces/methods/properties (functions/attributes) are detailed in AVG Configuration(page30) section or TSR Configuration(page41) section. Detailed help may be found in the AqMD3 IVI Driver Help (AqMD3.chm). Code example Program examples can be found in here: For IVI-C C:\Program FilesC1\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI-C For IVI.NET C:\Program Files1\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI.NET 1Or the alternative drive letter where the Acqiris MD3 Software has been installed on your machine. 46 U5309A User's Manual

U5309A User's Manual 47 Continuous Simultaneous acquisition and readout with Trigger (CST) Purpose The U5309A CST option answers customer need for simultaneous ADC card acquisition and readout with triggered acquisitions. Compared with standard acquisition mode, this mode enables longer acquisition duration, and is dedicated to applications requiring no trigger loss. Functional Description Overview The CST option allows the user to readout multiple streams while the acquisition is still running. CST is only available with the standard digitizer mode (i.e. CST option is not supported in association with averager -AVG mode.). Acquisition sequence The following pictures illustrate the differences between a standard acquisition and a CST acquisition. In a standard digitizer mode, acquisition and readout are sequential ; the readout of the data is performed after the acquisition has stopped. Consequently, the duration of the acquisition is limited by the ADC card internal buffer memory size. Standard acquisition and readout Acquisition and readout with CST option Thanks to CST option, acquired records are streamed to the host computer while the ADC card is acquiring the next records. This mode supports triggered multiple records of same length. Enabling gaps between the triggered records, CST mode allows acquisition over longer periods. The maximum duration of the acquisition only depends on the size of the storage device.

multiple of 128 in dual channel mode and a multiple of 256 when using the interleaved mode. Output format Output data streaming is managed by the application. In output, raw data is provided without any processing. Two output streams are available: 8-bit raw data Marker (Absolute trigger position) - the application can choose to read it or not. Each stream can be read independently and in a time multiplexed manner allowing fine tuning of the system for optimum application performance. Each stream has a single channel, per type of data. Trigger position Using raw data output, trigger position is known with the accuracy of a sample (corresponding to the 1st sample). If customer application requires trigger position at sub-sample, the information is available on the marker stream (absolute trigger position). Acquisition sequence An example of CST acquisition sequence is illustrated below. 48 U5309A User's Manual

The maximum data rate that can be sustained without overflow is limited by the PCIe sustained throughput on the target system, i.e. it depends on trigger rate and host computer and operating system settings. To have a list of recommended system and settings, please contact technical support [email protected]. When an overflow occurs the writing to the stream buffers stops. The already acquired data is still valid and can be read-out. To optimize the application data throughput it is recommended to use NbOfElementsToFetch > 1 M, especially for application with high trigger rate. Code example Program examples with streaming can be found in here: For IVI-C C:\Program FilesC1\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI-C For IVI.NET C:\Program Files1\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI.NET CST Configuration The interfaces/methods/properties (functions/attributes) listed below are provided by the Acqiris MD3 driver. CST acquisition mode may be enabled by setting the Streaming Mode to Triggered. To stop the streaming mode, Streaming Mode should be set to Disabled. The different streams are implemented as instances of Stream "repeated capabilities". There are several type of Stream "repeated capabilities". Detailed help may be found in AqMD3 IVI Driver Help (  Please refer to AqMD3.chm (IVI-C) or Acqiris.AqMD3.Fx40.chm (IVI.NET) ). IVI.NET Interface Method / Property name IAqMD3AcquisitionStreaming Mode TheStreamingModeis set toDisabledforregularADC card operation. It canbeset toContinuous forCSR enabledinstru- ments. It canbeset toTriggeredforCST enabledinstru- ments. AqMD3StreamingModeDisabled StreamingDisabled(Default). AqMD3StreamingModeTriggered TriggeredStreaming, forCST enabledinstruments. This streamingmodeperforms continuous acquisitions of suc- cessiverecords anddatareadout, simultaneously. All records havethesamepre-definedlength. This modesupports an unlimitednumberof triggeredrecords, dependingof record sizeandtriggerrate. 1Or the alternative drive letter where the Acqiris MD3 Software has been installed on your machine. 50 U5309A User's Manual

51 Interface Method / Property name IAqMD3Streams Count Returns thenumberof stream repeatedcapabilities. Name Returns thestream nameforagivenindex. FetchDataInt32 This functionreturns astream of Elements. TheEle- mentSizeInBits andthemeaningof eachElement dependon theStreamType. Enabled Specifies whetherthestream is enabledontheinstrument. Type Indicates thetypeof thestream. GranularityInBytes Indicates thegranularity of datafortheFetchDataoperations. MaxSizeInBytes Indicates themaximal sizeof datafortheFetchDataoper- ations. IAqMD3StreamMarkers BitsPerMarker Numberof bits representingaMarkervalue. FractionalBits Numberof fractional bits intheMarkervalue. IAqMD3StreamMinMax FrameSize Numberof samples overwhicheachMinMax pairis com- puted. IAqMD3StreamSamples BitsPerSample Returnsthenumber ofbitsper sample. DataEmulationEnabled Specifieswhether theDataEmulationisenabled.If True,theoutputdataarefetchedfromaninternal rampwaveformgenerator.IfFalse,theoutputdata arefetchedfromthedigitizer ADC stream. IVI-C Function AqMD3_StreamFetchDataInt32 This functionreturns astream of Elements. TheElementSizeInBits andthe meaningof eachElement dependontheStreamType. AqMD3_GetStreamName Returns thestream namethat corresponds totheone-basedindex that the userspecifies. Attributes AQMD3_ATTR_STREAMING_MODE TheStreamingModeissettoDisabledfor regular ADC cardoper- ation.ItcanbesettoContinuousfor CSR enabledinstruments.It canbesettoTriggeredfor CST enabledinstruments. AQMD3_VAL_STREAMING_MODE_DISABLED StreamingDisabled(Default). AQMD3_VAL_STREAMING_MODE_TRIGGERED TriggeredStreaming,for CST enabledinstruments.Thisstreaming modeperformscontinuousacquisitionsofsuccessiverecordsand datareadout,simultaneously.Allrecordshavethesamepre-

AQMD3_ATTR_STREAM_MARKERS_ FRACTIONAL_BITS Number offractionalbitsintheMarker value. AQMD3_ATTR_STREAM_MINMAX_FRAME_SIZE Number ofsamplesover whicheachMinMaxpair iscomputed. AQMD3_ATTR_STREAM_SAMPLES_BITS_PER_ SAMPLE Returnsthenumber ofbitsper sample. AQMD3_ATTR_STREAM_SAMPLES_DATA_ EMULATION_ENABLED Specifieswhether theDataEmulationisenabled.IfTrue,theoutput dataarefetchedfromaninternalrampwaveformgenerator.If False,theoutputdataarefetchedfromthedigitizer ADC stream. 52 U5309A User's Manual

53 Programming Information This section provides general programming advice and specific information regarding the use of the Acqiris drivers. The AqMD3 IVI driver provides access to the functionality of AqMD3 ADC cards through a .NET or ANSI C API which also complies with the IVI specifications. The AqMD3 API documentation can also be accessed from: IVI-C: Start > Acqiris > MD3 > Documentation > AqMD3-C IVI Driver Version# Documentation IVI.NET: Start > Acqiris > MD3 > Documentation > AqMD3.NET IVI Driver Version# Documentation or from: IVI-C : C:\Program Files1\IVI Foundation\IVI\Drivers\AqMD3\AqMD3.chm IVI.NET : C:\Program Files\IVI Foundation\IVI\Drivers\AqMD3\Acqiris.AqMD3.Fx40.chm.lnk The drivers IVI.COM AqMD2 and IVI-C AqMD2, based on previous AgMD2 driver, are available but are no recommended for new designs or new projects. (See C:\Program Files\IVI Foundation\IVI\Drivers\AqMD2) Program examples Program examples can be found in C:\Program Files\IVI Foundation\IVI\Drivers\AqMD3\Examples IVI-C Driver development environments The AqMD3 IVI-C driver can be used in the following development environments: Visual C++ MATLAB. IVI.NET Driver development environments The AqMD3 IVI.NET driver can be used in the following development environments: Visual C# Visual C++/CLI Visual Basic.NET 1(Or your installation path)

Migrating from MD2 2.x to MD3 3.x Introduction Both AgMD2 and AqMD3 driver are compliant with the IviDigitizer class standards from the IVI Foundation. The following sections detail how to perform the migration for the AgMD2 driver API to the AqMD3 driver API in specific programming languages. IVI-C C/C++ Applications : 1. In the project properties under 'Configuration Properties > Linker > Input', replace the additional dependency 'AgMD2.lib' by 'AqMD3.lib'. 2. In your code, replace the #include statement(s) with #include . 3. For each function call, replace the prefix: 'AgMD2_' with 'AqMD3_'. 4. For each attribute name, error code, and enum value, replace the prefix: 'AGMD2_' with 'AGMD3_'. 5. For certain attributes and enum values you will need to refer to the tables below to find an equivalent. Exception Tables for AgMD2/AqMD3 IVI-C Signatures Please refer to AgMD2 to AqMD3 Software Migration Note.pdf installed with AqMD3. 54 U5309A User's Manual

55 Initial Configuration At initialization, the driver uses the pre-defined defaults values. The following table details the initial configuration of the ADC card. Property Default value Comment Channeli Enable Inputfilter For Bypass=false Notrelevantfor Thebandwidthisfixed.. Verticalrange 5(Volts) 1VonU5309-LVR Verticaloffset 0(Volts) Verticalcoupling DC Trigger source External1 Trigger delay 0(ns) Trigger type Edge Trigger coupling DC Trigger level 0(Volts) Trigger slope Positive Interleave Disable Mode Normal(DGT) Samplingrate DependsonSRxoption Sampleclock Internal Sampleclockexternalfrequency DependsonSRxoption ExternalClockandReference(page17) Sampleclockexternaldivider DependsonSRxoption Fixed(Sampleclockexternalfrequency/ Samplingrate) Referenceoscillator Internal Referenceoscillator frequency 100MHz Fixed Recordsize 1024 Number ofrecordstoacquire 1 Number ofaverages 1 for AVG andPKD modeonly

immediately to the instrument hardware. Specifically, this means that setting any property/attribute only changes the 'setup' in the driver, and an explicit call to ApplySetup is required to implement the change in the instrument hardware. There are some exceptions for 'actions': being methods/functions that perform an action which e.g. modifies also the instrument's state. The following methods WILL perform an implicit ApplySetup before the actual action: Actions with implicit ApplySetup Method name Description SelfTest Toinsuretheinstrumentisactuallyinthedesiredstatebeforedoingtheselftest. SelfCalibrate Toinsuretheinstrumentisactuallyinthedesiredstatebeforeself-calibrating. Initiate Toapplytheconfiguredsetuptotheinstrumenthardwarebeforestartingthemeasurement. Read AllReadmethodsstartbyperforminganInitiatefollowedbyWaitandthenFetch. Reset PlacestheinstrumentinaknownstateandconfiguresinstrumentoptionsonwhichtheIVIspecific driver depends. ResetWithDefaults DoestheequivalentofResetandthen,(1) disablesclassextensioncapabilitygroups,(2) setsattrib- utestoinitialvaluesdefinedbyclassspecs,and(3) configuresthedriver tooptionstringsettings usedwhenInitializewaslastexecuted. 56 U5309A User's Manual

U5309A User's Manual 57 How To ... How to discover the PXI Instrument? 58 How to calibrate the instrument? 59 How to configure and read data on two channels? 62 How to access repeated capabilities ? 63 How to generate a software trigger? 64 How to perform time-interleaving acquisitions? 65 How to set the external trigger? 66 How to perform binary decimation? (depending on firmware) 67 How to load a new firmware? 68 How to optimize NSA settings? 69 How to switch from normal mode acquisition (Multi-record) to averager mode? 70

How to discover the PXI Instrument? The C/C++ code below can be used to discover the PXI instruments on user system and get their VISA addresses. #include #include int main() { ViSession rm = VI_NULL; viOpenDefaultRM( &rm ); ViChar search[] = "PXI?*::INSTR"; ViFindList find = VI_NULL; ViUInt32 count = 0; ViChar rsrc[256]; ViStatus status = viFindRsrc( rm, search, &find, &count, rsrc ); if( status==VI_SUCCESS && count>0 ) { do { printf( "Found: \"%s\"\n", rsrc ); status = viFindNext( find, rsrc ); } while( status==VI_SUCCESS ); viClose( find ); } else if( count==0 ) { printf( "No PXI instrument found\n" ); } viClose( rm ); return 0; } 58 U5309A User's Manual

U5309A User's Manual 59 How to calibrate the instrument? Calibration principle The card is initialized without calibration. A calibration is mandatory before making any acquisition to guarantee measurement accuracy. MD3 driver prevents an acquisition from being performed unless a self-calibration has first been completed. Since a full internal calibration of a ADC card can be time consuming because of the many possible configuration states, the self-calibration is performed only for the current configuration state. A new self- calibration is required after every change of configuration of the instrument. See Calibration(page19) section. Running fast calibration The function SelfCalibrate should be used to perform a fast calibration. As explained above, a calibration is required after every acquisition parameter modification (e. g. full scale range, filter, sample rate, ...). The IAqMD3Calibration..::.IsRequired IVI.NET property or the AQMD3_ATTR_ CALIBRATION_IS_REQUIRED IVI-C attribute can be used to check if a new self calibration is required . MD3 Smart-calibration The smart calibration implemented in MD3 drivers allows to save time by automatically saving and restoring calibration information from any self-calibration performed since the beginning of the session. When the acquisition parameters are changed, no re-calibration of the instrument is necessary if a self-calibration has already been performed with the same acquisition conditions (i.e. the same set of parameters), unless the clock mode parameters are changed. Indeed, any change in the clock mode parameters (i.e. External clock frequency, Clock source or Reference mode parameters), induces a restart of the clocks which requires a new self-calibration. Parameter change requiring a new self calibration The table below lists the parameters that require a new self calibration of the instrument when changed. Group Parameter Calibration required A Acquisition Samplingrate Onlythe1sttime,for anidentical setofparameter values. A Channel(i) parameters Verticalrange Inputfilter Bypass(Yes/No) Interleave(Enableor not) B Trigger Trigger source Onlythe1sttime C Clockmode Externalclockfrequency Eachtimethisparameter changes Clocksource Eachtimethisparameter changes Referencemode(External or InternalReference) Eachtimethisparameter changes The channel parameters are calibrated independently per channel.

Saving and restoring calibration setup It is also possible to save calibration parameters and restore them during future sessions. The function IAqMD3Calibration SaveToFile allows to save in a single file the calibration values from all calibrations done in the current user session (IVIIVI.NET method: IAqMD3Calibration.SaveToFile, IVI-C function: AqMD3_CalibrationSaveToFile). In the next session, after performing a single calibration, user can restore all the saved calibration values using Calibration Load From File function (IVI.NET method: IAqMD3Calibration.LoadFromFile, IVI-C function: AqMD3_CalibrationLoadFromFile). To guarantee acquisition accuracy, at least one calibration with the chosen clock mode and trigger source (group B and C) has to be performed when starting a new session.Thus the Save and Load functions, only apply to Acquisition sampling rate and Channel parameters (group A). Only these parameters can be re-used between sessions. Save and restore procedure User can generate a set of calibration values and store the calibrated configurations: 1. Open a session to the module and put it into operating conditions 2. Calibrate the module in all desired configurations 3. Call Calibration SaveToFile to store the calibration state of all calibrated configurations 4. Close the module session. Then the previously saved calibration states could be re-used: Open a session to the module Configure required the clocking mode and trigger source (internal sample clock / external sample clock / external reference oscillator) Call SelfCalibrate once for each trigger source user intends to use Call Calibration LoadFromFile to restore the previously saved calibration state The calibration state loaded from the file which best matches the current configuration and tem- perature will be used for acquisitions If the clock mode (Reference Oscillator Source or Sample Clock Source) is changed, steps 3 and 4 have to be repeated. Driver interfaces and functions The interfaces/methods/properties (functions/attributes) listed below are provided by the Acqiris MD3 driver. Detailed help may be found in the Please refer to AqMD3.chm (IVI-C) or Acqiris.AqMD3.Fx40.chm (IVI.NET) from Start > All programs > Acqiris MD3 ADC card > AqMD3 IVI Driver Help. 60 U5309A User's Manual

U5309A User's Manual 61 IVI.NET Interface Method / Property name IAqMD3Calibration IsRequired SelfCalibrate SaveToFile LoadFromFile IVI-C Functions AqMD3_SelfCalibrate AqMD3_CalibrationLoadFromFile AqMD3_CalibrationSaveToFile Attributes AQMD3_ATTR_CALIBRATION_IS_REQUIRED

How to configure and read data on two channels? To configure and read the data on two channels, user should: 1) Configure two channels. For instance: //configure channel1 driver.Channels["Channel1"].Configure(range, offset, coupling, true); //configure channel2 driver.Channels["Channel2"].Configure(range_ch2, offset_ch2, coupling, true); 2) Readout both channels. For instance: // Fetch acquired data. // Giving a null pointer as data array to the fetch function means the driver will allocate the proper amount of memory during // the fetch call. Ivi.Digitizer.IWaveformCollection waveformsCh1 = null; Ivi.Digitizer.IWaveformCollection waveformsCh2 = null; waveformsCh1 = driver.Channels ["Channel1"].MultiRecordMeasurement.FetchMultiRecordWaveform(firstRecord, numRecords, offsetWithinRecord, numPointsPerRecord, waveformsCh1 ); //fetch the data on channel 2 waveformsCh2 = driver.Channels ["Channel2"].MultiRecordMeasurement.FetchMultiRecordWaveform(firstRecord, numRecords, offsetWithinRecord, numPointsPerRecord, waveformsCh2 ); 62 U5309A User's Manual

U5309A User's Manual 63 How to access repeated capabilities ? For U5309A, the AqMD3 driver supports the following repeated capabilities with pre-defined values detailed in following table. Repeated capability Available instance name Channel "Channeli",withi=[1-2]or =[1-8]dependingon-CH2or -CH8option. TriggerSource "Internali",withi=[1-2]or =[1-8]dependingon-CH2or -CH8option, "External1","Software","Immediate", "SelfTrigger" (for AVG,PKD mode) ArmSource Notsupported LogicDevice For -FDKoptiononly: "DPUA" PrivateFirmware Notaccessible PrivateStore Notaccessible ControlIO1 "ControlIO1","ControlIO2","ControlIO3" DelayControl Notsupported LogicDeviceIFDL(Inter FPGA DataLink) Notsupported LogicDeviceMemoryBank For -FDKoptiononly: "DPUA:DDR3A","DPUA:DDR3B" MonitoringValue These parameters are for information only or can be used for debugging pur- pose. The are accessible through the MD3 SFP or the command below. For details, please refer to Please refer to AqMD3.chm (IVI-C) or Acqiris.AqMD3.Fx40.chm (IVI.NET) . Stream Notsupported The number of instances and their names however can be queried from the driver: Using the AqMD3 IVI.NET driver: Collection Interfaces have a Count property. Instances interface have Name property. User can iterate over all collection instances using .NET foreach loop control. Using the AqMD3 IVI-C driver: For each repeated capability Xxx, there is a AqMD3_ATTR_XXX_COUNT attribute and a AqMD3_ GetXxxName function (e.g. AqMD3_ATTR_CHANNEL_COUNT attribute and AqMD3_ GetChannelName function).

How to generate a software trigger? A call to function AqMD3_SendSoftwareTrigger (IVI-C) or to method IAqMD3Trigger.SendSoftwareTrigger (IVI.NET) sends a single software trigger. They need to be called as many times as they are incomplete records. 64 U5309A User's Manual

U5309A User's Manual 65 How to perform time-interleaving acquisitions? It is possible to combine two channels and to perform an acquisition at higher sampling rate. The following example give the function calls used to: combine the two channels, use channel 1 and set the sampling rate to GS/s Channels time-interleaving (IVI.NET) driver.Channels[L"Channel1"].TimeInterleavedChannelList = "Channel2"; spDriver->Acquisition->SampleRate = e9; Channels time-interleaving (IVI-C) AqMD3_SetAttributeViString(session, "Channel1", AQMD3_ATTR_TIME_ INTERLEAVED_CHANNEL_LIST, "Channel2"); AqMD3_SetAttributeViReal64(session, "", AQMD3_ATTR_SAMPLE_RATE, e9); In order to disable interleaveaving, the following code can be used: Channels time-interleaving (IVI.NET) driver.Channels[L"Channel1"].TimeInterleavedChannelList = ""; Channels time-interleaving (IVI-C) AqMD3_SetAttributeViString(session, "Channel1", AQMD3_ATTR_TIME_ INTERLEAVED_CHANNEL_LIST, "");

How to set the external trigger? To set the trigger source to External1 and configure the trigger level, the following commands can be used IVI-C: AqMD3_SetAttributeViString(session, "", AQMD3_ATTR_ACTIVE_TRIGGER_SOURCE, "External1"); AqMD3_SetAttributeViReal64(session, "External1", AQMD3_ATTR_TRIGGER_LEVEL, level); IVI.NET: spDriver->Trigger->ActiveSource = "External"; IAqMD3TriggerSourcePtr spTrigSrc = spDriver->Trigger->Sources->Item [L"External1"]; spTrigSrc->Level = level; //in volts The different trigger sources are listed in the section How toaccessrepeatedcapabilities?(page63). 66 U5309A User's Manual

U5309A User's Manual 67 How to perform binary decimation? (depending on firmware) The binary decimation is not supported for all combinations of firmware, channel configuration and sampling rate. It is supported only with the digitizer (-DGT) or TSR (-TSR) mode. It is not supported in Averager (-AVG) or Peak Detection (-PKD) mode. The available decimation factors depend on the channel configuration (-CHx) and sampling rate (-SRx) options of your digitizer. Please refer to DataAcquisition(page9)section for more information. Using the AqMD3 IVI.NET driver: To use the binary decimation and set the sample rate to a lower value use the SampleRate property. sampleRate = 200e6; driver.Acquisition.SampleRate = sampleRate; Using the AqMD3 IVI-C driver: To use the binary decimation and set the sample rate to a lower value use the AQMD3_ATTR_SAMPLE_ RATE attribute. sampleRate = 200e6; status=AqMD3_SetAttributeViReal64(session,””, AQMD3_ATTR_SAMPLE_ RATE,sampleRate);

How to load a new firmware? The on-board FPGAs (field-programmable gate arrays) contain processor logic needed to efficiently execute several crucial functions. They will be automatically programmed at startup before calibration. 68 U5309A User's Manual

U5309A User's Manual 69 How to optimize NSA settings? The following procedure can be used to find the optimal settings using MD3 SFP. The same type of the procedure can be executed from a program. First of all the NSA should always be used in conjunction with the Baseline Stabilization on U5309A. Optimizing the NSA parameters Parameters (Channels2.Item2.Accumulation.NSA interface): 1. Enabled: Specifies whether the Noise Suppressed Accumulation is active 2. NoiseBase: Specifies the noise base value for the Noise Suppressed Accumulation. The noise base is subtracted from data values which are higher than the configured threshold. This parameter is defined per channel in ADC counts in the range 0 to 8191 LSB. 3. Threshold: Specifies the threshold of the Noise Suppressed Accumulation. Each data value must exceed the threshold value to be entered into the sum. This parameter is defined per channel in ADC counts in the range 0 to 8191 LSB. The NoiseBase should be equal to 0 The Threshold should be roughly 3 sigma (3 times the standard deviation noted in the previous step) + DigitalOffset as set at the previous step (100). In the following picture the assumption is that DigitalOffset was set = 100 and the standard deviation is 4, e.i the threshold is 100 + 3*4 = 112. Now you can set the number of averages to a number which is convenient for you (for example 1000 averages/accumulations) and your low intensity peak should stand out from the baseline noise. The procedure shown is valid for positive peaks. If your peaks are negative, they can be digitally inverted via the data inversion parameter in the channel configuration.

How to switch from normal mode acquisition (Multi-record) to averager mode? If you perform acquisition in standard digitizer mode using multi-records and then want to switch to averager mode, you may have the following exception: "AqMD3: Invalid value '1' for method 'put_Mode', parameter 'Acquisition Mode'. Multi- record acquisitions not supported for Acquisition Mode Averager or PeakDetection.IDispatch error #28176" The averager mode is supported with a single record only. When you want to change the acquisition mode from the multi-record to the averager mode (or peak-detection), you need to set the NumRecordsToAcquire parameter to 1 before changing the acquisition mode. If you attempt to set a configuration that is not valid, the driver returns an error and does not apply any changes. For instance, you can proceed using following instructions: Set the NumRecordsToAcquire = 1 driver.Acquisition.NumRecordsToAcquire = 1; Then change the acquisition mode to averager driver.Acquisition.Mode = AcquisitionMode.Averager; 70 U5309A User's Manual

71 Utilities This section describes supplied programs which may be used to configure various aspects of your instruments. ADC card Verification Utility (AqMD3Verify) The AqMD3Verify utility verifies the card status: This utility proposes the user to connect a precise simple reference signal, and then, it compares the ADC card acquisition of this reference signal with reference signal expected values. This utility checks the version of control FPGA firmware already loaded. If necessary, it proposes to update the firmware using the "Firmware Update Utility". You can launch AqMD3Verify from the start menu. AqMD3Verify requests the user to connect a reference signal and then to press any key to continue (as shown in the window below) AqMD3Verify checks the version of control FPGA firmware already loaded, and if necessary, proposes the user to update the firmware, automatically using the "Firmware Update Utility" (As shown in the window below : Accept the FPGA update answering "y")

When the version of control FPGA firmware is updated and successful, please power off your computer, restart it again for the update to take effect, and process AqMD3Verify tool as described in this section. 72 U5309A User's Manual

U5309A User's Manual 73 Electrical & Environmental Specifications For full specifications, please refer to the product datasheet.

A. Coherent Sampling refers to the relationship between the input frequency Fin, sampling frequency Fs, number of cycles in the sampled set and the number of samples. With coherent sampling one is assured that the signal power in an FFT is contained within one FFT bin (assuming a single input tone). The condition for coherent sampling is given by: Fin/Fs=Ncycles/Nsamples For example if we have Nsamples = 211, and fs = 100e6, and we expect and input frequency close to fs/2, let's say fin = 44 MHz, then Ncycles = 901.12 which is close to an integer. We could therefore round down to Ncycles = 901 and we would get fin = 43.994140625 Mhz, which is an input frequency that satisfies coherent sampling. The integer number should be chosen carefully. We have three possible types of integers, even, odd, and prime. Even is not a good idea since we would hit the same code every Msamples, where M can be much less than N. Odd is a better idea since it takes longer to hit the same code. According to some sources a prime number of cycles is the best (with the exception of the prime 2) because it takes a long time before the same code repeats. —————————————————————— Q. How to manage the internal temperature? A. The operating temperature of the U5309A as specified in the datasheet Data sheet, is the PC internal ambient temperature at intake of the ADC card's fan The effective temperature limit is fixed by the maximum internal DPU temperature which should stay below 85°C to guarantee FPGA proper operating. This DPU FPGA core Temperature (or junction temperature Tj) can be monitored from the MD2 SFP or using the function BoardTemperature (IVI.NET) / AqMD3_QueryBoardTemperature (IVI-C). The ADC card's fan speed is controlled with the internal temperature, it maintains the FPGA core temperature below 85°C. Note that the temperatures in channel ADCs (given by ChannelTemperature (IVI.NET) / AqMD3_ ChannelTemperature (IVI-C)) can reach 100°C in standard operating mode. —————————————————————— Q. What are the differences between the various data streaming firmware options supported by high-speed ADC cards ? A. Acqiris High-Speed Digitizers offer various acquisition modes depending on user requirements. Definitions 74 U5309A User's Manual

75 DGT: standard DiGiTizer mode. TSR: Triggered Simultaneous acquisition and Readout. CSR: Continuous Simultaneous acquisition and Readout. Supported models The supported firmware options depend on ADC card model and are summarized in the table below. Module DGT (no-option) TSR CSR CST U5303A √ √ √ U5309A √ √ U5310A √ √ Acquisition modes With standard DGT mode acquisition and readout are sequential, whereas CSR, TSR and CST options allows simultaneous acquisition and readout. DGT, TSR and CSR modes allow triggered multiple records. CSR, TSR and CST options enable longer acquisition duration when compared with standard DGT options since they offers simultaneous gapless acquisition and readout. Especially, TSR and CST options are dedicated to application applications requiring no trigger loss. Indeed, only TSR or CST allows gap between the records. When performing continuous gapless acquisition, CSR option is recommended. Output format With TSR, output data includes acquired data and decoded trigger timestamps (i.e. Acquired data are fetched as standard IVI waveforms, same as with DGT mode). With CST or CSR, user get raw data in output. User can read in output two data streams independently: raw acquired data and trigger information (absolute trigger position). Data transfer rate The data transfer performance is higher with CST or CSR and data transfer performance independent of trigger settings / record size. ——————————————————————

A. Hibernation while the ADC card is in operation is not supported. Recommendation is to close the ADC card before the host computer is allowed to go into hibernation. There are many situations where equipment should go into hibernation mode. If the system allows hibernation for saving power, then the ADC card should also be powered down. If user system is capable of managing hibernation, then when the application code decides/detects that the system should go into hibernation, it can close the ADC card, and re-initialize it when it wakes up from hibernation. After powering down, when turned on the ADC card, a reload of the FPGA (several seconds) and a self- calibration are required. 76 U5309A User's Manual

77 General information Safety Notes The following safety precautions should be observed before using this product and any associated instrumentation. This product is intended for use by qualified personnel who recognize shock hazards and are familiar with the safety precautions required to avoid possible injury. Read and follow all installation, operation, and maintenance information carefully before using the product. If this product is not used as specified, the protection provided by the equipment could be impaired. This product must be used in a normal condition (in which all means for protection are intact) only. The types of product users are: Responsible body is the individual or group responsible for the use and maintenance of equipment, for ensuring that the equipment is operated within its specifications and operating limits, and for ensuring operators are adequately trained. Operators use the product for its intended function. They must be trained in electrical safety procedures and proper use of the instrument. They must be protected from electric shock and contact with haz- ardous live circuits. Service personnel are trained to work on live circuits, perform safe installations, and repair products. Only properly trained service personnel may perform installation and service procedures. Operator is responsible to maintain safe operating conditions. To ensure safe operating conditions, cards should not be operated beyond the full temperature range specified in the datasheet. Exceeding safe operating conditions can result in shorter lifespans, improper card performance and user safety issues. When the cards are in use and operation within the specified full temperature range is not maintained, card surface temperatures may exceed safe handling conditions which can cause discomfort or burns if touched. In the event of a card exceeding the full temperature range, always allow the card to cool before touching or removing cards from host computer or chassis. Acqiris products are designed for use with electrical signals that are rated Measurement Category I and Measurement Category II, as described in the International Electrotechnical Commission (IEC) Standard IEC 60664. Most measurement, control, and data I/O signals are Measurement Category I and must not be directly connected to mains voltage or to voltage sources with high transient over- voltages. Measurement Category II connections require protection for high transient over-voltages often associated with local AC mains connections. Assume all measurement, control, and data I/O connections are for connection to Category I sources unless otherwise marked or described in the user documentation. Exercise extreme caution when a shock hazard is present. Lethal voltage may be present on cable connector jacks or test fixtures. The American National Standards Institute (ANSI) states that a shock hazard exists

expect that hazardous voltage is present in any unknown circuit before measuring. Operators of this product must be protected from electric shock at all times. The responsible body must ensure that operators are prevented access and/or insulated from every connection point. In some cases, connections must be exposed to potential human contact. Product operators in these circumstances must be trained to protect themselves from the risk of electric shock. If the circuit is capable of operating at or above 1000V, no conductive part of the circuit may be exposed. Do not connect switching cards directly to unlimited power circuits. They are intended to be used with impedance-limited sources. NEVER connect switching cards directly to AC mains. When connecting sources to switching cards, install protective devices to limit fault current and voltage to the card. Before operating an instrument, ensure that the line cord is connected to a properly-grounded power receptacle. Inspect the connecting cables, test leads, and jumpers for possible wear, cracks, or breaks before each use. When installing equipment where access to the main power cord is restricted, such as rack mounting, a separate main input power disconnect device must be provided in close proximity to the equipment and within easy reach of the operator. For maximum safety, do not touch the product, test cables, or any other instruments while power is applied to the circuit under test. ALWAYS remove power from the entire test system and discharge any capacitors before: connecting or disconnecting cables or jumpers, installing or removing switching cards, or making internal changes, such as installing or removing jumpers. Do not touch any object that could provide a current path to the common side of the circuit under test or power line (earth) ground. Always make measurements with dry hands while standing on a dry, insulated surface capable of withstanding the voltage being measured. The instrument and accessories must be used in accordance with its specifications and operating instructions, or the safety of the equipment may be impaired. Do not exceed the maximum signal levels of the instruments and accessories, as defined in the specifications and operating information, and as shown on the instrument or test fixture panels, or switching card. If you are using a test fixture, keep the lid closed while power is applied to the device under test. Safe operation requires the use of a lid interlock. Cards and accessories shall not be connected to humans. Before performing any maintenance, disconnect the line cord and all test cables. Any part or component replacement must be done by Acqiris. No operator serviceable parts inside. Refer servicing to qualified personnel. To prevent electrical shock do not remove covers. 78 U5309A User's Manual

79 Cleaning Precautions To prevent electrical shock, disconnect the instrument from mains before cleaning. Use a dry cloth or one slightly dampened with water to clean the external case parts. Do not attempt to clean internally. To clean the connectors, use alcohol in a well- ventilated area. Allow all residual alcohol moisture to evaporate, and the fumes to dissipate prior to energizing the instrument. Product Markings The CE mark is a registered trademark of the European Community. Australian Communication and Media Authority mark to indicate regulatory compliance as a registered supplier. This symbol indicates product compliance with the Canadian Interference-Causing Equipment Standard (ICES- 001). It also identifies the product is an Industrial Scientific and Medical Group 1 Class A product (CISPR 11, Clause 4). South Korean Class A EMC Declaration. this equipment is Class A suitable for professional use and is for use in electromagnetic environments outside of the home. A 급기기( 업무용방송통신기자재) 이기기는업무용(A 급) 전자파적합기기로서판매자또는사용자는이 점을주의하시기바라며, 가정외의지역에서사용하는것을목적으로합니다. This symbol on an instrument means caution, risk of danger. You should refer to the operating instructions located in the user documentation in all cases where the symbol is marked on the instrument.

that you must not discard this electrical/electronic product in domestic household waste. Product Category: With reference to the equipment types in the WEEE directive Annex 1, this product is classified as “Monitoring and Control instrumentation” product. Do not dispose in domestic household waste. To return unwanted products, contact your local Acqiris office. This symbol indicates the time period during which no hazardous or toxic substance elements are expected to leak or deteriorate during normal use. Forty years is the expected useful life of the product. This symbol indicates the instrument is sensitive to electrostatic discharge (ESD). ESD can damage the highly sensitive components in your instrument. ESD damage is most likely to occur as the module is being installed or when cables are connected or disconnected. Protect the circuits from ESD damage by wearing a grounding strap that provides a high resistance path to ground. Alternatively, ground yourself to discharge any built-up static charge by touching the outer shell of any grounded instrument chassis before touching the port connectors. This symbol denotes a hot surface. The side cover of the module will be hot after use and should be allowed to cool for several minutes. 80 U5309A User's Manual

81 Related Documentation All documentation relating to your ADC card may be found either from the DVDs supplied with your product, or from www.acqiris.com. If you have run the Acqiris MD3 software installer on your PC, the related product documentation has been installed to your hard drive. Document Description Startup Guide Includes procedures to help you to unpack, inspect, install (software and hardware), perform instrument connections, verify operation,andtroubleshootyour product. User Manual Provides in-depth information and reference material specific to your ADC cardproduct Data Sheet In addition to a detailed product introduction, the data sheet suppliesfullproductspecifications. Soft Front Panel (help system) ProvidesinformationontheuseoftheSoftFrontPanel. LabVIEW Driver reference (help system) ProvidesdetaileddocumentationoftheLabVIEWG driver API functions. IVI Driver reference (help system) Provides detailed documentation of the IVI.NET and IVI-C driver API functions, as well as information to help you get started with usingtheIVIdriversinyour applicationdevelopmentenvironment. Full Product Family This help file has been organized to allow easy access by arranging the product lines under their form factors listed below: PCI Express ADC cards The products in the industry standard PCI Express format benefit from the very high data transfer rates of the PCIe interface, and occupying a single slot in a host PC. They also feature programmable on-board processing capabilities. Acqiris Model Number Model Name U1084A 8-bitPCIeHigh-speedPCIeADC cardwithon-boardsignalprocessing U5303A 12-bitPCIeHigh-speedADC cardwithon-boardsignalprocessing U5309A 8-bitPCIeHigh-SpeedADC cardwithon-boardsignalprocessing U5310A 10-bitPCIeHigh-SpeedADC cardwithon-boardsignalprocessing Note: That the U1084A product utilizes PCIe Gen 1.1 and a x4 slot, whereas the U53xx series support PCIe Gen 2.0 and a x8 slot. PXI Express High-Speed ADC cards This product line is composed of Acqiris PXI Express high-speed ADC cards.

These are PXI Express compliant, using either a PXIe or PXIe Hybrid slot. Designed to benefit from fast data interfaces, the products can be integrated with other test and automation modules in PXIe and Hybrid chassis slots. The PXI format offers high performance in a small, rugged package. It is an ideal deployment platform for many automated test systems Acqiris Model Number Model Name U5203A PXIExpress12-bitHigh-SpeedDigitizer 82 U5309A User's Manual

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