Silicon Laboratories Si4704 Series Programming Manual

Copyright © 2008 by Silicon Laboratories AN332 Silicon Laboratories Confidential. Information contained herein is covered under non-disclosure agreement (NDA). AN332 Si4704/05/06/07/1X/2X/3X/4X FM TRANSMITTER/ AM/FM/SW/LW/WB RECEIVER PROGRAMMING GUIDE 1. Introduction 1.1. Scope This document provides an overview of the programming requirements for the Si4704/05/06/1x/2x/3x/4x FM transmitter/AM/FM/SW/LW/WB receiver. The hardware control interface and software commands are detailed along with several examples of the required steps to configure the device for various modes of operation. 2. Overview This family of products is programmed using commands and responses. To perform an action, the system controller writes a command byte and associated arguments, causing the device to execute the given command. The device will, in turn, provide a response depending on the type of command that was sent. "4. Commands and Responses" on page 5 and "5. Commands and Properties" on page 6 describe the procedures for using commands and responses and provide complete lists of commands, properties, and responses. The device has a slave control interface that allows the system controller to send commands to and receive responses from the device using one of three serial protocols (or bus modes): 2-wire mode (I2C and SMBUS compatible), 3-wire mode, or SPI mode. "6. Control Interface" on page 168 describes the control interface in detail. "7. Powerup" on page 176 describes options for the sequencing of VDD and VIO power supplies, selection of the desired bus mode, provision of the reference clock, RCLK, and sending of the POWER_UP command. "8. Powerdown" on page 182 describes sending the POWER_DOWN command and removing VDD and VIO power supplies as necessary. "9. Digital Audio Interface" on page 183 describes the digital audio format supported and how to operate the device in digital mode. "10. Timing" on page 186 describes the CTS (Clear to Send) timing indicating when the command has been accepted and in most cases completed execution, and the STC (Seek/Tune Complete) timing indicating when the Seek/Tune commands have completed execution. "11. FM Transmitter" on page 191 describes the audio dynamic range control, limiter, pre-emphasis, recommendations for maximizing audio volume for the FM transmitter. "12. Programming Examples" on page 195 provides flowcharts and step-by-step procedures for programming the device.

Table 1. Product Family Function Part Number General Description FM Transmitter FM Receiver AM Receiver SW/LW Receiver WB Receiver RDS High Performance RDS RPS SAME Digital Input Digital Output Embedded FM antenna AEC-Q100 Qualified Package Size (mm) Si4700 FM Receiver � 4x4 Si4701 FM Receiver with RDS � � 4x4 Si4702 FM Receiver � 3x3 Si4703 FM Receiver with RDS � � 3x3 Si4704 FM Receiver � � 3x3 Si4705 FM Receiver with RDS � � � � 3x3 Si4706 High Performance RDS Receiver � � � � 3x3 Si4707 WB Receiver with SAME � � 3x3 Si4710 FM Transmitter � � � 3x3 Si4711 FM Transmitter with RDS � � � � 3x3 Si4712 FM Transmitter with RPS � � � � 3x3 Si4713 FM Transmitter with RDS & RPS � � � � � 3x3 Si4720 FM Transceiver � � � � � 3x3 Si4721 FM Transceiver with RDS � � � � � � � 3x3 Si4730 AM/FM Receiver � � 3x3 Si4731 AM/FM Receiver with RDS � � � � 3x3 Si4734 AM/SW/LW/FM Receiver � � � 3x3 Si4735 AM/SW/LW/FM Receiver with RDS � � � � � 3x3 Si4736 AM/FM/WB Receiver � � � 3x3 Si4737 AM/FM/WB Receiver with RDS � � � � � 3x3 Si4738 FM/WB Receiver � � 3x3 Si4739 FM/WB Receiver with RDS � � � � 3x3 Si4740 AM/FM Receiver � � � 4x4 Si4741 AM/FM Receiver with RDS � � � � 4x4 Si4749 High-Performance RDS Receiver � � 4x4

3 TABLE OF CONTENTS 1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 1.1. Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 2. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 3. Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 4. Commands and Responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 5. Commands and Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 5.1. Commands and Properties for the FM/RDS Transmitter (Si4710/11/12/13/20/21) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 5.2. Commands and Properties for the FM/RDS Receiver (Si4704/05/06/2x/3x/4x) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 5.3. Commands and Properties for the AM/SW/LW Receiver (Si4730/31/34/35/36/37/40/41) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .103 5.4. Commands and Properties for the WB Receiver (Si4707/36/37/38/39) . . . . . . . . .136 6. Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .168 6.1. 2-Wire Control Interface Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .168 6.2. 3-Wire Control Interface Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .171 6.3. SPI Control Interface Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .174 7. Powerup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .176 7.1. Powerup from Device Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .177 7.2. Powerup from a Component Patch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .178 8. Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .182 9. Digital Audio Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .183 10. Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .186 11. FM Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .191 11.1. Audio Dynamic Range Control for FM Transmitter . . . . . . . . . . . . . . . . . . . . . . . .191 11.2. Audio Pre-emphasis for FM Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .192 11.3. Audio Limiter for FM Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .193 11.4. Maximizing Audio Volume for FM Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . .193 12. Programming Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .195 12.1. Programming Example for the FM/RDS Transmitter . . . . . . . . . . . . . . . . . . . . . .195 12.2. Programming Example for the FM/RDS Receiver . . . . . . . . . . . . . . . . . . . . . . . .213 12.3. Programming Example for the AM/SW/LW Receiver . . . . . . . . . . . . . . . . . . . . . .235 12.4. Programming Example for the WB/SAME Receiver . . . . . . . . . . . . . . . . . . . . . . .246 Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .254 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .256

3. Terminology � SEN—Serial enable pin, active low; used as device select in 3-wire and SPI operation and address selection in 2-wire operation. � SDIO—Serial data in/data out pin. � SCLK—Serial clock pin. � RST or RSTb—Reset pin, active low � RCLK—External reference clock � GPO—General purpose output � CTS—Clear to send � STC—Seek/Tune Complete � NVM—Non-volatile internal device memory � Device—Refers to the FM Transmitter/AM/FM/SW/LW/WB Receiver � System Controller—Refers to the system microcontroller � CMD—Command byte � COMMANDn—Command register (16-bit) in 3-Wire mode (n = 1 to 4) � ARGn—Argument byte (n = 1 to 7) � STATUS—Status byte � RESPn—Response byte (n = 1 to 15) � RESPONSEn—Response register (16-bit) in 3-Wire mode (n = 1 to 8)

5 4. Commands and Responses Commands control actions, such as power up, power down, or tune to a frequency, and are one byte in size. Arguments are specific to a given command and are used to modify the command. For example, after the TX_TUNE_FREQ command, arguments are required to set the tune frequency. Arguments are one byte in size, and each command may require up to seven arguments. Responses provide the system controller status information and are returned after a command and its associated arguments are issued. All commands return a one byte status indicating interrupt state and clear-to-send the next command. Commands may return up to 15 additional response bytes. A complete list of commands is available in “5. Commands and Properties”. Table 2 shows an example of tuning to a frequency using the TX_TUNE_FREQ command. This command requires that a command and three arguments be sent and returns one status byte. The table is broken into three columns. The first column lists the action taking place: command (CMD), argument (ARG), status (STATUS), or response (RESP). The second column lists the data byte or bytes in hexadecimal that are being sent or received. An arrow preceding the data indicates data being sent from the device to the system controller. The third column describes the action. Properties are special command arguments used to modify the default device operation and are generally configured immediately after power-up. Examples of properties are TX _PREEMPHASIS and REFCLK_FREQ. A complete list of properties is available in “5. Commands and Properties”. Table 3 shows an example of setting the REFCLK frequency using the REFCLK_FREQ property by sending the SET_PROPERTY command and five argument bytes. ARG1 of the SET_PROPERTY command is always 0x00. ARG2 and ARG3 are used to select the property number, PROP (0x0201 in this example), and ARG4 and ARG5 are used to set the property value, PROPD (0x8000 or 32768 Hz in the example). The implementation of the command and response procedures in the system controller differs for each of the three bus modes. Section "6. Control Interface" on page 168 details the required bit transactions on the control bus for each of the bus modes. Table 2. Using the TX_TUNE_FREQ Command Action Data Description CMD 0x30 TX_TUNE_FREQ ARG1 0x00 ARG2 0x27 Set Station to 101.1 MHz ARG3 0x7E (0x277E = 10110 with 10 kHz step size) STATUS →0x80 Reply Status. Clear-to-send high. Table 3. Using the SET_PROPERTY Command Action Data Description CMD 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x02 REFCLK_FREQ ARG3 (PROP) 0x01 ARG4 (PROPD) 0x80 32768 Hz ARG5 (PROPD) 0x00 STATUS →0x80 Reply Status. Clear-to-send high.

5. Commands and Properties There are four different components for these product families: 1. FM Transmitter component 2. FM Receiver component 3. AM/SW/LW component 4. WB component The following four subsections list all the commands and properties used by each of the component. 5.1. Commands and Properties for the FM/RDS Transmitter (Si4710/11/12/13/20/21) The following two tables are the summary of the commands and properties for the FM/RDS Transmitter component applicable to Si4710/11/12/13/20/21. Table 4. FM/RDS Transmitter Command Summary Cmd Name Description 0x01 POWER_UP Power up device and mode selection. Modes include FM transmit and analog/digital audio interface configuration. 0x10 GET_REV Returns revision information on the device. 0x11 POWER_DOWN Power down device. 0x12 SET_PROPERTY Sets the value of a property. 0x13 GET_PROPERTY Retrieves a property’s value. 0x14 GET_INT_STATUS Read interrupt status bits. 0x15 PATCH_ARGS Reserved command used for patch file downloads. 0x16 PATCH_DATA Reserved command used for patch file downloads. 0x30 TX_TUNE_FREQ Tunes to given transmit frequency. 0x31 TX_TUNE_POWER Sets the output power level and tunes the antenna capacitor. 0x32 TX_TUNE_MEASURE Si4712/13/20/21 Only. Measure the received noise level at the specified frequency. 0x33 TX_TUNE_STATUS Queries the status of a previously sent TX Tune Freq, TX Tune Power, or TX Tune Measure command. 0x34 TX_ASQ_STATUS Queries the TX status and input audio signal metrics. 0x35 TX_RDS_BUFF1 Si4711/13/21 Only. Queries the status of the RDS Group Buffer and loads new data into buffer. 0x36 TX_RDS_PS1 Si4711/13/21 Only. Set up default PS strings. 0x80 GPIO_CTL2 Configures GPO1, 2, and 3 as output or Hi-Z. 0x81 GPIO_SET2 Sets GPO1, 2, and 3 output level (low or high). Notes: 1. RDS feature (command TX_RDS_BUFF, TX_RDS_PS and RDS properties 0x2103, 0x2C00 through 2C07) is supported in FMTX component 2.0 or higher. 2. GPIO feature (command GPIO_CTL and GPIO_SET) is fully supported in FMTX component 3.0 or higher. It is partially supported (GPO3 only) in FMTX component 2.0.

7 Table 5. FM Transmitter Property Summary Prop Name Description Default 0x0001 GPO_IEN Enables interrupt sources. 0x0000 0x0101 DIGITAL_INPUT _FORMAT1 Configures the digital input format. 0x0000 0x0103 DIGITAL_INPUT _SAMPLE_RATE1 Configures the digital input sample rate in 1 Hz steps. Default is 0. 0x0000 0x0201 REFCLK_FREQ Sets frequency of the reference clock in Hz. The range is 31130 to 34406 Hz, or 0 to disable the AFC. Default is 32768 Hz. 0x8000 0x0202 REFCLK_PRESCALE Sets the prescaler value for the reference clock. 0x0001 0x2100 TX_COMPONENT_ENABLE Enable transmit multiplex signal components. Default has pilot and L-R enabled. 0x0003 0x2101 TX_AUDIO_DEVIATION Configures audio frequency deviation level. Units are in 10 Hz increments. Default is 6825 (68.25 kHz). 0x1AA9 0x2102 TX_PILOT_DEVIATION Configures pilot tone frequency deviation level. Units are in 10 Hz increments. Default is 675 (6.75 kHz) 0x02A3 0x2103 TX_RDS_DEVIATION2 Si4711/13/21 Only. Configures the RDS/RBDS fre- quency deviation level. Units are in 10 Hz increments. Default is 2 kHz. 0x00C8 0x2104 TX_LINE_INPUT_LEVEL Configures maximum analog line input level to the LIN/RIN pins to reach the maximum deviation level programmed into the audio deviation property TX Audio Deviation. Default is 636 mVPK. 0x327C 0x2105 TX_LINE_INPUT_MUTE Sets line input mute. L and R inputs may be indepen- dently muted. Default is not muted. 0x0000 0x2106 TX_PREEMPHASIS Configures pre-emphasis time constant. Default is 0 (75 µS). 0x0000 0x2107 TX_PILOT_FREQUENCY Configures the frequency of the stereo pilot. Default is 19000 Hz. 0x4A38 0x2200 TX_ACOMP_ENABLE3 Enables audio dynamic range control and limiter. Default is 2 (limiter is enabled, audio dynamic range control is disabled). 0x0002 0x2201 TX_ACOMP_THRESHOLD Sets the threshold level for audio dynamic range con- trol. Default is –40 dB. 0xFFD8 0x2202 TX_ACOMP_ATTACK_TIME Sets the attack time for audio dynamic range control. Default is 0 (0.5 ms). 0x0000 0x2203 TX_ACOMP_RELEASE_TIME Sets the release time for audio dynamic range control. Default is 4 (1000 ms). 0x0004 Notes: 1. Digital Audio Input feature (property DIGITAL_INPUT_FORMAT and DIGITAL_INPUT_SAMPLE_RATE) is supported in FMTX component 2.0 or higher. 2. RDS feature (command TX_RDS_BUFF, TX_RDS_PS and RDS properties 0x2103, 0x2C00 through 2C07) is supported in FMTX component 2.0 or higher. 3. Limiter feature (LIMITEN bit in TX_ACOMP_ENABLE and property TX_LIMITER_RELEASE_TIME) is supported in FMTX component 2.0 or higher.

0x2204 TX_ACOMP_GAIN Sets the gain for audio dynamic range control. Default is 15 dB. 0x000F 0x2205 TX_LIMITER_RELEASE_TIME3 Sets the limiter release time. Default is 102 (5.01 ms) 0x0066 0x2300 TX_ASQ_INTERRUPT_SOURCE Configures measurements related to signal quality metrics. Default is none selected. 0x0000 0x2301 TX_ASQ_LEVEL_LOW Configures low audio input level detection threshold. This threshold can be used to detect silence on the incoming audio. 0x0000 0x2302 TX_ASQ_DURATION_LOW Configures the duration which the input audio level must be below the low threshold in order to detect a low audio condition. 0x0000 0x2303 TX_ASQ_LEVEL_HIGH Configures high audio input level detection threshold. This threshold can be used to detect activity on the incoming audio. 0x0000 0x2304 TX_ASQ_DURATION_HIGH Configures the duration which the input audio level must be above the high threshold in order to detect a high audio condition. 0x0000 0x2C00 TX_RDS_INTERRUPT_SOURCE2 Si4711/13/21 Only. Configure RDS interrupt sources. Default is none selected. 0x0000 0x2C01 TX_RDS_PI2 Si4711/13/21 Only. Sets transmit RDS program identi- fier. 0x40A7 0x2C02 TX_RDS_PS_MIX2 Si4711/13/21 Only. Configures mix of RDS PS Group with RDS Group Buffer. 0x0003 0x2C03 TX_RDS_PS_MISC2 Si4711/13/21 Only. Miscellaneous bits to transmit along with RDS_PS Groups. 0x1008 0x2C04 TX_RDS_PS_REPEAT_COUNT2 Si4711/13/21 Only. Number of times to repeat trans- mission of a PS message before transmitting the next PS message. 0x0003 0x2C05 TX_RDS_PS_MESSAGE_COUNT2 Si4711/13/21 Only. Number of PS messages in use. 0x0001 0x2C06 TX_RDS_PS_AF2 Si4711/13/21 Only. RDS Program Service Alternate Frequency. This provides the ability to inform the receiver of a single alternate frequency using AF Method A coding and is transmitted along with the RDS_PS Groups. 0xE0E0 0x2C07 TX_RDS_FIFO_SIZE2 Si4711/13/21 Only. Number of blocks reserved for the FIFO. Note that the value written must be one larger than the desired FIFO size. 0x0000 Table 5. FM Transmitter Property Summary (Continued) Prop Name Description Default Notes: 1. Digital Audio Input feature (property DIGITAL_INPUT_FORMAT and DIGITAL_INPUT_SAMPLE_RATE) is supported in FMTX component 2.0 or higher. 2. RDS feature (command TX_RDS_BUFF, TX_RDS_PS and RDS properties 0x2103, 0x2C00 through 2C07) is supported in FMTX component 2.0 or higher. 3. Limiter feature (LIMITEN bit in TX_ACOMP_ENABLE and property TX_LIMITER_RELEASE_TIME) is supported in FMTX component 2.0 or higher.

9 Table 6. Status Response Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X X RDSINT ASQINT STCINT Bit Name Function 7 CTS Clear to Send. 0 = Wait before sending next command. 1 = Clear to send next command. 6 ERR Error. 0 = No error 1 = Error 5:3 Reserved Values may vary. 2 RDSINT RDS Interrupt. 0 = RDS interrupt has not been triggered. 1 = RDS interrupt has been triggered. 1 ASQINT Signal Quality Interrupt. 0 = Signal quality measurement has not been triggered. 1 = Signal quality measurement has been triggered. 0 STCINT Seek/Tune Complete Interrupt. 0 = Tune complete has not been triggered. 1 = Tune complete has been triggered.

5.1.1. Commands and Properties for the FM/RDS Transmitter Command 0x01. POWER_UP Initiates the boot process to move the device from powerdown to powerup mode. The boot can occur from internal device memory or a system controller downloaded patch. To confirm that the patch is compatible with the internal device library revision, the library revision should be confirmed by issuing the POWER_UP command with Function = 15 (query library ID). The device will return the response, including the library revision, and then moves into powerdown mode. The device can then be placed in powerup mode by issuing the POWER_UP command with Function = 2 (transmit) and the patch may be applied. Only the STATUS byte will be returned in the response stream in transmit mode. The POWER_UP command configures the state of DIN (pin 13), DFS (pin 14), and RIN (pin 15) and LIN (pin 16) for analog or digital audio modes and GPO2/INT (pin 18) for interrupt operation. The command configures GPO2/INT interrupts (GPO2OEN) and CTS interrupts (CTSIEN). If both are enabled, GPO2/INT is driven high during normal operation and low for a minimum of 1 µs during the interrupt. The CTSIEN bit is duplicated in the GPO_IEN property. The command is complete when the CTS bit (and optional interrupt) is set. Note: To change function (e.g., FM TX to FM RX), issue the POWER_DOWN command to stop the current function; then, issue POWER_UP to start the new function. Command Arguments: Two Response Bytes: None (FUNC = 2), Seven (FUNC = 15) Command Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 0 0 0 0 0 1 ARG1 CTSIEN GPO2OEN PATCH XOSCEN FUNC[3:0] ARG2 OPMODE[7:0] ARG Bit Name Function 1 7 CTSIEN CTS Interrupt Enable. 0 = CTS interrupt disabled. 1 = CTS interrupt enabled. 1 6 GPO2OEN GPO2 Output Enable. 0 = GPO2 output disabled, (Hi-Z). 1 = GPO2 output enabled. 1 5 PATCH Patch Enable. 0 = Boot normally 1 = Copy non-volatile memory to RAM, but do not boot. After CTS has been set, RAM may be patched 1 4 XOSCEN Crystal Oscillator Enable. 0 = Use external RCLK (crystal oscillator disabled). 1 = Use crystal oscillator (RCLK and GPO3/DCLK with external 32.768 kHz crys- tal and OPMODE=00000101). See Si47xx Data Sheet Application Schematic for external BOM details.

11 Response (to FUNC = 2, TX) Response (to FUNC = 15, Query Library ID) 1 3:0 FUNC[3:0] Function. 0–1, 3–14 = Reserved. 2 = Transmit. 15 = Query Library ID. 2 7:0 OPMODE[7:0] Application Setting 01010000 = Analog audio inputs (LIN/RIN) 00001111 = Digital audio inputs (DIN/DFS/DCLK) Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X X RDSINT ASQINT STCINT Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X X RDSINT ASQINT STCINT RESP1 PN[7:0] RESP2 FWMAJOR[7:0] RESP3 FWMINOR[7:0] RESP4 RESERVED[7:0] RESP5 RESERVED[7:0] RESP6 CHIPREV[7:0] RESP7 LIBRARYID[7:0] RESP Bit Name Function 1 7:0 PN[7:0] Final 2 digits of part number. 2 7:0 FWMAJOR[7:0] Firmware Major Revision. 3 7:0 FWMINOR[7:0] Firmware Minor Revision. 4 7:0 RESERVED[7:0] Reserved, various values. 5 7:0 RESERVED[7:0] Reserved, various values. 6 7:0 CHIPREV[7:0] Chip Revision. 7 7:0 LIBRARYID[7:0] Library Revision.

Command 0x10. GET_REV Returns the part number, chip revision, firmware revision, patch revision and component revision numbers. The command is complete when the CTS bit (and optional interrupt) is set. This command may only be sent when in powerup mode. Command arguments: None Response bytes: Eight Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 0 1 0 0 0 0 Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X X RDSINT ASQINT STCINT RESP1 PN[7:0] RESP2 FWMAJOR[7:0] RESP3 FWMINOR[7:0] RESP4 PATCHH[7:0] RESP5 PATCHL[7:0] RESP6 CMPMAJOR[7:0] RESP7 CMPMINOR[7:0] RESP8 CHIPREV[7:0] RESP Bit Name Function 1 7:0 PN[7:0] Final 2 digits of Part Number 2 7:0 FWMAJOR[7:0] Firmware Major Revision 3 7:0 FWMINOR[7:0] Firmware Minor Revision 4 7:0 PATCHH[7:0] Patch ID High Byte 5 7:0 PATCHL[7:0] Patch ID Low Byte 6 7:0 CMPMAJOR[7:0] Component Major Revision 7 7:0 CMPMINOR[7:0] Component Minor Revision 8 7:0 CHIPREV[7:0] Chip Revision

13 Command 0x11. POWER_DOWN Moves the device from powerup to powerdown mode. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. Note that only the POWER_UP command is accepted in powerdown mode. If the system controller writes a command other than POWER_UP when in powerdown mode, the device does not respond. The device will only respond when a POWER_UP command is written. Note: In FMTX component 1.0 and 2.0, a reset is required when the system controller writes a command other than POWER_UP when in powerdown mode. Command arguments: None Response bytes: None Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 0 1 0 0 0 1 Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X X RDSINT ASQINT STCINT

Command 0x12. SET_PROPERTY Sets a property shown in Table 5, “FM Transmitter Property Summary,” on page 7. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. See Figure 18, “CTS and SET_PROPERTY Command Complete tCOMP Timing Model,” on page 187 and Table 41, “Command Timing Parameters for the FM Transmitter,” on page 188. Note: The use of GPO2 as an interrupt pin and/or the use of GPO3 as DCLK digital clock input will override this GPIO_CTL function for GPO2 and/or GPO3. Command Arguments: Five Response bytes: None Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 0 1 0 0 1 0 ARG1 0 0 0 0 0 0 0 0 ARG2 PROPH[7:0] ARG3 PROPL[7:0] ARG4 PROPDH[7:0] ARG5 PROPDL[7:0] ARG Bit Name Function 1 7:0 Reserved Always write to 0. 2 7:0 PROPH[7:0] Property High Byte. This byte in combination with PROPL is used to specify the property to modify. See Section "5.1.2. FM/RDS Transmitter Properties" on page 29. 3 7:0 PROPL[7:0] Property Low Byte. This byte in combination with PROPH is used to specify the property to modify. See Section "5.1.2. FM/RDS Transmitter Properties" on page 29. 4 7:0 PROPDH[7:0] Property Value High Byte. This byte in combination with PROPVL is used to set the property value. See Section "5.1.2. FM/RDS Transmitter Properties" on page 29. 5 7:0 PROPDL[7:0] Property Value Low Byte. This byte in combination with PROPVH is used to set the property value. See Section "5.1.2. FM/RDS Transmitter Properties" on page 29. Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X X RDSINT ASQINT STCINT

15 Command 0x13. GET_PROPERTY Gets a property shown in Table 5, “FM Transmitter Property Summary,” on page 7. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. Command arguments: Three Response bytes: Three Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 0 1 0 0 1 1 ARG1 0 0 0 0 0 0 0 0 ARG2 PROPH[7:0] ARG3 PROPL[7:0] ARG Bit Name Function 1 7:0 Reserved Always write to 0. 2 7:0 PROPH[7:0] Property Get High Byte. This byte in combination with PROPL is used to specify the property to get. 3 7:0 PROPL[7:0] Property Get Low Byte. This byte in combination with PROPH is used to specify the property to get. Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X X RDSINT ASQINT STCINT RESP1 X X X X X X X X RESP2 PROPDH[7:0] RESP3 PROPDL[7:0] RESP Bit Name Function 1 7:0 Reserved Reserved, various values. 2 7:0 PROPDH[7:0] Property Value High Byte. This byte in combination with PROPVL will represent the requested prop- erty value. 3 7:0 PROPDL[7:0] Property Value High Byte. This byte in combination with PROPVH will represent the requested prop- erty value.

Command 0x14. GET_INT_STATUS Updates bits 6:0 of the status byte. This command should be called after any command that sets the STCINT, ASQINT, or RDSINT bits. When polling this command should be periodically called to monitor the STATUS byte, and when using interrupts, this command should be called after the interrupt is set to update the STATUS byte. The command is complete when the CTS bit (and optional interrupt) is set. This command may only be sent when in powerup mode. Command arguments: None Response bytes: One Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 0 1 0 1 0 0 Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X X RDSINT ASQINT STCINT

17 Command 0x30. TX_TUNE_FREQ Sets the state of the RF carrier and sets the tuning frequency between 76 and 108 MHz in 10 kHz units and steps of 50 kHz. For example 76.05 MHz = 7605 is valid because it follows the 50 kHz step requirement but 76.01 MHz = 7601 is not valid. The CTS bit (and optional interrupt) is set when it is safe to send the next command. The ERR bit (and optional interrupt) is set if an invalid argument is sent. Note that only a single interrupt occurs if both the CTS and ERR bits are set. The optional STC interrupt is set when the command completes. The STCINT bit is set only after the GET_INT_STATUS command is called. This command may only be sent when in powerup mode. The command clears the STC bit if it is already set. See Figure 17, “CTS and STC Timing Model,” on page 187 and Table 41, “Command Timing Parameters for the FM Transmitter,” on page 188. Command arguments: Three Response bytes: None Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 1 1 0 0 0 0 ARG1 0 0 0 0 0 0 0 0 ARG2 FREQH[7:0] ARG3 FREQL[7:0] ARG Bit Name Function 1 7:0 Reserved Always write to 0. 2 7:0 FREQH[7:0] Tune Frequency High Byte. This byte in combination with FREQL selects the tune frequency in units of 10 kHz. The valid range is from 7600 to 10800 (76–108 MHz). The frequency must be a multiple of 50 kHz. 3 7:0 FREQL[7:0] Tune Frequency Low Byte. This byte in combination with FREQH selects the tune frequency in units of 10 kHz. The valid range is from 7600 to 10800 (76–108 MHz). The frequency must be a multiple of 50 kHz. Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X X RDSINT ASQINT STCINT

Command 0x31. TX_TUNE_POWER Sets the RF voltage level between 88 dBµV and 115 dBµV in 1 dB units. Power may be set as high as 120 dBµV; however, voltage accuracy is not guaranteed. A value of 0x00 indicates off. The command also sets the antenna tuning capacitance. A value of 0 indicates autotuning, and a value of 1–191 indicates a manual override. The CTS bit (and optional interrupt) is set when it is safe to send the next command. The ERR bit (and optional interrupt) is set if an invalid argument is sent. Note that only a single interrupt occurs if both the CTS and ERR bits are set. The optional STC interrupt is set when the command completes. The STCINT bit is set only after the GET_INT_STATUS command is called. This command may only be sent when in powerup mode. The command clears the STC bit if it is already set. See Figure 17, “CTS and STC Timing Model,” on page 187 and Table 41, “Command Timing Parameters for the FM Transmitter,” on page 188. Command arguments: Four Response bytes: None Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 1 1 0 0 0 1 ARG1 0 0 0 0 0 0 0 0 ARG2 0 0 0 0 0 0 0 0 ARG3 RFdBµV[7:0] ARG4 ANTCAP[7:0] ARG Bit Name Function 1 7:0 Reserved Always write to 0. 2 7:0 Reserved Always write to 0. 3 7:0 RFdBµV[7:0] Tune Power Byte. Sets the tune power in dBµV in 1 dB steps. The valid range is from 88– 115 dBµV. Power may be set as high as 120 dBµV; however, voltage accu- racy is not guaranteed. 4 7:0 ANTCAP[7:0] Antenna Tuning Capacitor. This selects the value of the antenna tuning capacitor manually, or automati- cally if set to zero. The valid range is 0 to 191, which results in a tuning capacitance of 0.25 pF x ANTCAP. Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X X RDSINT ASQINT STCINT

19 Command 0x32. TX_TUNE_MEASURE (Si4712/13/20/21 Only) Enters receive mode (disables transmitter output power) and measures the received noise level (RNL) in units of dBµV on the selected frequency. The command sets the tuning frequency between 76 and 108 MHz in 10 kHz units and steps of 50 kHz. For example 76.05 MHz = 7605 is valid because it follows the 50 kHz step requirement but 76.01 MHz = 7601 is not valid. The command also sets the antenna tuning capacitance. A value of 0 indicates autotuning, and a value of 1–191 indicates a manual override. The CTS bit (and optional interrupt) is set when it is safe to send the next command. The ERR bit (and optional interrupt) is set if an invalid argument is sent. Note that only a single interrupt occurs if both the CTS and ERR bits are set. The optional STC interrupt is set when the command completes. The STCINT bit is set only after the GET_INT_STATUS command is called. This command may only be sent when in powerup mode. The command clears the STC bit if it is already set. See Figure 17, “CTS and STC Timing Model,” on page 187 and Table 41, “Command Timing Parameters for the FM Transmitter,” on page 188. Command arguments: Three Response bytes: None Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 1 1 0 0 1 0 ARG1 0 0 0 0 0 0 0 0 ARG2 FREQH[7:0] ARG3 FREQL[7:0] ARG4 ANTCAP[7:0] ARG Bit Name Function 1 7:0 Reserved Always write to 0. 2 7:0 FREQH[7:0] Tune Frequency High Byte. This byte in combination with FREQL selects the tune frequency in units of 10 kHz. In FM mode the valid range is from 7600 to 10800 (76–108 MHz). The frequency must be a multiple of 50 kHz. 3 7:0 FREQL[7:0] Tune Frequency Low Byte. This byte in combination with FREQH selects the tune frequency in units of 10 kHz. In FM mode the valid range is from 7600 to 10800 (76–108 MHz). The frequency must be a multiple of 50 kHz. 4 7:0 ANTCAP[7:0] Antenna Tuning Capacitor. This selects the value of the antenna tuning capacitor manually, or auto- matic if set to zero. The valid range is 0–191. Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X X RDSINT ASQINT STCINT

Command 0x33. TX_TUNE_STATUS Returns the status of the TX_TUNE_FREQ, TX_TUNE_MEASURE, or TX_TUNE_POWER commands. The command returns the current frequency, output voltage in dBµV (if applicable), the antenna tuning capacitance value (0–191) and the received noise level (if applicable). The command clears the STCINT interrupt bit when INTACK bit of ARG1 is set. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. Command arguments: One Response bytes: Seven Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 1 1 0 0 1 1 ARG1 0 0 0 0 0 0 0 INTACK ARG Bit Name Function 1 7:1 Reserved Always write to 0. 1 0 INTACK Seek/Tune Interrupt Clear. If set this bit clears the seek/tune complete interrupt status indicator. Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X X RDSINT ASQINT STCINT RESP1 X X X X X X X X RESP2 READFREQH[7:0] RESP3 READFREQL[7:0] RESP4 X X X X X X X X RESP5 READRFdBµV[7:0] RESP6 READANTCAP[7:0] RESP7 RNL[7:0]

21 RESP Bit Name Function 1 7:0 Reserved Returns various data. 2 7:0 READFREQH[7:0] Read Frequency High Byte. This byte in combination with READFREQL returns frequency being tuned. 3 7:0 READFREQL[7:0] Read Frequency Low Byte. This byte in combination with READFREQH returns frequency being tuned. 4 7:0 Reserved Returns various data. 5 7:0 READRFdBµV[7:0] Read Power. Returns the transmit output voltage setting. 6 7:0 READANTCAP [7:0] Read Antenna Tuning Capacitor. This byte will contain the current antenna tuning capacitor value. 7 7:0 RNL[7:0] Read Received Noise Level (Si4712/13 Only). This byte will contain the receive level as the response to a TX Tune Mea- sure command. The returned value will be the last RNL measurement (or 0 if no measurement has been performed) for the TX Tune Freq and TX Tune Power commands.

Command 0x34. TX_ASQ_STATUS Returns status information about the audio signal quality and current FM transmit frequency. This command can be used to check if the input audio stream is below a low threshold as reported by the IALL bit, or above a high threshold as reported by the IALH bit. The thresholds can be configured to detect a silence condition or an activity condition which can then be used by the host to take an appropriate action such as turning off the carrier in the case of prolonged silence. The thresholds are set using the TX_ASQ_LEVEL_LOW and TX_ASQ_LEVEL_HIGH properties. The audio must be above or below the threshold for greater than the amount of time specified in the TX_ASQ_DURATION_LOW and TX_ASQ_DURATION_HIGH properties for the status to be detected. Additionally the command can be used to determine if an overmodulation condition has occurred or the limiter has engaged, as reported by the OVERMOD bit, in which case the host could reduce the audio level to the part. If any of the OVERMOD, IALH, or IALL bits are set, the ASQINT bit will also be set. The ASQINT bit can be routed to a hardware interrupt via the GPO_IEN property. Clearing the IALH or IALL interrupts will result in the TX_ASQ_DURATION_LOW or TX_ASQ_DURATION_HIGH counters being rearmed, respectively, to start another detection interval measurement. The command clears the ASQINT interrupt bit and OVERMOD, IALH, and IALL bits when the INTACK bit of ARG1 is set. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. Note that the TX_ASQ_DURATION_LOW and TX_ASQ_DURATION_HIGH counters start and the TX_ASQ_STATUS command will only return valid data after a call to TX_TUNE_FREQ, TX_TUNE_POWER, or TX_TUNE_MEASURE. Command arguments: One Response bytes: Four Command Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 1 1 0 1 0 0 ARG1 0 0 0 0 0 0 0 INTACK ARG Bit Name Function 1 0 INTACK Interrupt Acknowledge. 0 = Interrupt status preserved. 1 = Clears ASQINT, OVERMOD, IALDH, and IALDL.

23 Response Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X X RDSINT ASQINT STCINT RESP1 X X X X X OVERMOD IALH IALL RESP2 X X X X X X X X RESP3 X X X X X X X X RESP4 INLEVEL[7:0] RESP Bit Name Function 1 2 OVERMOD Overmodulation Detection. 0 = Output signal is below requested modulation level. 1 = Output signal is above requested modulation level. 1 1 IALH Input Audio Level Threshold Detect High. 0 = Input audio level high threshold not exceeded. 1 = Input audio level high threshold exceeded. 1 0 IALL Input Audio Level Threshold Detect Low. 0 = Input audio level low threshold not exceeded. 1 = Input audio level low threshold exceeded. 2 7:0 Reserved Returns various values. 3 7:0 Reserved Returns various values. 4 7:0 INLEVEL[7:0] Input Audio Level. The current audio input level measured in dBfs (2s complement nota- tion).

Command 0x35. TX_RDS_BUFF (Si4711/13/21 Only) Loads or clears the RDS group buffer FIFO or circular buffer and returns the FIFO status. The buffer can be allocated between the circular buffer and FIFO with the TX_RDS_FIFO_SIZE property. A common use case for the circular buffer is to broadcast group 2A radio text, and a common use case for the FIFO is to broadcast group 4A real time clock. The command clears the INTACK interrupt bit when the INTACK bit of ARG1 is set. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. Note: TX_RDS_BUFF is supported in FMTX component 2.0 or higher. Command arguments: Seven Response bytes: Five Command Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 1 1 0 1 0 1 ARG1 FIFO 0 0 0 0 LDBUFF MTBUFF INTACK ARG2 RDSBH[7:0] ARG3 RDSBL[7:0] ARG4 RDSCH[7:0] ARG5 RDSCL[7:0] ARG6 RDSDH[7:0] ARG7 RDSDL[7:0] ARG Bit Name Function 1 7 FIFO Operate on FIFO. If set, the command operates on the FIFO buffer. If cleared, the command operates on the circular buffer. 1 6:3 Reserved Always write to 0. 1 2 LDBUFF Load RDS Group Buffer. If set, loads the RDS group buffer with RDSB, RDSC, and RDSD. Block A data is generated from the RDS_TX_PI property when the buffer is transmit- ted. 1 1 MTBUFF Empty RDS Group Buffer. If set, empties the RDS group buffer. 1 0 INTACK Clear RDS Group buffer interrupt. If set this bit clears the RDS group buffer interrupt indicator. 2 7:0 RDSBH[7:0] RDS Block B High Byte. This byte in combination with RDSBL sets the RDS block B data. 3 7:0 RDSBL[7:0] RDS Block B Low Byte. This byte in combination with RDSBH sets the RDS block B data.

25 Response 4 7:0 RDSCH[7:0] RDS Block C High Byte. This byte in combination with RDSCL sets the RDS block C data. 5 7:0 RDSCL[7:0] RDS Block C Low Byte. This byte in combination with RDSCH sets the RDS block C data. 6 7:0 RDSDH[7:0] RDS Block D High Byte. This byte in combination with RDSDL sets the RDS block D data. 7 7:0 RDSDL[7:0] RDS Block D Low Byte. This byte in combination with RDSDH sets the RDS block D data. Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X X RDSINT ASQINT STCINT RESP1 X X X RDSPSXMIT CBUFXMIT FIFOXMIT CBUFWRAP FIFOMT RESP2 CBAVAIL[7:0] RESP3 CBUSED[7:0] RESP4 FIFOAVAIL[7:0] RESP5 FIFOUSED[7:0] RESP Bit Name Function 1 7:5 Reserved Values may vary. 1 4 RDSPSXMIT Interrupt source: RDS PS Group has been transmitted. 1 3 CBUFXMIT Interrupt source: RDS Group has been transmitted from the FIFO buffer. 1 2 FIFOXMIT Interrupt source: RDS Group has been transmitted from the circular buffer. 1 1 CBUFWRAP Interrupt source: RDS Group Circular Buffer has wrapped. 1 0 FIFOMT Interrupt source: RDS Group FIFO Buffer is empty. 2 7:0 CBAVAIL[7:0] Returns the number of available Circular Buffer blocks. 3 7:0 CBUSED[7:0] Returns the number of used Circular Buffer blocks. 4 7:0 FIFOAVAIL[7:0] Returns the number of available FIFO blocks. 5 7:0 FIFOUSED[7:0] Returns the number of used FIFO blocks. ARG Bit Name Function

Command 0x36. TX_RDS_PS (Si4711/13/21 Only) Loads or clears the program service buffer. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. Note: TX_RDS_PS is supported in FMTX component 2.0 or higher. Command arguments: Five Response bytes: None Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 1 1 0 1 1 0 ARG1 0 0 0 PSID[4:0] ARG2 PSCHAR0 [7:0] ARG3 PSCHAR1 [7:0] ARG4 PSCHAR2 [7:0] ARG5 PSCHAR3 [7:0] ARG Bit Name Function 1 7:5 Reserved Always write to 0. 1 4:0 PSID[4:0] Selects which PS data to load (0–23) 0 = First 4 characters of PS0. 1 = Last 4 characters of PS0. 2 = First 4 characters of PS1. 3 = Last 4 characters of PS1. ...22 = First 4 characters of PS11. 23 = Last 4 characters of PS11. 2 7:0 PSCHAR0[7:0] RDS PSID CHAR0. First character of selected PSID. 3 7:0 PSCHAR1[7:0] RDS PSID CHAR1. Second character of selected PSID. 4 7:0 PSCHAR2[7:0] RDS PSID CHAR2. Third character of selected PSID. 5 7:0 PSCHAR3[7:0] RDS PSID CHAR3. Fourth character of selected PSID. Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X X RDSINT ASQINT STCINT

27 Command 0x80. GPIO_CTL Enables output for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output (Hi-Z or active drive) by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit. The state (high or low) of GPO1, 2, and 3 is set with the GPIO_SET command. To avoid excessive current consumption due to oscillation, GPO pins should not be left in a high impedance state. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. The default is all GPO pins set for high impedance. Notes: 1. GPIO_CTL is fully supported in FMTX component 3.0 or higher. Only bit GPO3OEN is supported in FMTX comp 2.0. 2. The use of GPO2 as an interrupt pin and/or the use of GPO3 as DCLK digital clock input will override this GPIO_CTL function for GPO2 and/or GPO3 respectively. Command arguments: One Response bytes: None Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 1 0 0 0 0 0 0 0 ARG1 0 0 0 0 GPO3OEN GPO2OEN GPO1OEN 0 ARG Bit Name Function 1 7:4 Reserved Always write 0. 1 3 GPO3OEN GPO3 Output Enable. 0 = Output Disabled (Hi-Z) (default). 1 = Output Enabled. 1 2 GPO2OEN GPO2 Output Enable. 0 = Output Disabled (Hi-Z) (default). 1 = Output Enabled. 1 1 GPO1OEN GPO1 Output Enable. 0 = Output Disabled (Hi-Z) (default). 1 = Output Enabled. 1 0 Reserved Always write 0. Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X X RDSINT ASQINT STCINT

Command 0x81. GPIO_SET Sets the output level (high or low) for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit in the GPIO_CTL command. To avoid excessive current consumption due to oscillation, GPO pins should not be left in a high impedance state. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is all GPO pins set for high impedance. Note: GPIO_SET is fully-supported in FMTX comp 3.0 or higher. Only bit GPO3LEVEL is supported in FMTX comp 2.0. Command arguments: One Response bytes: None Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 1 0 0 0 0 0 0 1 ARG1 0 0 0 0 GPO3LEVEL GPO2LEVEL GPO1LEVEL 0 ARG Bit Name Function 1 7:4 Reserved Always write 0. 1 3 GPO3LEVEL GPO3 Output Level. 0 = Output low (default). 1 = Output high. 1 2 GPO2LEVEL GPO3 Output Level. 0 = Output low (default). 1 = Output high. 1 1 GPO1LEVEL GPO3 Output Level. 0 = Output low (default). 1 = Output high. 1 0 Reserved Always write 0. Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X X RDSINT ASQINT STCINT

29 5.1.2. FM/RDS Transmitter Properties Property 0x0001. GPO_IEN Configures the sources for the GPO2/INT interrupt pin. Valid sources are the lower 8 bits of the STATUS byte, including CTS, ERR, RDSINT, ASQINT, and STCINT bits. The corresponding bit is set before the interrupt occurs. The CTS bit (and optional interrupt) is set when it is safe to send the next command. The CTS interrupt enable (CTSIEN) can be set with this property and the POWER_UP command. The state of the CTSIEN bit set during the POWER_UP command can be read by reading the this property and modified by writing this property. This property may only be set or read when in powerup mode. The default is no interrupts enabled. Default: 0x0000 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 RDSREP ASQREP STCREP CTSIEN ERRIEN 0 0 0 RDSIEN ASQIEN STCIEN Bit Name Function 15:11 Reserved Always write to 0. 10 RDSREP RDS Interrupt Repeat. (Si4711/13/21 Only) 0 = No interrupt generated when RDSINT is already set (default). 1 = Interrupt generated even if RDSINT is already set. 9 ASQREP ASQ Interrupt Repeat. 0 = No interrupt generated when ASQREP is already set (default). 1 = Interrupt generated even if ASQREP is already set. 8 STCREP STC Interrupt Repeat. 0 = No interrupt generated when STCREP is already set (default). 1 = Interrupt generated even if STCREP is already set. 7 CTSIEN CTS Interrupt Enable. 0 = No interrupt generated when CTS is set (default). 1 = Interrupt generated when CTS is set. After PowerUp, this bit will reflect the CTSIEN bit in ARG1 of PowerUp Command. 6 ERRIEN ERR Interrupt Enable. 0 = No interrupt generated when ERR is set (default). 1 = Interrupt generated when ERR is set. 5:3 Reserved Always write to 0. 2 RDSIEN RDS Interrupt Enable (Si4711/13/21 Only). 0 = No interrupt generated when RDSINT is set (default). 1 = Interrupt generated when RDSINT is set. 1 ASQIEN Audio Signal Quality Interrupt Enable. 0 = No interrupt generated when ASQINT is set (default). 1 = Interrupt generated when ASQINT is set. 0 STCIEN Seek/Tune Complete Interrupt Enable. 0 = No interrupt generated when STCINT is set (default). 1 = Interrupt generated when STCINT is set.

Property 0x0101. DIGITAL_INPUT_FORMAT Configures the digital input format. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Note: DIGITAL_INPUT_FORMAT is supported in FMTX component 2.0 or higher. Default: 0x0000 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 IFALL IMODE[3:0] IMONO ISIZE[1:0] Bit Name Function 15:8 Reserved Always write to 0. 7 IFALL DCLK Falling Edge. 0 = Sample on DCLK rising edge (default). 1 = Sample on DCLK falling edge. 6:3 IMODE[3:0] Digital Mode. 0000 = I2S Mode (default). 0110 = Left-justified mode. 1100 = MSB at 1st DCLK rising edge after DFS Pulse. 1000 = MSB at 2nd DCLK rising edge after DFS Pulse. 2 IMONO Mono Audio Mode. 0 = Stereo audio mode (default). 1 = Mono audio mode. 1:0 ISIZE[1:0] Digital Audio Sample Precision. 00 = 16 bits (default) 01 = 20 bits 10 = 24 bits 11 = 8 bits

31 Property 0x0103. DIGITAL_INPUT_SAMPLE_RATE Configures the digital input sample rate in 1 Hz units. The input sample rate must be set to 0 before removing the DCLK input or reducing the DCLK frequency below 2 MHz. If this guideline is not followed, a device reset will be required. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Note: DIGITAL_INPUT_SAMPLE_RATE is supported in FMTX component 2.0 or higher. Default: 0x0000 Units: 1 Hz Step: 1 Hz Range: 0, 32000-48000 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name DISR[15:0] Bit Name Function 15:0 DISR Digital Input Sample Rate. 0 = Disabled. Required before removing DCLK or reducing DCLK frequency below 2 MHz. The range is 32000–48000 Hz.

Property 0x0201. REFCLK_FREQ Sets the frequency of the REFCLK from the output of the prescaler. (Figure 1 shows the relation between RCLK and REFCLK.) The REFCLK range is 31130 to 34406 Hz (32768 ±5% Hz) in 1 Hz steps, or 0 (to disable AFC). For example, an RCLK of 13 MHz would require a prescaler value of 400 to divide it to 32500 Hz REFCLK. The reference clock frequency property would then need to be set to 32500 Hz. RCLK frequencies between 31130 Hz and 40 MHz are supported, however, there are gaps in frequency coverage for prescaler values ranging from 1 to 10, or frequencies up to 311300 Hz. Table 7 summarizes these RCLK gaps. Figure 1. REFCLK Prescaler The RCLK must be valid 10 ns before and 10 ns after sending the TX_TUNE_MEASURE, TX_TUNE_FREQ, or TX_TUNE_POWER commands. In addition, the RCLK must be valid at all times when the carrier is enabled for proper AFC operation. The RCLK may be removed or reconfigured at other times. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 32768 Hz. Default: 0x8000 (32768) Units: 1 Hz Step: 1 Hz Range: 31130–34406 Table 7. RCLK Gaps Prescaler RCLK Low (Hz) RCLK High (Hz) 1 31130 34406 2 62260 68812 3 93390 103218 4 124520 137624 5 155650 172030 6 186780 206436 7 217910 240842 8 249040 275248 9 280170 309654 10 311300 344060 RCLK REFCLK PIN 9 Prescaler Divide by 1-4095 31.130 kHz – 40 MHz 31.130 kHz – 34.406 kHz

33 Property 0x0202. REFCLK_PRESCALE Sets the number used by the prescaler to divide the external RCLK down to the internal REFCLK. The range may be between 1 and 4095 in 1 unit steps. For example, an RCLK of 13 MHz would require a prescaler value of 400 to divide it to 32500 Hz. The reference clock frequency property would then need to be set to 32500 Hz. The RCLK must be valid 10 ns before and 10 ns after sending the TX_TUNE_MEASURE, TX_TUNE_FREQ, or TX_TUNE_POWER commands. In addition, the RCLK must be valid at all times when the carrier is enabled for proper AFC operation. The RCLK may be removed or reconfigured at other times. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 1. Default: 0x0001 Step: 1 Range: 1–4095 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name REFCLKF[15:0] Bit Name Function 15:0 REFCLKF[15:0] Frequency of Reference Clock in Hz. The allowed REFCLK frequency range is between 31130 and 34406 Hz (32768 ±5%), or 0 (to disable AFC). Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 RCLKP[11:0] Bit Name Function 15:12 Reserved Always write to 0. 11:0 REFCLKP[11:0] Prescaler for Reference Clock. Integer number used to divide the RCLK frequency down to REFCLK frequency. The allowed REFCLK frequency range is between 31130 and 34406 Hz (32768 ±5%), or 0 (to disable AFC).

Property 0x2100. TX_COMPONENT_ENABLE Individually enables the stereo pilot, left minus right stereo and RDS components. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is stereo pilot and left minus right stereo components enabled. Default: 0x0003 Property 0x2101. TX_AUDIO_DEVIATION Sets the transmit audio deviation from 0 to 90 kHz in 10 Hz units. The sum of the audio deviation, pilot deviation and RDS deviation should not exceed regulatory requirements, typically 75 kHz. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 6825, or 68.25 kHz. Default: 0x1AA9 (6825) Units: 10 Hz Step: 10 Hz Range: 0–9000 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 0 0 0 0 RDS LMR PILOT Bit Name Function 15:3 Reserved Always write 0. 2 RDS RDS Enable (Si4711/13/21 Only). 0 = Disables RDS (default). 1 = Enables RDS to be transmitted. 1 LMR Left Minus Right. 0 = Disables Left Minus Right. 1 = Enables Left minus Right (Stereo) to be transmitted (default). 0 PILOT Pilot Tone. 0 = Disables Pilot. 1 = Enables the Pilot tone to be transmitted (default). Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name TXADEV[15:0] Bit Name Function 15:0 TXADEV[15:0] Transmit Audio Frequency Deviation. Audio frequency deviation is programmable from 0 Hz to 90 kHz in 10 Hz units. Default is 6825 (68.25 kHz). Note that the total deviation of the audio, pilot, and RDS must be less than 75 kHz to meet regulatory requirements.

35 Property 0x2102. TX_PILOT_DEVIATION Sets the transmit pilot deviation from 0 to 90 kHz in 10 Hz units. The sum of the audio deviation, pilot deviation and RDS deviation should not exceed regulatory requirements, typically 75 kHz. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 675, or 6.75 kHz. Default: 0x02A3 (675) Units: 10 Hz Step: 10 Hz Range: 0–9000 Property 0x2103. TX_RDS_DEVIATION (Si4711/13/21 Only) Sets the RDS deviation from 0 to 7.5 kHz in 10 Hz units. The sum of the audio deviation, pilot deviation and RDS deviation should not exceed regulatory requirements, typically 75 kHz. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 200, or 2 kHz. Default: 0x00C8 (200) Units: 10 Hz Step: 10 Hz Range: 0–9000 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name TXPDEV[15:0] Bit Name Function 15:0 TXPDEV[15:0] Transmit Pilot Frequency Deviation. Pilot tone frequency deviation is programmable from 0 Hz to 90 kHz in 10 Hz units. Default is 675 (6.75 kHz). Note that the total deviation of the audio, pilot, and RDS must be less than 75 kHz to meet regulatory requirements. Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name TXRDEV[15:0] Bit Name Function 15:0 TXRDEV[15:0] Transmit RDS Frequency Deviation. RDS frequency deviation is programmable from 0 Hz to 90 kHz in 10 Hz units. Default is 200 (2 kHz). Note that the total deviation of the audio, pilot, and RDS must be less than 75 kHz to meet regulatory requirements.

Property 0x2104. TX_LINE_INPUT_LEVEL Sets the input resistance and maximum audio input level for the LIN/RIN pins. An application providing a 150 mVPK input to the device on RIN/LIN would set Line Attenuation = 00, resulting in a maximum permissible input level of 190 mVPK on LIN/RIN and an input resistance of 396 kΩ. The Line Level would be set to 150 mV to correspond to the TX audio deviation level set by the TX_AUDIO_DEVIATION property. An application providing a 1 VPK input to the device on RIN/LIN would set Line Attenuation = 11, resulting in a maximum permissible input level of 636 mVPK on LIN/RIN and an input resistance of 60 kΩ. An external series resistor on LIN and RIN inputs of 40 kΩ would create a resistive voltage divider that would keep the maximum line level on RIN/LIN below 636 mVPK. The Line Level would be set to 636 mVPK to correspond to the TX audio deviation level set by the TX_AUDIO_DEVIATION property. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default input level and peak line level is 636 mVPK with an input impedance of 60 kΩ. Default: 0x327C Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 LIATTEN[1:0] 0 0 LILEVEL[9:0] Bit Name Function 15:14 Reserved Always write to 0. 13:12 LIATTEN[1:0] Line Attenuation. 00 = Max input level = 190 mVPK; input resistance = 396 kΩ 01 = Max input level = 301 mVPK; input resistance = 100 kΩ 10 = Max input level = 416 mVPK; input resistance = 74 kΩ 11 = Max input level = 636 mVPK; input resistance = 60 kΩ (default) 11:10 Reserved Always write to 0. 9:0 LILEVEL[9:0] Line Level. Maximum line amplitude level on the LIN/RIN pins in mVPK. The default is 0x27C or 636 mVPK.

37 Property 0x2105. TX_LINE_INPUT_MUTE Selectively mutes the left and right audio inputs. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Default: 0x0000 Property 0x2106. TX_PREEMPHASIS Sets the transmit pre-emphasis to 50 µs, 75 µs or off. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 75 µs. Default: 0x0000 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LIMUTE RIMUTE Bit Name Function 15:2 Reserved Always write to 0. 1 LIMUTE Mutes L Line Input. 0 = No mute (default) 1 = Mute 0 RIMUTE Mutes R Line Input. 0 = No mute (default) 1 = Mute Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FMPE[1:0] Bit Name Function 15:2 Reserved Always write to 0. 1:0 FMPE[1:0] FM Pre-Emphasis. 00 = 75 µs. Used in USA (default) 01 = 50 µs. Used in Europe, Australia, Japan 10 = Disabled 11 = Reserved

Property 0x2107. TX_PILOT_FREQUENCY This property is used to set the frequency of the stereo pilot in 1 Hz steps. The stereo pilot is nominally set to 19 kHz for stereo operation, however the pilot can be set to any frequency from 0 Hz to 19 kHz to support the generation of an audible test tone. The pilot tone is enabled by setting the PILOT bit (D0) of the TX_COMPONENT_ENABLE property. When using the stereo pilot as an audible test generator it is recommended that the RDS bit (D2) be disabled. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Default: 0x4A38 (19000) Units: 1 Hz Step: 1 Hz Range: 0–19000 Property 0x2200. TX_ACOMP_ENABLE Selectively enables the audio dynamic range control and limiter. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is limiter enabled and audio dynamic range control disabled. Note: LIMITEN bit is supported in FMTX component 2.0 or higher. Reset this bit to 0 in FMTX component 1.0. Default: 0x0002 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name FREQ[15:0] Bit Name Function 15:0 FREQ Stereo Pilot Frequency Sets the frequency of the stereo pilot in 1 Hz steps. Range 0 Hz–19000 Hz (default is 0x4A38 or 19 kHz). Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LIMITEN ACEN Bit Name Function 15:2 Reserved Always write to 0. 1 LIMITEN Audio Limiter. 0 = Disable 1 = Enable (default) 0 ACEN Transmit Audio Dynamic Range Control Enable. 0 = Audio dynamic range control disabled (default) 1 = Audio dynamic range control enabled

39 Property 0x2201. TX_ACOMP_THRESHOLD Sets the threshold for audio dynamic range control from 0 dBFS to –40 dBFS in 1 dB units in 2's complement notation. For example, a setting of –40 dB would be 65536 – 40 = 65496 = 0xFFD8. The threshold is the level below which the device applies the gain set by the TX_ACOMP_GAIN property, and above which the device applies the compression defined by (gain + threshold) / threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 0xFFD8, or –40 dBFS. Default: 0xFFD8 (–40) Units: 1 dB Step: 1 dB Range: –40 to 0 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name THRESHOLD[15:0] Bit Name Function 15:0 THRESHOLD[15:0] Transmit Audio Dynamic Range Control Threshold. Range is from –40 to 0 dBFS in 1 dB steps (0xFFD8–0x0). Default is 0xFFD8 (–40 dBFS).

Property 0x2202. TX_ACOMP_ATTACK_TIME Sets the time required for the device to respond to audio level transitions from below the threshold in the gain region to above the threshold in the compression region. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 0.5 ms, or 0. Default: 0x0000 Range: 0–9 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 0 0 0 ATTACK[3:0] Bit Name Function 15:4 Reserved Always write to 0. 3:0 ATTACK[3:0] Transmit Audio Dynamic Range Control Attack Time. 0 = 0.5 ms (default) 1 = 1.0 ms 2 = 1.5 ms 3 = 2.0 ms 4 = 2.5 ms 5 = 3.0 ms 6 = 3.5 ms 7 = 4.0 ms 8 = 4.5 ms 9 = 5.0 ms

41 Property 0x2203. TX_ACOMP_RELEASE_TIME Sets the time required for the device to respond to audio level transitions from above the threshold in the compression region to below the threshold in the gain region. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 1000 ms, or 4. Default: 0x0004 Range: 0–4 Property 0x2204. TX_ACOMP_GAIN Sets the gain for audio dynamic range control from 0 to 20 dB in 1 dB units. For example, a setting of 15 dB would be 15 = 0xF. The gain is applied to the audio below the threshold set by the TX_ACOMP_THRESHOLD property. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 15 dB or 0xF. Default: 0x000F (15) Units: 1 dB Step: 1 dB Range: 0–20 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 0 0 0 0 RELEASE[2:0] Bit Name Function 15:3 Reserved Always write to 0. 2:0 RELEASE[2:0] Transmit Audio Dynamic Range Control Release Time. 0 = 100 ms 1 = 200 ms 2 = 350 ms 3 = 525 ms 4 = 1000 ms (default) Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name GAIN[5:0] Bit Name Function 15:6 Reserved Always write to 0. 5:0 GAIN[5:0] Transmit Audio Dynamic Range Control Gain. Range is from 0 to 20 dB in 1 dB steps. Default is 15.

Property 0x2205. TX_LIMITER_RELEASE_TIME Sets the time required for the device to respond to audio level transitions from above the limiter threshold to below the limiter threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 5.01 ms, or 102. Note: TX_LIMITER_RELEASE_TIME is supported in FMTX component 2.0 or higher. Default 0x0066 (102) Step: 1 Range: 5–2000 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name LIMITERTC[15:0] Bit Name Function 15:0 LMITERTC[15:0] Sets the limiter release time. 5 = 102.39 ms 6 = 85.33 ms 7 = 73.14 ms 8 = 63.99 ms 10 = 51.19 ms 13 = 39.38 ms 17 = 30.11 ms 25 = 20.47 ms 51 = 10.03 ms 57 = 8.97 ms 64 = 7.99 ms 73 = 7.01 ms 85 = 6.02 ms 102 = 5.01 ms (default) 127 = 4.02 ms 170 = 3.00 ms 255 = 2.00 ms 510 = 1.00 ms 1000 = 0.50 ms 2000 = 0.25 ms

43 Property 0x2300. TX_ASQ_INTERRUPT_SELECT This property is used to enable which Audio Signal Quality (ASQ) measurements are returned by the TX_ASQ_STATUS command. Overmodulation of the FM output signal due to excessive input signal level is reported via the OVERMOD bit, which is enabled by setting the OVERMODIEN bit. A high or low input audio condition is reported via the IALH and IALL bits which are enabled by the IALHIEN and IALLIEN bits. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Default: 0x0000 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 0 0 0 0 OVERMODIEN IALHIEN IALLIEN Bit Name Function 15:3 Reserved Always write to 0. 2 OVERMODIEN Overmodulation Detection Enable. 0 = OVERMOD detect disabled (default). 1 = OVERMOD detect enabled. 1 IALHIEN Input Audio Level Detection High Threshold Enable. 0 = IALH detect disabled (default). 1 = IALH detect enabled. 0 IALLIEN Input Audio Level Detection Low Threshold Enable. 0 = IALL detect disabled (default). 1 = IALL detect enabled.

Property 0x2301. TX_ASQ_LEVEL_LOW This property sets the low audio level threshold relative to 0 dBFS in 1 dB increments, which is used to trigger the IALL bit. This threshold can be set to detect a silence condition in the input audio allowing the host to take an appropriate action such as disabling the RF carrier or powering down the chip. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 0x0000 and the range is 0 to –70. Default: 0x0000 Units: 1 dB Step: 1 dB Range: –70 to 0 Property 0x2302. TX_ASQ_DURATION_LOW This property is used to determine the duration (in 1 ms increments) that the input signal must be below the TX_ASQ_LEVEL_LOW threshold in order for an IALL condition to be generated. The range is 0 ms to 65535 ms, and the default is 0 ms. Note that the TX_ASQ_DURATION_LOW and TX_ASQ_DURATION_HIGH counters start and the TX_ASQ_STATUS command will only return valid data after a call to TX_TUNE_FREQ, TX_TUNE_POWER, or TX_TUNE_MEASURE. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Default: 0x0000 Units: 1 ms Step: 1 ms Range: 0–65535 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 IALLTH[7:0] Bit Name Function 15:8 Reserved Always write to 0. 7:0 IALLTH[7:0] Input Audio Level Low Threshold Threshold which input audio level must be below in order to detect a low audio condition. Specified in units of dBFS in 1 dB steps (–70 .. 0). Default is 0. Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name IALLDUR[15:0] Bit Name Function 15:0 IALLDUR[15:0] Input Audio Level Duration Low. Required duration the input audio level must fall below IALLTH to trigger an IALL inter- rupt. Specified in 1mS increments (0–65535 ms). Default is 0.

45 Property 0x2303. TX_ASQ_LEVEL_HIGH This property sets the high audio level threshold relative to 0 dBFS in 1 dB increments, which is used to trigger the IALH bit. This threshold can be set to detect an activity condition in the input audio allowing the host to take an appropriate action such as enabling the RF carrier after an extended silent period. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 0x0000 and the range is 0 to –70. Default: 0x0000 Units: 1 dB Step: 1 dB Range: –70 to 0 Property 0x2304. TX_ASQ_DURATION_HIGH This property is used to determine the duration (in 1 ms increments) that the input signal must be above the TX_ASQ_LEVEL_HIGH threshold in order for a IALH condition to be generated. The range is 0 to 65535 ms, and the default is 0 ms. Note that the TX_ASQ_DURATION_LOW and TX_ASQ_DURATION_HIGH counters start and the TX_ASQ_STATUS command will only return valid data after a call to TX_TUNE_FREQ, TX_TUNE_POWER, or TX_TUNE_MEASURE. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Default: 0x0000 Units: 1 ms Step: 1 ms Range: 0–65535 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 IALHTH[7:0] Bit Name Function 15:8 Reserved Always write to 0. 7:0 IALHTH[7:0] Input Audio Level High Threshold Threshold which input audio level must be above in order to detect a high audio condition. Specified in units of dBFS in 1 dB steps (–70 .. 0). Default is 0.

Property 0x2C00. TX_RDS_INTERRUPT_SOURCE (Si4711/13/21 only) Configures the RDS interrupt sources. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Note: TX_RDS_INTERRUPT_SOURCE is supported in FMTX component 2.0 or higher. Default: 0x0000 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name IALHDUR[15:0] Bit Name Function 15:0 IALHDUR[15:0] Input Audio Level Duration High. Required duration the input audio level must exceed IALHTH to trigger an IALH inter- rupt. Specified in 1 ms increments (0 – 65535 ms). Default is 0. Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 0 0 RDS PSXMIT RDS CBUFXMIT RDSFI- FOXMIT RDS CBUFWRAP RDSFI- FOMT Bit Name Function 4 RDSPSXMIT 0 = Do not interrupt (default). 1 = Interrupt when a RDS PS Group has been transmitted. The interrupt occurs when a PS group begins transmission. 3 RDSCBUFXMIT 0 = Do not interrupt (default). 1 = Interrupt when a RDS Group has been transmitted from the Circular Buffer. The interrupt occurs when a group is fetched from the buffer. 2 RDSFIFOXMIT 0 = Do not interrupt (default). 1 = Interrupt when a RDS Group has been transmitted from the FIFO Buffer. The interrupt occurs when a group is fetched from the buffer. 1 RDSCBUFWRAP 0 = Do not interrupt (default). 1 = Interrupt when the RDS Group Circular Buffer has wrapped. The interrupt occurs when the last group is fetched from the buffer. 0 RDSFIFOMT 0 = Do not interrupt (default). 1 = Interrupt when the RDS Group FIFO Buffer is empty. The interrupt occurs when the last group is fetched from the FIFO.

47 Property 0x2C01. TX_RDS_PI (Si4711/13/21 Only) Sets the RDS PI code to be transmitted in block A and block C (for type B groups). The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Note: TX_RDS_PI is supported in FMTX component 2.0 or higher. Default: 0x40A7 Property 0x2C02. TX_RDS_PS_MIX (Si4711/13/21 only) Sets the ratio of RDS PS (group 0A) and circular buffer/FIFO groups. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Note: TX_RDS_PS_MIX is supported in FMTX component 2.0 or higher. Default: 0x0003 Range: 0–6 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name RDSPI[15:0] Bit Name Function 15:0 RDSPI[15:0] Transmit RDS Program Identifier. RDS program identifier data. Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 0 0 0 0 RDSPSMIX[2:0] Bit Name Function 15:3 Reserved Always write to 0. 2:0 RDSPSMIX[2:0] Transmit RDS Mix. 000 = Only send RDS PS if RDS Group Buffer is empty 001 = Send RDS PS 12.5% of the time 010 = Send RDS PS 25% of the time 011 = Send RDS PS 50% of the time (default) 100 = Send RDS PS 75% of the time 101 = Send RDS PS 87.5% of the time 110 = Send RDS PS 100% of the time

Property 0x2C03. TX_RDS_PS_MISC (Si4711/13/21 Only) Configures miscellaneous RDS flags. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Note: TX_RDS_PS_MISC is supported in FMTX component 2.0 or higher. Default: 0x1008 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name RDSD3 RDSD2 RDSD1 RDSD0 FORCEB RDSTP RDSPTY[4:0] RDSTA RDSMS 0 0 0 Bit Name Function 15 RDSD3 Dynamic PTY code. 0 = Static PTY (default). 1 = Indicates that the PTY code is dynamically switched. 14 RDSD2 Compressed code. 0 = Not compressed (default). 1 = Compressed. 13 RDSD1 Artificial Head code. 0 = Not artificial head (default). 1 = Artificial head. 12 RDSD0 Mono/Stereo code. 0 = Mono. 1 = Stereo (default). 11 FORCEB Use the PTY and TP set here in all block B data. 0 = FIFO and BUFFER use PTY and TP as when written (default). 1 = FIFO and BUFFER force PTY and TP to be the settings in this property. 10 RDSTP Traffic Program Code (default = 0). 9:5 RDSPTY[4:0] Program Type Code (default = 0). 4 RDSTA Traffic Announcement Code (default = 0). 3 RDSMS Music/Speech Switch Code. 0 = Speech. 1 = Music (default). 2:0 Reserved Always write to 0.

49 Property 0x2C04. TX_RDS_PS_REPEAT_COUNT (Si4711/13/21 Only) Sets the number of times a program service group 0A is repeated. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Note: TX_RDS_PS_REPEAT_COUNT is supported in FMTX component 2.0 or higher. Default: 0x0003 Range: 1–255 Property 0x2C05. TX_RDS_PS_MESSAGE_COUNT (Si4711/13/21 Only) Sets the number of program service messages through which to cycle. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Note: TX_RDS_PS_MESSAGE_COUNT is supported in FMTX component 2.0 or higher. Default: 0x0001 Range 1–12 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 RDSPSRC[7:0] Bit Name Function 15:8 Reserved Always write to 0. 7:0 RDSPSRC[7:0] Transmit RDS PS Repeat Count. Number of times to repeat transmission of a PS message before transmitting the next PS message. Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 0 0 0 RDSPSMC[3:0] Bit Name Function 15:4 Reserved Always write to 0. 3:0 RDSPSMC[3:0] Transmit RDS PS Message Count. Number of PS messages to cycle through. Default is 1.

Property 0x2C06. TX_RDS_PS_AF (Si4711/13/21 Only) Sets the AF RDS Program Service Alternate Frequency. This provides the ability to inform the receiver of a single alternate frequency using AF Method A coding and is transmitted along with the RDS_PS Groups. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Note: TX_RDS_PS_AF is supported in FMTX component 2.0 or higher. Default: 0xE0E0 Range: 0xE000–0xE0CC Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name RDSAF[15:0] Bit Name Function 15:0 RDSAF[15:0] Transmit RDS Program Service Alternate Frequency. 0xE101 = 1 AF @ 87.6 MHz 0xE102 = 1 AF @ 87.7 MHz ... 0xE1CB = 1 AF @ 107.8 MHz 0xE1CC = 1 AF @ 107.9 MHz 0xE0E0 = No AF exists (default)

51 Property 0x2C07. TX_RDS_FIFO_SIZE (Si4711/13/21 Only) Sets the RDS FIFO size in number of blocks. Note that the value written must be one larger than the desired FIFO size. The number of blocks allocated will reduce the size of the Circular RDS Group Buffer by the same amount. For instance, if RDSFIFOSZ = 20, then the RDS Circular Buffer will be reduced by 20 blocks. The minimum number of blocks which should be allocated is 4. This provides enough room for a single group of any type (xA or xB) to be transmitted. Groups xA require 3 Blocks, Groups xB require 2 Blocks as block C' is always the same as the RDS PI code. Before setting this value, determine the available blocks through the TX_RDS_FIFO command, as the buffer size may vary between versions or part numbers. The guaranteed minimum FIFO size, however, is 53 blocks. The RDS FIFO and the RDS Circular Buffer should be emptied with the TX_RDS_FIFO command prior to changing the size of the FIFO. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Note: TX_RDS_FIFO_SIZE is supported in FMTX component 2.0 or higher. Default: 0x0000 Units: blocks Step: 3 blocks Range: 0, 4, 7, 10–54 Note: Actual maximum FIFO size returned by the TX_RDS_BUFF command is larger, however, this is 53 blocks is the guaranteed FIFO size. Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 RDSFIFOSZ[7:0] Bit Name Function 15:8 Reserved Always write 0. 7:0 RDSFIFOSZ[7:0] Transmit RDS FIFO Size. 0 = FIFO disabled (default)

5.2. Commands and Properties for the FM/RDS Receiver (Si4704/05/06/2x/3x/4x) Tables 8 and 9 summarize the commands and properties for the FM/RDS Receiver component applicable to Si4704/05/06/2x/3x/4x. Table 8. FM/RDS Receiver Command Summary Cmd Name Description 0x01 POWER_UP Power up device and mode selection. 0x10 GET_REV Returns revision information on the device. 0x11 POWER_DOWN Power down device. 0x12 SET_PROPERTY Sets the value of a property. 0x13 GET_PROPERTY Retrieves a property’s value. 0x14 GET_INT_STATUS Reads interrupt status bits. 0x15 PATCH_ARGS Reserved command used for patch file downloads. 0x16 PATCH_DATA Reserved command used for patch file downloads. 0x20 FM_TUNE_FREQ Selects the FM tuning frequency. 0x21 FM_SEEK_START Begins searching for a valid frequency. 0x22 FM_TUNE_STATUS Queries the status of previous FM_TUNE_FREQ or FM_SEEK_START com- mand. 0x23 FM_RSQ_STATUS Queries the status of the Received Signal Quality (RSQ) of the current channel. 0x24 FM_RDS_STATUS1 Returns RDS information for current channel and reads an entry from RDS FIFO (Si4705/06/21/31/35/37/39/41/49 only). 0x27 FM_AGC_STATUS Queries the current AGC settings 0x28 FM_AGC_OVERRIDE Override AGC setting by disabling and forcing it to a fixed value 0x80 GPIO_CTL2 Configures GPO1, 2, and 3 as output or Hi-Z. 0x81 GPIO_SET2 Sets GPO1, 2, and 3 output level (low or high). Notes: 1. RDS feature (command FM_RDS_STATUS and property RDS_INT_SOURCE, RDS_INT_FIFO_COUNT, and RDS_CONFIG) is supported in FMRX component 2.0 or higher. 2. GPO feature (command GPIO_CTL and GPIO_SET) is fully supported in FMRX component 2.0 or higher. It is partially supported (GPO3 only) in FMRX component 1.0 Table 9. FM/RDS Receiver Property Summary Prop Name Description Default 0x0001 GPO_IEN Enables interrupt sources. 0x0000 0x0102 DIGITAL_OUTPUT_ FORMAT1 Configure digital audio outputs (Si4705/21/31/35/37/39 only) 0x0000 0x0104 DIGITAL_OUTPUT_ SAMPLE_RATE1 Configure digital audio output sample rate (Si4705/21/31/35/37/39 only) 0x0000 Notes: 1. Digital Audio Output feature (property DIGITAL_OUTPUT_FORMAT and DIGITAL_OUTPUT_SAMPLE_RATE) is supported in FMRX component 2.0 or higher. Digital Audio Output featured is not supported on Si4741 FMRX component 2A.7. 2. RDS feature (command FM_RDS_STATUS and property RDS_INT_SOURCE, RDS_INT_FIFO_COUNT, and RDS_CONFIG) is supported in FMRX component 2.0 or higher.

53 0x0201 REFCLK_FREQ Sets frequency of reference clock in Hz. The range is 31130 to 34406 Hz, or 0 to disable the AFC. Default is 32768 Hz. 0x8000 0x0202 REFCLK_PRESCALE Sets the prescaler value for RCLK input. 0x0001 0x1100 FM_DEEMPHASIS Sets deemphasis time constant. Default is 75 µs. (Not applicable for Si4749.) 0x0002 0x1102 FM_CHANNEL_FILTER Sets state of the channel filter for demodulator (Si4706/49 only). 0x0000 0x1105 FM_BLEND_STEREO_ THRESHOLD Sets RSSI threshold for stereo blend (Full stereo above threshold, blend below threshold). To force stereo set this to 0. To force mono set this to 127. Default value is 49 dBµV. (Not applicable for Si4740/41/49.) 0x0031 0x1106 FM_BLEND_MONO_ THRESHOLD Sets RSSI threshold for mono blend (Full mono below threshold, blend above threshold). To force stereo set this to 0. To force mono set this to 127. Default value is 30 dBµV. (Not applicable for Si4740/41/49.) 0x001E 0x1107 FM_ANTENNA_INPUT Selects the antenna type and the pin to which it is connected. (Si4704/05/06/20/21 only). 0x0000 0x1108 FM_MAX_TUNE_ ERROR Sets the maximum freq error allowed before setting the AFC rail (AFCRL) indicator. Default value is 30 kHz. 0x001E 0x1200 FM_RSQ_INT_ SOURCE Configures interrupt related to Received Signal Quality metrics. 0x0000 0x1201 FM_RSQ_SNR_HI_ THRESHOLD Sets high threshold for SNR interrupt. 0x007F 0x1202 FM_RSQ_SNR_LO_ THRESHOLD Sets low threshold for SNR interrupt. 0x0000 0x1203 FM_RSQ_RSSI_HI_ THRESHOLD Sets high threshold for RSSI interrupt. 0x007F 0x1204 FM_RSQ_RSSI_LO_ THRESHOLD Sets low threshold for RSSI interrupt. 0x0000 0x1205 FM_RSQ_MULTIPATH_HI_ THRESHOLD Sets high threshold for multipath interrupt (Si4706/40/41/49 only) 0x007F 0x1206 FM_RSQ_MULTIPATH_ LO_THRESHOLD Sets low threshold for multipath interrupt (Si4706/40/41/49 only) 0x0000 0x1207 FM_RSQ_BLEND_ THRESHOLD Sets the blend threshold for blend interrupt when boundary is crossed. 0x0081 0x1300 FM_SOFT_MUTE_RATE Sets the attack and decay rates when entering and leaving soft mute. (Not applicable for Si4749.) 0x0040 0x1302 FM_SOFT_MUTE_ MAX_ATTENUATION Sets maximum attenuation during soft mute (dB). Set to 0 to dis- able soft mute. Default is 16 dB. (Not applicable for Si4749.) 0x0010 0x1303 FM_SOFT_MUTE_ SNR_THRESHOLD Sets SNR threshold to engage soft mute. Default is 4 dB. (Not applicable for Si4749.) 0x0004 Table 9. FM/RDS Receiver Property Summary (Continued) Prop Name Description Default Notes: 1. Digital Audio Output feature (property DIGITAL_OUTPUT_FORMAT and DIGITAL_OUTPUT_SAMPLE_RATE) is supported in FMRX component 2.0 or higher. Digital Audio Output featured is not supported on Si4741 FMRX component 2A.7. 2. RDS feature (command FM_RDS_STATUS and property RDS_INT_SOURCE, RDS_INT_FIFO_COUNT, and RDS_CONFIG) is supported in FMRX component 2.0 or higher.

0x1400 FM_SEEK_BAND_ BOTTOM Sets the bottom of the FM band for seek. Default is 8750 (87.5 MHz). 0x222E 0x1401 FM_SEEK_BAND_TOP Sets the top of the FM band for seek. Default is 10790 (107.9 MHz). 0x2A26 0x1402 FM_SEEK_FREQ_ SPACING Selects frequency spacing for FM seek. Default value is 10 (100 kHz). 0x000A 0x1403 FM_SEEK_TUNE_ SNR_THRESHOLD Sets the SNR threshold for a valid FM Seek/Tune. Default value is 3 dB. 0x0003 0x1404 FM_SEEK_TUNE_ RSSI_TRESHOLD Sets the RSSI threshold for a valid FM Seek/Tune. Default value is 20 dBµV. 0x0014 0x1500 RDS_INT_SOURCE2 Configures RDS interrupt behavior (Si4705/06/21/31/35/37/39/41/49 only). 0x0000 0x1501 RDS_INT_FIFO_ COUNT2 Sets the minimum number of RDS groups stored in the receive FIFO required before RDSRECV is set (Si4705/06/21/31/35/37/39/41/49 only). 0x0000 0x1502 RDS_CONFIG2 Configures RDS setting (Si4705/06/21/31/35/37/39/41/49 only). 0x0000 0x1503 FM_RDS_CONFIDENCE Sets the confidence level threshold for each RDS block (Si4706/49 only). 0x1111 0x1800 FM_BLEND_RSSI_ STEREO_THRESHOLD Sets RSSI threshold for stereo blend (Full stereo above threshold, blend below threshold). To force stereo, set this to 0. To force mono, set this to 127. Default value is 49 dBμV. (Si4740/41 Only) 0x0031 0x1801 FM_BLEND_RSSI_MONO_ THRESHOLD Sets RSSI threshold for mono blend (Full mono below threshold, blend above threshold). To force stereo, set this to 0. To force mono, set this to 127. Default value is 30 dBμV. (Si4740/41 Only) 0x001E 0x1802 FM_BLEND_RSSI_ ATTACK_RATE Sets the stereo to mono attack rate for RSSI based blend. Smaller values provide slower attack and larger values provide faster attack. The default is 1000 (approximately 33 ms for 63% change). (Si4740/41 Only) 0x03E8 0x1803 FM_BLEND_RSSI_ RELEASE_RATE Sets the mono to stereo release rate for RSSI based blend. Smaller values provide slower release and larger values provide faster release. The default is 100 (approximately 330 ms for 63% change). (Si4740/41 Only) 0x0064 0x1804 FM_BLEND_SNR_ STEREO_THRESHOLD Sets SNR threshold for stereo blend (Full stereo above threshold, blend below threshold). To force stereo, set this to 0. To force mono, set this to 127. Default value is 30 dB. (Si4740/41 Only) 0x001E 0x1805 FM_BLEND_SNR_MONO_ THRESHOLD Sets SNR threshold for mono blend (Full mono below threshold, blend above threshold). To force stereo, set this to 0. To force mono, set this to 127. Default value is 10 dB. (Si4740/41 Only) NOTE: With FW 2Ab7, suggest reprogramming to 14 dB. Default is changing to 14 dB on next FW revision. 0x000A Table 9. FM/RDS Receiver Property Summary (Continued) Prop Name Description Default Notes: 1. Digital Audio Output feature (property DIGITAL_OUTPUT_FORMAT and DIGITAL_OUTPUT_SAMPLE_RATE) is supported in FMRX component 2.0 or higher. Digital Audio Output featured is not supported on Si4741 FMRX component 2A.7. 2. RDS feature (command FM_RDS_STATUS and property RDS_INT_SOURCE, RDS_INT_FIFO_COUNT, and RDS_CONFIG) is supported in FMRX component 2.0 or higher.

55 0x1806 FM_BLEND_SNR_ATTACK _RATE Sets the stereo to mono attack rate for SNR based blend. Smaller values provide slower attack and larger values provide faster attack. The default is 1000 (approximately 33 ms for 63% change). (Si4740/41 Only) 0x03E8 0x1807 FM_BLEND_SNR_ RELEASE_RATE Sets the mono to stereo release rate for SNR based blend. Smaller values provide slower release and larger values provide faster release. The default is 100 (approximately 330ms for 63% change). (Si4740/41 Only) 0x0064 0x1808 FM_BLEND_MULTIPATH_ STEREO_THRESHOLD Sets multipath threshold for stereo blend (Full stereo above threshold, blend below threshold). To force stereo, set this to 0. To force mono, set this to 50. Default value is 40. (Si4740/41 Only) 0x0028 0x1809 FM_BLEND_MULTIPATH_ MONO_THRESHOLD Sets multipath threshold for mono blend (Full mono below thresh- old, blend above threshold). To force stereo, set this to 0. To force mono, set this to 50. Default value is 10. (Si4740/41 Only) 0x000A 0x180A FM_BLEND_MULTIPATH_ ATTACK_RATE Sets the stereo to mono attack rate for multipath based blend. Smaller values provide slower attack and larger values provide faster attack. The default is 1000 (approximately 33ms for 63% change). (Si4740/41 Only) 0x03E8 0x180B FM_BLEND_MULTIPATH_ RELEASE_RATE Sets the mono to stereo release rate for multipath based blend. Smaller values provide slower release and larger values provide faster release. The default is 10 (approximately 3.3s for 63% change). (Si4740/41 Only) 0x000A 0x4000 RX_VOLUME Sets the output volume. (Not applicable for Si4749.) 0x003F 0x4001 RX_HARD_MUTE Mutes the audio output. L and R audio outputs may be muted independently. (Not applicable for Si4749.) 0x0000 0x4100 RF_AGC_ATTACK_RATE Sets the RF AGC attack rate. Larger values provide slower attack and smaller values provide faster attack. The default is 1 (approx- imately 2.7 ms/dB). (Si4740/41 Only) NOTE: With FW 2Ab7, the default 1 is equivalent to 4. Default changing to 4 on next FW revision. 0x0001 0x4101 RF_AGC_RELEASE_RATE Sets the RF AGC release rate. Larger values provide slower release and smaller values provide faster release. The default is 140 (approximately 93 ms/dB). (Si4740/41 Only) 0x008C Table 9. FM/RDS Receiver Property Summary (Continued) Prop Name Description Default Notes: 1. Digital Audio Output feature (property DIGITAL_OUTPUT_FORMAT and DIGITAL_OUTPUT_SAMPLE_RATE) is supported in FMRX component 2.0 or higher. Digital Audio Output featured is not supported on Si4741 FMRX component 2A.7. 2. RDS feature (command FM_RDS_STATUS and property RDS_INT_SOURCE, RDS_INT_FIFO_COUNT, and RDS_CONFIG) is supported in FMRX component 2.0 or higher.

Table 10. Status Response for the FM/RDS Receiver Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X RSQINT RDSINT X STCINT Bit Name Function 7 CTS Clear to Send. 0 = Wait before sending next command. 1 = Clear to send next command. 6 ERR Error. 0 = No error 1 = Error 5:4 Reserved Values may vary. 3 RSQINT Received Signal Quality Interrupt. 0 = Received Signal Quality measurement has not been triggered. 1 = Received Signal Quality measurement has been triggered. 2 RDSINT Radio Data System (RDS) Interrupt (Si4705/06/21/31/35/37/39/41/49 Only). 0 = Radio data system interrupt has not been triggered. 1 = Radio data system interrupt has been triggered. 1 Reserved Values may vary. 0 STCINT Seek/Tune Complete Interrupt. 0 = Tune complete has not been triggered. 1 = Tune complete has been triggered.

57 5.2.1. FM/RDS Receiver Commands Command 0x01. POWER_UP Initiates the boot process to move the device from powerdown to powerup mode. The boot can occur from internal device memory or a system controller downloaded patch. To confirm that the patch is compatible with the internal device library revision, the library revision should be confirmed by issuing the POWER_UP command with FUNC = 15 (query library ID). The device returns the response, including the library revision, and then moves into powerdown mode. The device can then be placed in powerup mode by issuing the POWER_UP command with FUNC = 0 (FM Receive) and the patch may be applied (See Section "7.2. Powerup from a Component Patch" on page 178). The POWER_UP command configures the state of ROUT (pin 13) and LOUT (pin 14) for analog audio mode and GPO2/INT (pin 18) for interrupt operation. For the Si4731-B20, the POWER_UP command also configures the state of GPO3/DCLK (pin 17), DFS (pin 16), and DOUT (pin 15) for digital audio mode. The command configures GPO2/INT interrupts (GPO2OEN) and CTS interrupts (CTSIEN). If both are enabled, GPO2/INT is driven high during normal operation and low for a minimum of 1 µs during the interrupt. The CTSIEN bit is duplicated in the GPO_IEN property. The command is complete when the CTS bit (and optional interrupt) is set. Note: To change function (e.g. FM RX to AM RX or FM RX to FM TX), issue POWER_DOWN command to stop current func- tion; then, issue POWER_UP to start new function. Command Arguments: Two Response Bytes: None (FUNC = 0), Seven (FUNC = 15) Command Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 0 0 0 0 0 1 ARG1 CTSIEN GPO2OEN PATCH XOSCEN FUNC[3:0] ARG2 OPMODE[7:0] ARG Bit Name Function 1 7 CTSIEN CTS Interrupt Enable. 0 = CTS interrupt disabled. 1 = CTS interrupt enabled. 1 6 GPO2OEN GPO2 Output Enable. 0 = GPO2 output disabled. 1 = GPO2 output enabled. 1 5 PATCH Patch Enable. 0 = Boot normally. 1 = Copy NVM to RAM, but do not boot. After CTS has been set, RAM may be patched. 1 4 XOSCEN Crystal Oscillator Enable. 0 = Use external RCLK (crystal oscillator disabled). 1 = Use crystal oscillator (RCLK and GPO3/DCLK with external 32.768 kHz crys- tal and OPMODE=00000101). See Si47xx Data Sheet Application Schematic for external BOM details.

Response (FUNC = 0, FM Receive) Response (FUNC = 15, Query Library ID) 1 3:0 FUNC[3:0] Function. 0 = FM Receive. 1–14 = Reserved. 15 = Query Library ID. 2 7:0 OPMODE[7:0] Application Setting. 00000101 = Analog audio outputs (LOUT/ROUT). 10110000 = Digital audio outputs (DCLK, DFS, DIO) (Si4705/21/31/35/37/39 component 2.0 or higher with XOSCEN = 0). 10110101 = Analog and digital audio outputs (LOUT/ROUT and DCLK, DFS, DIO) (Si4705/21/31/35/37/39 component 2.0 or higher with XOSCEN = 0). Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X RSQINT RDSINT X STCINT Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X RSQINT RDSINT X STCINT RESP1 PN[7:0] RESP2 FWMAJOR[7:0] RESP3 FWMINOR[7:0] RESP4 RESERVED[7:0] RESP5 RESERVED[7:0] RESP6 CHIPREV[7:0] RESP7 LIBRARYID[7:0] RESP Bit Name Function 1 7:0 PN[7:0] Final 2 digits of part number (HEX). 2 7:0 FWMAJOR[7:0] Firmware Major Revision (ASCII). 3 7:0 FWMINOR[7:0] Firmware Minor Revision (ASCII). 4 7:0 RESERVED[7:0] Reserved, various values. 5 7:0 RESERVED[7:0] Reserved, various values. 6 7:0 CHIPREV[7:0] Chip Revision (ASCII). 7 7:0 LIBRARYID[7:0] Library Revision (HEX).

59 Command 0x10. GET_REV Returns the part number, chip revision, firmware revision, patch revision and component revision numbers. The command is complete when the CTS bit (and optional interrupt) is set. This command may only be sent when in powerup mode. Command arguments: None Response bytes: Eight Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 0 1 0 0 0 0 Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X RSQINT RDSINT X STCINT RESP1 PN[7:0] RESP2 FWMAJOR[7:0] RESP3 FWMINOR[7:0] RESP4 PATCHH[7:0] RESP5 PATCHL[7:0] RESP6 CMPMAJOR[7:0] RESP7 CMPMINOR[7:0] RESP8 CHIPREV[7:0] RESP Bit Name Function 1 7:0 PN[7:0] Final 2 digits of Part Number (HEX). 2 7:0 FWMAJOR[7:0] Firmware Major Revision (ASCII). 3 7:0 FWMINOR[7:0] Firmware Minor Revision (ASCII). 4 7:0 PATCHH[7:0] Patch ID High Byte (HEX). 5 7:0 PATCHL[7:0] Patch ID Low Byte (HEX). 6 7:0 CMPMAJOR[7:0] Component Major Revision (ASCII). 7 7:0 CMPMINOR[7:0] Component Minor Revision (ASCII). 8 7:0 CHIPREV[7:0] Chip Revision (ASCII).

Command 0x11. POWER_DOWN Moves the device from powerup to powerdown mode. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. Note that only the POWER_UP command is accepted in powerdown mode. If the system controller writes a command other than POWER_UP when in powerdown mode, the device does not respond. The device will only respond when a POWER_UP command is written. Note: In FMRX component 1.0, a reset is required when the system controller writes a command other than POWER_UP when in powerdown mode. Command arguments: None Response bytes: None Command Response Command 0x12. SET_PROPERTY Sets a property shown in Table 9, “FM/RDS Receiver Property Summary,” on page 52. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. See Figure 18, “CTS and SET_PROPERTY Command Complete tCOMP Timing Model,” on page 187 and Table 42, “Command Timing Parameters for the FM Receiver,” on page 188. Command Arguments: Five Response bytes: None Command Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 0 1 0 0 0 1 Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X RSQINT RDSINT X STCINT Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 0 1 0 0 1 0 ARG1 0 0 0 0 0 0 0 0 ARG2 PROPH[7:0] ARG3 PROPL[7:0] ARG4 PROPDH[7:0] ARG5 PROPDL[7:0]

61 Command 0x13. GET_PROPERTY Gets a property as shown in Table 9, “FM/RDS Receiver Property Summary,” on page 52. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. Command arguments: Three Response bytes: Three Command ARG Bit Name Function 1 7:0 Reserved Always write to 0. 2 7:0 PROPH[7:0] Property High Byte. This byte in combination with PROPL is used to specify the property to modify. 3 7:0 PROPL[7:0] Property Low Byte. This byte in combination with PROPH is used to specify the property to modify. 4 7:0 PROPDH[7:0] Property Value High Byte. This byte in combination with PROPDL is used to set the property value. 5 7:0 PROPDL[7:0] Property Value Low Byte. This byte in combination with PROPDH is used to set the property value. Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 0 1 0 0 1 1 ARG1 0 0 0 0 0 0 0 0 ARG2 PROPH[7:0] ARG3 PROPL[7:0] ARG Bit Name Function 1 7:0 Reserved Always write to 0. 2 7:0 PROPH[7:0] Property High Byte. This byte in combination with PROPL is used to specify the property to get. 3 7:0 PROPL[7:0] Property Low Byte. This byte in combination with PROPH is used to specify the property to get.

Response Command 0x14. GET_INT_STATUS Updates bits 6:0 of the status byte. This command should be called after any command that sets the STCINT, RDSINT, or RSQINT bits. When polling this command should be periodically called to monitor the STATUS byte, and when using interrupts, this command should be called after the interrupt is set to update the STATUS byte. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be set when in powerup mode. Command arguments: None Response bytes: None Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X RSQINT RDSINT X STCINT RESP1 0 0 0 0 0 0 0 0 RESP2 PROPDH[7:0] RESP3 PROPDL[7:0] RESP Bit Name Function 1 7:0 Reserved Always returns 0. 2 7:0 PROPDH[7:0] Property Value High Byte. This byte in combination with PROPDL represents the requested property value. 3 7:0 PROPDL[7:0] Property Value High Byte. This byte in combination with PROPDH represents the requested property value. Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 0 1 0 1 0 0 Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X RSQINT RDSINT X STCINT

63 Command 0x20. FM_TUNE_FREQ Sets the FM Receive to tune a frequency between 64 and 108 MHz in 10 kHz units. The CTS bit (and optional interrupt) is set when it is safe to send the next command. The ERR bit (and optional interrupt) is set if an invalid argument is sent. Note that only a single interrupt occurs if both the CTS and ERR bits are set. The optional STC interrupt is set when the command completes. The STCINT bit is set only after the GET_INT_STATUS command is called. This command may only be sent when in powerup mode. The command clears the STC bit if it is already set. See Figure 17, “CTS and STC Timing Model,” on page 187 and Table 42, “Command Timing Parameters for the FM Receiver,” on page 188. Note: For FMRX components less than 2.0, tuning range is 76–108 MHz. Command arguments: Four Response bytes: None Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 1 0 0 0 0 0 ARG1 0 0 0 0 0 0 0 0 ARG2 FREQH[7:0] ARG3 FREQL[7:0] ARG4 ANTCAP[7:0] ARG Bit Name Function 1 7:0 Reserved Always write to 0. 2 7:0 FREQH[7:0] Tune Frequency High Byte. This byte in combination with FREQL selects the tune frequency in 10 kHz. In FM mode the valid range is from 6400 to 10800 (64–108 MHz). 3 7:0 FREQL[7:0] Tune Frequency Low Byte. This byte in combination with FREQH selects the tune frequency in 10 kHz. In FM mode the valid range is from 6400 to 10800 (64–108 MHz). 4 7:0 ANTCAP[7:0] Antenna Tuning Capacitor (valid only when using TXO/LPI pin as the antenna input). This selects the value of the antenna tuning capacitor manually, or automati- cally if set to zero. The valid range is 0 to 191. Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X RSQINT RDSINT X STCINT

Command 0x21. FM_SEEK_START Begins searching for a valid frequency. Clears any pending STCINT or RSQINT interrupt status. The CTS bit (and optional interrupt) is set when it is safe to send the next command. The ERR bit (and optional interrupt) is set if an invalid argument is sent. Note that only a single interrupt occurs if both the CTS and ERR bits are set. The optional STC interrupt is set when the command completes. The STCINT bit is set only after the GET_INT_STATUS command is called. This command may only be sent when in powerup mode. The command clears the STCINT bit if it is already set. See Figure 17, “CTS and STC Timing Model,” on page 187 and Table 42, “Command Timing Parameters for the FM Receiver,” on page 188. Command arguments: One Response bytes: None Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 1 0 0 0 0 1 ARG1 0 0 0 0 SEEKUP WRAP 0 0 ARG Bit Name Function 1 7:4 Reserved Always write to 0. 1 3 SEEKUP Seek Up/Down. Determines the direction of the search, either UP = 1, or DOWN = 0. 1 2 WRAP Wrap/Halt. Determines whether the seek should Wrap = 1, or Halt = 0 when it hits the band limit. 1 1:0 Reserved Always write to 0. Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X RSQINT RDSINT X STCINT

65 Command 0x22. FM_TUNE_STATUS Returns the status of FM_TUNE_FREQ or FM_SEEK_START commands. The commands returns the current frequency, RSSI, SNR, and the antenna tuning capacitance value (0-191). The command clears the STCINT interrupt bit when INTACK bit of ARG1 is set. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. Command arguments: One Response bytes: Seven Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 1 0 0 0 1 0 ARG1 0 0 0 0 0 0 CANCEL INTACK ARG Bit Name Function 1 7:2 Reserved Always write to 0. 1 1 CANCEL Cancel seek. If set, aborts a seek currently in progress. 1 0 INTACK Seek/Tune Interrupt Clear. If set, clears the seek/tune complete interrupt status indicator. Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X RSQINT RDSINT X STCINT RESP1 BLTF X X X X X AFCRL VALID RESP2 READFREQH[7:0] RESP3 READFREQL[7:0] RESP4 RSSI[7:0] RESP5 SNR[7:0] RESP6 MULT[7:0] RESP7 READANTCAP[7:0]

RESP Bit Name Function 1 7 BLTF Band Limit. Reports if a seek hit the band limit (WRAP = 0 in FM_START_SEEK) or wrapped to the original frequency (WRAP = 1). 1 6:2 Reserved Always returns 0. 1 1 AFCRL AFC Rail Indicator. Set if the AFC rails. 1 0 VALID Valid Channel. Set if the channel is currently valid as determined by the seek/tune proper- ties (0x1403, 0x1404) and would have been found during a Seek. 2 7:0 READFREQH[7:0] Read Frequency High Byte. This byte in combination with READFREQL returns frequency being tuned (10 kHz). 3 7:0 READFREQL[7:0] Read Frequency Low Byte. This byte in combination with READFREQH returns frequency being tuned (10 kHz). 4 7:0 RSSI[7:0] Received Signal Strength Indicator. This byte contains the receive signal strength when tune is complete (dBµV). 5 7:0 SNR[7:0] SNR. This byte contains the SNR metric when tune is complete (dB). 6 7:0 MULT[7:0] Multipath (Si4706/40/41/49 Only). This byte contains the multipath metric when tune is complete. 7 7:0 READANTCAP [7:0] Read Antenna Tuning Capacitor. This byte contains the current antenna tuning capacitor value.

67 Command 0x23. FM_RSQ_STATUS Returns status information about the received signal quality. The commands returns the RSSI, SNR, frequency offset, and stereo blend percentage. It also indicates valid channel (VALID), soft mute engagement (SMUTE), and AFC rail status (AFCRL). This command can be used to check if the received signal is above the RSSI high threshold as reported by RSSIHINT, or below the RSSI low threshold as reported by RSSILINT. It can also be used to check if the signal is above the SNR high threshold as reported by SNRHINT, or below the SNR low threshold as reported by SNRLINT. For the Si4706/40/41/49, it can be used to check if the detected multipath is above the Multipath high threshold as reported by MULTHINT, or below the Multipath low threshold as reported by MULTLINT. If the PILOT indicator is set, it can also check whether the blend has crossed a threshold as indicated by BLENDINT. The command clears the RSQINT, BLENDINT, SNRHINT, SNRLINT, RSSIHINT, RSSILINT, MULTHINT, and MULTLINT interrupt bits when INTACK bit of ARG1 is set. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. Command arguments: One Response bytes: Seven Command Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 1 0 0 0 1 1 ARG1 0 0 0 0 0 0 0 INTACK ARG Bit Name Function 1 0 INTACK Interrupt Acknowledge. 0 = Interrupt status preserved. 1 = Clears RSQINT, BLENDINT, SNRHINT, SNRLINT, RSSIHINT, RSSILINT, MULTHINT, MULTLINT.

Response Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X RSQINT RDSINT X STCINT RESP1 BLENDINT X MULTHINT MULTLINT SNRHINT SNRLINT RSSIHINT RSSIILINT RESP2 X X X X SMUTE X AFCRL VALID RESP3 PILOT STBLEND[6:0] RESP4 RSSI[7:0] RESP5 SNR[7:0] RESP6 MULT[7:0] RESP7 FREQOFF[7:0] RESP Bit Name Function 1 7 BLENDINT Blend Detect Interrupt. 0 = Blend is within the Blend threshold settings. 1 = Blend goes above or below the Blend threshold settings. 1 5 MULTHINT Multipath Detect High (Si4706/40/41/49 Only). 0 = Detected multipath value has not exceeded above the Multipath high threshold. 1 = Detected multipath value has exceeded above the Multipath high threshold. 1 4 MULTLINT Multipath Detect Low (Si4706/40/41/49 Only). 0 = Detected multipath value has not fallen below the Multipath low threshold. 1 = Detected multipath value has fallen below the Multipath low threshold. 1 3 SNRHINT SNR Detect High. 0 = Received SNR has not exceeded above SNR high threshold. 1 = Received SNR has exceeded above SNR high threshold. 1 2 SNRLINT SNR Detect Low. 0 = Received SNR has not fallen below SNR low threshold. 1 = Received SNR has fallen below SNR low threshold. 1 1 RSSIHINT RSSI Detect High. 0 = RSSI has not exceeded above RSSI high threshold. 1 = RSSI has exceeded above RSSI high threshold. 1 0 RSSILINT RSSI Detect Low. 0 = RSSI has not fallen below RSSI low threshold. 1 = RSSI has fallen below RSSI low threshold. 2 3 SMUTE Soft Mute Indicator. Indicates soft mute is engaged. 2 1 AFCRL AFC Rail Indicator. Set if the AFC rails. 2 0 VALID Valid Channel. Set if the channel is currently valid and would have been found during a Seek. 3 7 PILOT Pilot Indicator. Indicates stereo pilot presence. 3 6:0 STBLEND[6:0] Stereo Blend Indicator. Indicates amount of stereo blend in% (100 = full stereo, 0 = full mono).

69 4 7:0 RSSI[7:0] Received Signal Strength Indicator. Contains the current receive signal strength (0–127 dBµV). 5 7:0 SNR[7:0] SNR. Contains the current SNR metric (0–127 dB). 6 7:0 MULT[7:0] Multipath (Si4706/40/41/49 Only). Contains the current multipath metric. (50 = no multipath; 0 = full multipath) 7 7:0 FREQOFF[7:0] Frequency Offset. Signed frequency offset (kHz).

Command 0x24. FM_RDS_STATUS (Si4705/06/21/31/35/37/29/41/49 Only) Returns RDS information for current channel and reads an entry from the RDS FIFO. RDS information includes synch status, FIFO status, group data (blocks A, B, C, and D), and block errors corrected. This command clears the RDSINT interrupt bit when INTACK bit in ARG1 is set and, if MTFIFO is set, the entire RDS receive FIFO is cleared (FIFO is always cleared during FM_TUNE_FREQ or FM_SEEK_START). The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in power up mode. Notes: 1. FM_RDS_STATUS is supported in FMRX comp 2.0 or higher. 2. MTFIFO is not supported in FMRX comp 2.0. Command arguments: One Response bytes: Twelve Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 1 0 0 1 0 0 ARG1 0 0 0 0 0 STATUSONLY MTFIFO INTACK ARG Bit Name Function 1 2 STATUSONLY Status Only (Si4706/49 Only) Determines if data should be removed from the RDS FIFO. 0 = Data in BLOCKA, BLOCKB, BLOCKC, BLOCKD, and BLE contain the oldest data in the RDS FIFO. 1 = Data in BLOCKA will contain the last valid block A data received for the cur- rent station. Data in BLOCKB will contain the last valid block B data received for the current station. Data in BLE will describe the bit errors for the data in BLOCKA and BLOCKB. 1 1 MTFIFO Empty FIFO 0 = If FIFO not empty, read and remove oldest FIFO entry. 1 = Clear RDS Receive FIFO. 1 0 INTACK Interrupt Acknowledge 0 = RDSINT status preserved. 1 = Clears RDSINT. Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X RSQINT RDSINT X STCINT RESP1 X X RDSNEWBLOCKB RDSNEWBLOCKA X RDSSYNCFOUND RDSSYNCLOST RDSRECV RESP2 X X X X X GRPLOST X RDSSYNC RESP3 RDSFIFOUSED[7:0]

71 RESP4 BLOCKA[15:8] RESP5 BLOCKA[7:0] RESP6 BLOCKB[15:8] RESP7 BLOCKB[7:0] RESP8 BLOCKC[15:8] RESP9 BLOCKC[7:0] RESP10 BLOCKD[15:8] RESP11 BLOCKD[7:0] RESP12 BLEA[1:0] BLEB[1:0] BLEC[1:0] BLED[1:0] RESP Bit Name Function 1 5 RDSNEWBLOCKB RDS New Block B (Si4707/49 Only). 1 = Valid Block B data has been received. 1 4 RDSNEWBLOCKA RDS New Block A (Si4707/49 Only). 1 = Valid Block A data has been received. 1 2 RDSSYNCFOUND RDS Sync Found. 1 = Found RDS synchronization. 1 1 RDSSYNCLOST RDS Sync Lost. 1 = Lost RDS synchronization. 1 0 RDSRECV RDS Received. 1 = FIFO filled to minimum number of groups set by RDSFIFOCNT. 2 2 GRPLOST Group Lost. 1 = One or more RDS groups discarded due to FIFO overrun. 2 0 RDSSYNC RDS Sync. 1 = RDS currently synchronized. 3 7:0 RDSFIFOUSED RDS FIFO Used. Number of groups remaining in the RDS FIFO (0 if empty). If non-zero, BLOCKA-BLOCKD contain the oldest FIFO entry and RDSFIFOUSED decre- ments by one on the next call to RDS_FIFO_STATUS (assuming no RDS data received in the interim). 4 7:0 BLOCKA[15:8] RDS Block A. Block A group data from oldest FIFO entry if STATUSONLY is 0. Last valid Block A data if STATUSONLY is 1 (Si4706/49 only). 5 7:0 BLOCKA[7:0] Bit D7 D6 D5 D4 D3 D2 D1 D0

Command 0x27. FM_AGC_STATUS Returns the AGC setting of the device. The command returns whether the AGC is enabled or disabled and it returns the LNA Gain index. This command may only be sent when in powerup mode. Command arguments: None Response bytes: Two Command Response 6 7:0 BLOCKB[15:8] RDS Block B. Block B group data from oldest FIFO entry if STATUSONLY is 0. Last valid Block B data if STATUSONLY is 1 (Si4706/49 only). 7 7:0 BLOCKB[7:0] 8 7:0 BLOCKC[15:8] RDS Block C. Block C group data from oldest FIFO entry. 9 7:0 BLOCKC[7:0] 10 7:0 BLOCKD[15:8] RDS Block D. Block D group data from oldest FIFO entry. 11 7:0 BLOCKD[7:0] 12 7:6 BLEA[1:0] RDS Block A Corrected Errors. 0 = No errors. 1 = 1–2 bit errors detected and corrected. 2 = 3–5 bit errors detected and corrected. 3 = Uncorrectable. 12 5:4 BLEB[1:0] RDS Block B Corrected Errors. 0 = No errors. 1 = 1–2 bit errors detected and corrected. 2 = 3–5 bit errors detected and corrected. 3 = Uncorrectable. 12 3:2 BLEC[1:0] RDS Block C Corrected Errors. 0 = No errors. 1 = 1–2 bit errors detected and corrected. 2 = 3–5 bit errors detected and corrected. 3 = Uncorrectable. 12 1:0 BLED[1:0] RDS Block D Corrected Errors. 0 = No errors. 1 = 1–2 bit errors detected and corrected. 2 = 3–5 bit errors detected and corrected. 3 = Uncorrectable. Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 1 0 0 1 1 1 Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X RSQINT RDSINT X STCINT

73 RESP1 X X X X X X X READ_RF AGCDIS RESP2 X X X READ_LNA_GAIN_INDEX[4:0] RESP Bit Name Function 1 0 READ_RFAGCDIS This bit indicates whether the RF AGC is disabled or not 0 = RF AGC is enabled 1 = RF AGC is disabled 2 4:0 READ_LNA_GAIN_INDEX These bits returns the value of the LNA GAIN index 0 = Minimum attenuation (max gain) 1 – 25 = Intermediate attenuation 26 = Maximum attenuation (min gain) Note: the max index is subject to change

Command 0x28. FM_AGC_OVERRIDE Overrides AGC setting by disabling the AGC and forcing the LNA to have a certain gain that ranges between 0 (minimum attenuation) and 26 (maximum attenuation). This command may only be sent when in powerup mode. Command arguments: Two Response bytes: None Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 0 0 1 0 1 0 0 0 ARG1 X X X X X X X RFAGCDIS ARG2 X X X LNA_GAIN_INDEX[4:0] ARG Bit Name Function 1 0 RFAGCDIS This bit selects whether the RF AGC is disabled or not 0 = RF AGC is enabled 1 = RF AGC is disabled 2 4:0 LNA_GAIN_INDEX These bits set the value of the LNA GAIN index 0 = Minimum attenuation (max gain) 1 – 25 = Intermediate attenuation 26 = Maximum attenuation (min gain) Note: the max index is subject to change Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X RSQINT RDSINT X STCINT

75 Command 0x80. GPIO_CTL Enables output for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output (Hi-Z or active drive) by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit. The state (high or low) of GPO1, 2, and 3 is set with the GPIO_SET command. To avoid excessive current consumption due to oscillation, GPO pins should not be left in a high impedance state. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. The default is all GPO pins set for high impedance. Notes: 1. GPIO_CTL is fully supported in FMRX component 2.0 or higher. Only bit GPO3OEN is supported in FMRX comp 1.0. 2. The use of GPO2 as an interrupt pin and/or the use of GPO3 as DCLK digital clock input will override this GPIO_CTL function for GPO2 and/or GPO3 respectively. Command arguments: One Response bytes: None Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 1 0 0 0 0 0 0 0 ARG1 0 0 0 0 GPO3OEN GPO2OEN GPO1OEN 0 ARG Bit Name Function 1 7:4 Reserved Always write 0. 1 3 GPO3OEN GPO3 Output Enable. 0 = Output Disabled (Hi-Z) (default). 1 = Output Enabled. 1 2 GPO2OEN GPO2 Output Enable. 0 = Output Disabled (Hi-Z) (default). 1 = Output Enabled. 1 1 GPO1OEN GPO1 Output Enable. 0 = Output Disabled (Hi-Z) (default). 1 = Output Enabled. 1 0 Reserved Always write 0. Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X X RDSINT ASQINT STCINT

Command 0x81. GPIO_SET Sets the output level (high or low) for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit in the GPIO_CTL command. To avoid excessive current consumption due to oscillation, GPO pins should not be left in a high impedance state. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is all GPO pins set for high impedance. Note: GPIO_SET is fully-supported in FMRX comp 2.0 or higher. Only bit GPO3LEVEL is supported in FMRX comp 1.0. Command arguments: One Response bytes: None Command Response Bit D7 D6 D5 D4 D3 D2 D1 D0 CMD 1 0 0 0 0 0 0 1 ARG1 0 0 0 0 GPO3LEVEL GPO2LEVEL GPO1LEVEL 0 ARG Bit Name Function 1 7:4 Reserved Always write 0. 1 3 GPO3LEVEL GPO3 Output Level. 0 = Output low (default). 1 = Output high. 1 2 GPO2LEVEL GPO3 Output Level. 0 = Output low (default). 1 = Output high. 1 1 GPO1LEVEL GPO3 Output Level. 0 = Output low (default). 1 = Output high. 1 0 Reserved Always write 0. Bit D7 D6 D5 D4 D3 D2 D1 D0 STATUS CTS ERR X X X RDSINT ASQINT STCINT

77 5.2.2. FM/RDS Receiver Properties Property 0x0001. GPO_IEN Configures the sources for the GPO2/INT interrupt pin. Valid sources are the lower 8 bits of the STATUS byte, including CTS, ERR, RSQINT, RDSINT (Si4705/06/21/31/35/37/39/41/49 only), and STCINT bits. The corresponding bit is set before the interrupt occurs. The CTS bit (and optional interrupt) is set when it is safe to send the next command. The CTS interrupt enable (CTSIEN) can be set with this property and the POWER_UP command. The state of the CTSIEN bit set during the POWER_UP command can be read by reading this property and modified by writing this property. This property may only be set or read when in powerup mode. Errata: 1. RSQIEN is non-functional on FMRX component 2.0. Default: 0x0000 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 RSQREP RDSREP 0 STCREP CTSIEN ERRIEN 0 0 RSQIEN RDSIEN 0 STCIEN Bit Name Function 15:12 Reserved Always write to 0. 11 RSQREP RSQ Interrupt Repeat. 0 = No interrupt generated when RSQINT is already set (default). 1 = Interrupt generated even if RSQINT is already set. 10 RDSREP RDS Interrupt Repeat (Si4705/06/21/31/35/37/39/41/49 Only). 0 = No interrupt generated when RDSINT is already set (default). 1 = Interrupt generated even if RDSINT is already set. 9 Reserved Always write to 0. 8 STCREP STC Interrupt Repeat. 0 = No interrupt generated when STCINT is already set (default). 1 = Interrupt generated even if STCINT is already set. 7 CTSIEN CTS Interrupt Enable. After PowerUp, this bit reflects the CTSIEN bit in ARG1 of Pow- erUp Command. 0 = No interrupt generated when CTS is set. 1 = Interrupt generated when CTS is set. 6 ERRIEN ERR Interrupt Enable. 0 = No interrupt generated when ERR is set (default). 1 = Interrupt generated when ERR is set. 5:4 Reserved Always write to 0. 3 RSQIEN RSQ Interrupt Enable. 0 = No interrupt generated when RSQINT is set (default). 1 = Interrupt generated when RSQINT is set. 2 RDSIEN RDS Interrupt Enable (Si4705/06/21/31/35/37/39/41/49 Only). 0 = No interrupt generated when RDSINT is set (default). 1 = Interrupt generated when RDSINT is set. 1 Reserved Always write to 0.

Property 0x0102. DIGITAL_OUTPUT_FORMAT (Si4705/06/21/31/35/37/39 Only) Configures the digital audio output format. Configuration options include DCLK edge, data format, force mono, and sample precision. Note: DIGITAL_OUTPUT_FORMAT is supported in FM receive component 2.0 or higher. Digital Audio Output feature is not supported on Si4741 FMRX component 2A.7. Default: 0x0000 0 STCIEN Seek/Tune Complete Interrupt Enable. 0 = No interrupt generated when STCINT is set (default). 1 = Interrupt generated when STCINT is set. Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Name 0 0 0 0 0 0 0 0 OFALL OMODE[3:0] OMONO OSIZE[1:0] Bit Name Function 15:8 Reserved Always write to 0. 7 OFALL Digital Output DCLK Edge. 0 = use DCLK rising edge 1 = use DCLK falling edge 6:3 OMODE[3:0] Digital Output Mode. 0000 = I2S 0110 = Left-justified 1000 = MSB at second DCLK after DFS pulse 1100 = MSB at first DCLK after DFS pulse 2 OMONO Digital Output Mono Mode. 0 = Use mono/stereo blend (per blend thresholds) 1 = Force mono 1:0 OSIZE[1:0] Digital Output Audio Sample Precision. 0 = 16-bits 1 = 20-bits 2 = 24-bits 3 = 8-bits

79 Property 0x0104. DIGITAL_OUTPUT_SAMPLE_RATE (Si4705/06/21/31/35/37/39 Only) Enables digital audio output and configures digital audio output sample rate in samples per second (sps). When DOSR[15:0] is 0, digital audio output is disabled. To enable digital audio output, program DOSR[15:0] with the sample rate in samples per second. The system controller must establish DCLK and DFS prior to enabling the digital audio output else the device will not respond and will require reset. Note: DIGITAL_OUTPUT_SAMPLE_RATE is supported in FM receive component 2.0 or higher. Digital Audio Output feature is not supported on Si4741 FMRX component 2A.7. Default: 0x0000 (digital audio output disabled) Units: sps Range: 32–48 ksps, 0 to disable digital audio output Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Name DOSR[15:0] Bit Name Function 15:0 DOSR[15:0] Digital Output Sample Rate. 32–48 ksps. 0 to disable digital audio output.

Property 0x0201. REFCLK_FREQ Sets the frequency of the REFCLK from the output of the prescaler. The REFCLK range is 31130 to 34406 Hz (32768 ±5% Hz) in 1 Hz steps, or 0 (to disable AFC). For example, an RCLK of 13 MHz would require a prescaler value of 400 to divide it to 32500 Hz REFCLK. The reference clock frequency property would then need to be set to 32500 Hz. RCLK frequencies between 31130 Hz and 40 MHz are supported, however, there are gaps in frequency coverage for prescaler values ranging from 1 to 10, or frequencies up to 311300 Hz. The following table summarizes these RCLK gaps. Figure 2. REFCLK Prescaler The RCLK must be valid 10 ns before sending and 20 ns after completing the FM_TUNE_FREQ and FM_SEEK_START commands. In addition, the RCLK must be valid at all times for proper AFC operation. The RCLK may be removed or reconfigured at other times. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 32768 Hz. Default: 0x8000 (32768) Units: 1 Hz Step: 1 Hz Range: 31130–34406 Table 11. RCLK Gaps Prescaler RCLK Low (Hz) RCLK High (Hz) 1 31130 34406 2 62260 68812 3 93390 103218 4 124520 137624 5 155650 172030 6 186780 206436 7 217910 240842 8 249040 275248 9 280170 309654 10 311300 344060 RCLK REFCLK PIN 9 Prescaler Divide by 1-4095 31.130 kHz – 40 MHz 31.130 kHz – 34.406 kHz

81 Property 0x0202. REFCLK_PRESCALE Sets the number used by the prescaler to divide the external RCLK down to the internal REFCLK. The range may be between 1 and 4095 in 1 unit steps. For example, an RCLK of 13 MHz would require a prescaler value of 400 to divide it to 32500 Hz. The reference clock frequency property would then need to be set to 32500 Hz. The RCLK must be valid 10 ns before sending and 20 ns after completing the FM_TUNE_FREQ and FM_TUNE_START commands. In addition, the RCLK must be valid at all times for proper AFC operation. The RCLK may be removed or reconfigured at other times. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 1. Default: 0x0001 Step: 1 Range: 1–4095 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name REFCLKF[15:0] Bit Name Function 15:0 REFCLKF[15:0] Frequency of Reference Clock in Hz. The allowed REFCLK frequency range is between 31130 and 34406 Hz (32768 ±5%), or 0 (to disable AFC). Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 REFCLKP[11:0] Bit Name Function 15:12 Reserved Always write to 0. 11:0 REFCLKP[11:0] Prescaler for Reference Clock. Integer number used to divide clock frequency down to REFCLK frequency. The allowed REFCLK frequency range is between 31130 and 34406 Hz (32768 5%), or 0 (to disable AFC).

Property 0x1100. FM_DEEMPHASIS (Not applicable for Si4749) Sets the FM Receive de-emphasis to 50 or 75 µs. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 75 µs. Default: 0x0002 Property 0x1102. FM_CHANNEL_FILTER (Si4706/49 Only) Selects bandwidth of channel filter applied at the demodulation stage. Default is automatic which means the device automatically selects proper channel filter. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 1. Default: 0x0001 Range: 0–4 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DEEMPH[1:0] Bit Name Function 15:2 Reserved Always write to 0. 1:0 DEEMPH[1:0] FM De-Emphasis. 10 = 75 µs. Used in USA (default) 01 = 50 µs. Used in Europe, Australia, Japan 00 = Reserved 11 = Reserved Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name FMCHFILT[15:0] Bit Name Function 15:0 FM_CHANNEL_FILTER 0 = Automatically select proper channel filter. 1 = Force wide (110 kHz) channel filter. 2 = Force narrow (84 kHz) channel filter. 3 = Force narrower (60 kHz) channel filter. 4 = Force narrowest (40 kHz) channel filter.

83 Property 0x1105. FM_BLEND_STEREO_THRESHOLD (Not applicable for Si4706/40/41/49) Sets RSSI threshold for stereo blend (Full stereo above threshold, blend below threshold). To force stereo, set this to 0. To force mono, set this to 127. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 49 dBµV. Default: 0x0031 Units: dBµV Step: 1 Range: 0–127 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 STTHRESH[6:0] Bit Name Function 15:7 Reserved Always write to 0. 6:0 STTHRESH FM Blend Stereo Threshold. RSSI threshold below which the audio output goes into a blend mode. Above this threshold the audio output is in full stereo. Specified in units of dBµV in 1 dB steps (0–127). Default is 49 dBµV.

Property 0x1106. FM_BLEND_MONO_THRESHOLD (Not applicable for Si4706/40/41/49) Sets RSSI threshold for mono blend (Full mono below threshold, blend above threshold). To force stereo, set this to 0. To force mono, set this to 127. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 30 dBµV. Default: 0x001E Units: dBµV Step: 1 Range: 0–127 Property 0x1107. FM_ANTENNA_INPUT (Si4704/05/06/20/21 Only) Selects what type of antenna and what pin it is connected to. Default is 0 which means the antenna used is a headphone (long) antenna and it is connected to the FMI pin. Setting the FMTXO bit to 1 means that the antenna used is an embedded (short) antenna and it is connected to the TXO/LPI pin. Default: 0x0000 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 MONOTHRESH[6:0] Bit Name Function 15:7 Reserved Always write to 0. 6:0 MONOTHRESH FM Blend Mono Threshold. RSSI threshold below which the audio output goes into full mono mode. Above this threshold the audio output is in blend or full stereo. Specified in units of dBµV in 1 dB steps (0–127). Default is 30 dBµV. Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FMTXO Bit Name Function 15:1 Reserved Always write to 0 0 FMTXO Selects what type of antenna and which pin it is connected to: 0 = Use FMI pin for headphone (long) antenna 1 = Use TXO/LPI pin for embedded (short) antenna

85 Property 0x1108. FM_MAX_TUNE_ERROR Sets the maximum freq error allowed before setting the AFC rail indicator (AFCRL). The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 30 kHz. Default: 0x001E Units: kHz Step: 1 Range: 0–255 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 FMMAXTUNEERR[7:0] Bit Name Function 15:8 Reserved Always write to 0. 7:0 FMMAXTUNEERR FM Maximum Tuning Frequency Error. Maximum tuning error allowed before setting the AFC Rail Indicator ON. Specified in units of kHz. Default is 30 kHz.

Property 0x1200. FM_RSQ_INT_SOURCE Configures interrupt related to Received Signal Quality metrics. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 0. Default: 0x0000 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 BLEN- DIEN 0 MUL- THIEN MULT- LIEN SNRHIEN SNRLIEN RSSIHIEN RSSILIEN Bit Name Function 15:8 Reserved Always write to 0. 7 BLENDIEN Interrupt Source Enable: Blend. Enable blend as the source of interrupt which the threshold is set by FM_RSQ_BLEND_THRESHOLD. 6 Reserved Always write to 0. 5 MULTHIEN Interrupt Source Enable: Multipath High (Si4706/40/41/49 Only). Enable Multipath high as the source of interrupt which the threshold is set by FM_RSQ_MULTIPATH_HI_THRESHOLD. 4 MULTLIEN Interrupt Source Enable: Multipath Low (Si4706/40/41/49 Only). Enable Multipath low as the source of interrupt which the threshold is set by FM_RSQ_MULTIPATH_LO_THRESHOLD. 3 SNRHIEN Interrupt Source Enable: SNR High. Enable SNR high as the source of interrupt which the threshold is set by FM_RSQ_SNR_HI_THRESHOLD. 2 SNRLIEN Interrupt Source Enable: SNR Low. Enable SNR low as the as the source of interrupt which the threshold is set by FM_RSQ_SNR_LO_THRESHOLD. 1 RSSIHIEN Interrupt Source Enable: RSSI High. Enable RSSI high as the source of interrupt which the threshold is set by FM_RSQ_RSSI_HI_THRESHOLD. 0 RSSILIEN Interrupt Source Enable: RSSI Low. Enable RSSI low as the source of interrupt which the threshold is set by FM_RSQ_RSSI_LO_THRESHOLD.

87 Property 0x1201. FM_RSQ_SNR_HI_THRESHOLD Sets high threshold which triggers the RSQ interrupt if the SNR is above this threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 127dB. Default: 0x007F Units: dB Step: 1 Range: 0–127 Property 0x1202. FM_RSQ_SNR_LO_THRESHOLD Sets low threshold which triggers the RSQ interrupt if the SNR is below this threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 0 dB. Default: 0x0000 Units: dB Step: 1 Range: 0–127 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 SNRH[6:0] Bit Name Function 15:7 Reserved Always write to 0. 6:0 SNRH FM RSQ SNR High Threshold. Threshold which triggers the RSQ interrupt if the SNR is above this threshold. Specified in units of dB in 1 dB steps (0–127). Default is 127 dB. Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 SNRL[6:0] Bit Name Function 15:7 Reserved Always write to 0. 6:0 SNRL FM RSQ SNR Low Threshold. Threshold which triggers the RSQ interrupt if the SNR is below this threshold. Specified in units of dB in 1 dB steps (0–127). Default is 0 dB.

Property 0x1203. FM_RSQ_RSSI_HI_THRESHOLD Sets high threshold which triggers the RSQ interrupt if the RSSI is above this threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 127 dBµV. Default: 0x007F Units: dBµV Step: 1 Range: 0–127 Property 0x1204. FM_RSQ_RSSI_LO_THRESHOLD Sets low threshold which triggers the RSQ interrupt if the RSSI is below this threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 0 dBµV. Default: 0x0000 Units: dBµV Step: 1 Range: 0–127 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 RSSIH[6:0] Bit Name Function 15:7 Reserved Always write to 0. 6:0 RSSIH FM RSQ RSSI High Threshold. Threshold which triggers the RSQ interrupt if the RSSI is above this threshold. Specified in units of dBµV in 1 dB steps (0–127). Default is 127 dBµV. Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 RSSIL[6:0] Bit Name Function 15:7 Reserved Always write to 0. 6:0 RSSIL FM RSQ RSSI Low Threshold. Threshold which triggers the RSQ interrupt if the RSSI is below this threshold. Specified in units of dBµV in 1 dB steps (0–127). Default is 0 dBµV.

89 Property 0x1205. FM_RSQ_MULTIPATH_HI_THRESHOLD (Si4706/40/41/49 Only) Sets the high threshold which triggers the RSQ interrupt if the Multipath level is above this threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in power up mode. The default is 127. Default: 0x007F Step: 1 Range: 0-127 Property 0x1206. FM_RSQ_MULTIPATH_LO_THRESHOLD (Si4706/40/41/49 Only) Sets the low threshold which triggers the RSQ interrupt if the Multipath level is below this threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in power up mode. The default is 0. Default: 0x0000 Step: 1 Range: 0-127 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 MULTH[6:0] Bit Name Function 15:7 Reserved Always write to 0 6:0 MULTH FM RSQ Multipath High Threshold. Threshold which triggers the RSQ interrupt if the Multipath is above this threshold. Default is 127. Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 MULTL[6:0] Bit Name Function 15:7 Reserved Always write to 0 6:0 MULTL FM RSQ Multipath Low Threshold. Threshold which triggers the RSQ interrupt if the Multipath is below this threshold. Default is 0.

Property 0x1207. FM_RSQ_BLEND_THRESHOLD Sets the blend threshold for blend interrupt when boundary is crossed. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 1%. Default: 0x0081 Units: % Step: 1 Range: 0–100 Property 0x1300. FM_SOFT_MUTE_RATE (Not applicable for Si4749) Sets the attack and decay rates when entering and leaving soft mute. Higher values increase rates, and lower values decrease rates. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 64. Default: 64 Step: 1 Range: 1—255 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 PILOT BLEND[6:0] Bit Name Function 15:8 Reserved Always write to 0. 7 PILOT Pilot Indicator. This bit has to be set to 1 (there has to be a pilot present) in order for FM_RSQ_BLEND_THRESHOLD to trigger an interrupt. Without a pilot tone, the part is always in full mono mode and never goes into blend. 6:0 BLEND FM RSQ Blend Threshold. This is a boundary cross threshold. If the blend cross from above to below, or the other way around from below to above this threshold, it will trigger an interrupt. Specified in units of % in 1% steps (0–100). Default is 1%. Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 SMRATE[7:0]

91 Property 0x1302. FM_SOFT_MUTE_MAX_ATTENUATION (Not applicable for Si4749) Sets maximum attenuation during soft mute (dB). Set to 0 to disable soft mute. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 16 dB. Default: 0x0010 Units: dB Step: 1 Range: 0–31 Property 0x1303. FM_SOFT_MUTE_SNR_THRESHOLD (Not applicable for Si4749) Sets SNR threshold to engage soft mute. Whenever the SNR for a tuned frequency drops below this threshold, the FM reception will go in soft mute, provided soft mute max attenuation property is non-zero. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 4 dB. Default: 0x0004 Units: dB Step: 1 Range: 0–15 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 0 0 SMATTN[4:0] Bit Name Function 15:5 Reserved Always write to 0. 4:0 SMATTN FM Soft Mute Maximum Attenuation. Set maximum attenuation during soft mute. If set to 0, then soft mute is disabled. Speci- fied in units of dB in 1 dB steps (0–31). Default is 16 dB. Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 0 0 0 SMTHR[3:0] Bit Name Function 15:4 Reserved Always write to 0. 3:0 SMTHR FM Soft Mute SNR Threshold. Threshold which will engage soft mute if the SNR falls below this. Specified in units of dB in 1 dB steps (0–15). Default is 4 dB.

Property 0x1400. FM_SEEK_BAND_BOTTOM Sets the bottom of the FM band for seek. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 87.5 MHz. Default: 0x222E Units: 10 kHz Step: 50 kHz Range: 64–108 MHz Note: For FMRX components less than 2.0, range is 76–108 MHz. Property 0x1401. FM_SEEK_BAND_TOP Sets the top of the FM band for seek. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 107.9 MHz. Default: 0x2A26 Units: 10 kHz Step: 50 kHz Range: 64–108 MHz Note: For FMRX components less than 2.0, range is 76–108 MHz. Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name FMSKFREQL[15:0] Bit Name Function 15:0 FMSKFREQL FM Seek Band Bottom Frequency. Selects the bottom of the FM Band during Seek. Specified in units of 10 kHz. Default is 8750 (87.5 MHz). Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name FMSKFREQH[15:0] Bit Name Function 15:0 FMSKFREQH FM Seek Band Top Frequency. Selects the top of the FM Band during Seek. Specified in units of 10 kHz. Default is 10790 (107.9 MHz).

93 Property 0x1402. FM_SEEK_FREQ_SPACING Selects frequency spacing for FM seek. There are only 3 valid values: 5, 10, and 20. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 100 kHz. Default: 0x000A Property 0x1403. FM_SEEK_TUNE_SNR_THRESHOLD Sets the SNR threshold for a valid FM Seek/Tune. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 3 dB. Default: 0x0003 Units: dB Step: 1 Range: 0–127 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 0 0 SKSPACE[4:0] Bit Name Function 15:5 Reserved Always write to 0. 4:0 SKSPACE FM Seek Frequency Spacing. Selects the frequency spacing during Seek function. Specified in units of 10 kHz. There are only 3 valid values: 5 (50 kHz), 10 (100 kHz), and 20 (200 kHz). Default is 10. Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 SKSNR[6:0] Bit Name Function 15:7 Reserved Always write to 0. 6:0 SKSNR FM Seek/Tune SNR Threshold. SNR Threshold which determines if a valid channel has been found during Seek/Tune. Specified in units of dB in 1 dB steps (0–127). Default is 3 dB.

Property 0x1404. FM_SEEK_TUNE_RSSI_THRESHOLD Sets the RSSI threshold for a valid FM Seek/Tune. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 20 dBµV. Default: 0x0014 Units: dBµV Step: 1 Range: 0–127 Property 0x1500. RDS_INT_SOURCE (Si4705/06/21/31/35/37/39/41/49 Only) Configures interrupt related to RDS. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 0. Note: RDS_INT_SOURCE is supported in FMRX comp 2.0 or higher. Default: 0x0000 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 SKRSSI[6:0] Bit Name Function 15:7 Reserved Always write to 0. 6:0 SKRSSI FM Seek/Tune Received Signal Strength Threshold. RSSI threshold which determines if a valid channel has been found during seek/tune. Specified in units of dBµV in 1 dBµV steps (0–127). Default is 20 dBµV. Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 0 RDSNEW- BLOCKB RDSNEW- BLOCKA 0 RDSSYNC- FOUND RDSSYN- CLOST RDSRECV Bit Name Function 5 RDSNEWBLOCKB RDS New Block B Found (Si4706/49 only) If set, generate an interrupt when Block B data is found or subsequently changed. 4 RDSNEWBLOCKA RDS New Block A Found (Si4706/49 only) If set, generate an interrupt when Block A data is found or subsequently changed 2 RDSSYNCFOUND RDS Sync Found. If set, generate RDSINT when RDS gains synchronization. 1 RDSSYNCLOST RDS Sync Lost. If set, generate RDSINT when RDS loses synchronization. 0 RDSRECV RDS Received. If set, generate RDSINT when RDS FIFO has at least RDS_INT_FIFO_COUNT entries.

95 Property 0x1501. RDS_INT_FIFO_COUNT (Si4705/06/21/31/35/37/39/41/49 Only) Sets the minimum number of RDS groups stored in the RDS FIFO before RDSRECV is set. The maximum value is 14. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Default is 0. Note: RDS_INT_FIFO_COUNT is supported in FMRX comp 2.0 or higher. Default: 0x0000 Range: 0–14 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 RDSFIFOCNT[7:0] Bit Name Function 7:0 RDSFIFOCNT RDS FIFO Count. Minimum number of RDS groups stored in the RDS FIFO before RDSRECV is set.

Property 0x1502. RDS_CONFIG (Si4705/06/21/31/35/37/39/41/49 Only) Configures RDS settings to enable RDS processing (RDSEN) and set RDS block error thresholds. When a RDS Group is received, all block errors must be less than or equal the associated block error threshold for the group to be stored in the RDS FIFO. If blocks with errors are permitted into the FIFO, the block error information can be reviewed when the group is read using the FM_RDS_STATUS command. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 0x0000. Note: RDS_CONFIG is supported in FMRX comp 2.0 or higher. Default: 0x0000 Recommended Block Error Threshold options: 2,2,2,2 = No group stored if any errors are uncorrected. 3,3,3,3 = Group stored regardless of errors. 0,0,0,0 = No group stored containing corrected or uncorrected errors. 3,2,3,3 = Group stored with corrected errors on B, regardless of errors on A, C, or D. Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name BLETHA[1:0] BLETHB[1:0] BLETHC[1:0] BLETHD[1:0] 0 0 0 0 0 0 0 RDSEN Bit Name Function 15:14 BLETHA[1:0] Block Error Threshold BLOCKA. 0 = No errors. 1 = 1–2 bit errors detected and corrected. 2 = 3–5 bit errors detected and corrected. 3 = Uncorrectable. 13:12 BLETHB[1:0] Block Error Threshold BLOCKB. 0 = No errors. 1 = 1–2 bit errors detected and corrected. 2 = 3–5 bit errors detected and corrected. 3 = Uncorrectable. 11:10 BLETHC[1:0] Block Error Threshold BLOCKC. 0 = No errors. 1 = 1–2 bit errors detected and corrected. 2 = 3–5 bit errors detected and corrected. 3 = Uncorrectable. 9:8 BLETHD[1:0] Block Error Threshold BLOCKD. 0 = No errors. 1 = 1–2 bit errors detected and corrected. 2 = 3–5 bit errors detected and corrected. 3 = Uncorrectable. 0 RDSEN RDS Processing Enable. 1 = RDS processing enabled.

97 Property 0x1503. FM_RDS_CONFIDENCE (Si4706/49 Only) Selects the confidence level requirement for each RDS block. A higher confidence requirement will result in fewer decoder errors (% of blocks with BLE<3 that contains incorrect information) but more block errors (% of blocks with BLE=3). The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 0x1111. Default: 0x1111 Property 0x1800. FM_BLEND_RSSI_STEREO_THRESHOLD (Si4740/41 Only) Sets RSSI threshold for stereo blend (Full stereo above threshold, blend below threshold). To force stereo, set to 0. To force mono, set to 127. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 49 dBμV. Default: 0x0031 Units: dBμV Step: 1 Range: 0–127 Property 0x1801. FM_BLEND_RSSI_MONO_THRESHOLD (Si4740/41 Only) Sets RSSI threshold for mono blend (Full mono below threshold, blend above threshold). To force stereo, set this to 0. To force mono, set this to 127. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 30 dBμV. Default: 0x001E Units: dBμV Step: 1 Range: 0–127 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name X X X X CONFIDENCEB[3:0] CONFIDENCEC[3:0] CONFIDENCED[3:0] Bit Name Function 11:8 CONFIDENCEB Selects decoder error rate threshold for Block B. 7:4 CONFIDENCEC Selects decoder error rate threshold for Block C. 3:0 CONFIDENCED Selects decoder error rate threshold for Block D. Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 STRTHRESH[6:0]

Property 0x1802. FM_BLEND_RSSI_ATTACK_RATE (Si4740/41 Only) Sets the stereo to mono attack rate for RSSI based blend. Smaller values provide slower attack and larger values provide faster attack. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 1000 (approximately 33ms for 63% change). Default: 0x03E8 Step: 1 Range: 0 (disabled), 1–32767 Property 0x1803. FM_BLEND_RSSI_RELEASE_RATE (Si4740/41 Only) Sets the mono to stereo release rate for RSSI based blend. Smaller values provide slower release and larger values provide faster release. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 100 (approximately 330ms for 63% change). Default: 0x0064 Step: 1 Range: 0 (disabled), 1–32767 Property 0x1804. FM_BLEND_SNR_STEREO_THRESHOLD (Si4740/41 Only) Sets SNR threshold for stereo blend (Full stereo above threshold, blend below threshold). To force stereo, set this to 0. To force mono, set this to 127. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 30 dB. Default: 0x001E Units: dB Step: 1 Range: 0–127 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 MONOTHRESH[6:0] Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name ATTACK[15:0] Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name RELEASE[15:0]

99 Property 0x1805. FM_BLEND_SNR_MONO_THRESHOLD (Si4740/41 Only) Sets SNR threshold for mono blend (Full mono below threshold, blend above threshold). To force stereo, set to 0. To force mono, set to 127. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 10 dB. Default: 0x000A <= NOTE: With FW 2Ab7, suggest reprogramming to 14 dB. Default changing to 14 dB on next FW revision. Units: dB Step: 1 Range: 0–127 Property 0x1806. FM_BLEND_SNR_ATTACK_RATE (Si4740/41 Only) Sets the stereo to mono attack rate for SNR based blend. Smaller values provide slower attack and larger values provide faster attack. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 1000 (approximately 33ms for 63% change). Default: 0x03E8 Step: 1 Range: 0 (disabled), 1–32767 Property 0x1807. FM_BLEND_SNR_RELEASE_RATE (Si4740/41 Only) Sets the mono to stereo release rate for SNR based blend. Smaller values provide slower release and larger values provide faster release. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 100 (approximately 330ms for 63% change). Default: 0x0064 Step: 1 Range: 0 (disabled), 1–32767 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 STRTHRESH[6:0] Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 MONOTHRESH[6:0] Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name ATTACK[15:0]

Property 0x1808. FM_BLEND_MULTIPATH_STEREO_THRESHOLD (Si4740/41 Only) Sets Multipath threshold for stereo blend (Full stereo above threshold, blend below threshold). To force stereo, set to 0. To force mono, set to 50. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 40. Default: 0x0028 Step: 1 Range: 0–50 Property 0x1809. FM_BLEND_MULTIPATH_MONO_THRESHOLD (Si4740/41 Only) Sets Multipath threshold for mono blend (Full mono below threshold, blend above threshold). To force stereo, set to 0. To force mono, set to 50. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 10. Default: 0x000A Step: 1 Range: 0–50 Property 0x180A. FM_BLEND_MULTIPATH_ATTACK_RATE (Si4740/41 Only) Sets the stereo to mono attack rate for Multipath based blend. Smaller values provide slower attack and larger values provide faster attack. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 1000 (approximately 33ms for 63% change). Default: 0x03E8 Step: 1 Range: 0 (disabled), 1–32767 Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name RELEASE[15:0] Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 STRTHRESH[6:0] Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name 0 0 0 0 0 0 0 0 0 MONOTHRESH[6:0] Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name ATTACK[15:0]