Acqiris U5309A Operation & User’s Manual

DC to 500 GHz bandwidth, with real-timeprocessing User's Manual

Copyright Statement © Acqiris, 2017 - 2019 No part of this manual may be reproduced in any form or by any means (including electronic storage and retrieval or translation into a foreign language) without prior agreement and written consent from Acqiris SA as governed by international copyright laws. Version July 2019 Contact us Acqiris Americas [email protected] Acqiris Europe [email protected] Acqiris Asia-Pacific [email protected] Acqiris Japan [email protected] Worldwide contact for support [email protected] Acqiris SA Chemin des Aulx, 12 1228 Plan-Les-Ouates Switzerland www.acqiris.com

U5309A User's Manual 3 U5309A Acquisition Card User's Manual This help document is intended to provide in-depth information and reference material specific to your ADC Card. For information about installation and about getting started with your ADC Card, please refer to the Startup Guide which can be downloaded from https://extranet.acqiris.com/ or which is installed with your software. Content U5309A Acquisition Card User's Manual 3 Content 3 Introduction 5 Overview 5 Typical Applications 5 Key Features 5 Block diagrams 6 Main ADC Card Features 7 1.1 U5309A front panel features 8 1.2 Channel Input Specifications 9 1.3 Sampling and Data Acquisition 11 1.4 Trigger 12 1.5 Calibration 15 Real-Time Processing Options 17 2.1 Acquisition modes and specific features 17 2.2 Easy firmware switch 18 2.3 Digitizer firmware (DGT option) 19 2.4 Real-time averaging (AVG option) 22 2.5 Peak Detection (PKD) 30 Readout modes 34 3.1 Standard readout modes 34 3.2 Triggered simultaneous acquisition and readout (TSR) 35 3.3 Averager with triggered simultaneous acquisition and readout (AVG/TSR option) 39 Other Signal Processing Features 43 4.1 Sampling rate reduction (binary decimation) 44 Control and Synchronization 45 5.1 External clock and reference 46 5.2 Trigger modes and time-stamps 47

5.3 Trigger output 51 5.4 Multi-purpose inputs and outputs 53 Programming Information 55 6.1 Overview of the AqMD3 Driver 55 6.2 Programming with the IVI-C Driver in various development environments 56 6.3 Migrating from MD2 2.x to MD3 3.x 58 6.4 Initial configuration 59 6.5 Apply setup 60 How To ... ? 61 7.1 How to discover the PXI Instrument? 62 7.2 How to calibrate the card? 63 7.3 How to configure and read data on two channels? 65 7.4 How to access repeated capabilities? 66 7.5 How to generate a software trigger? 67 7.6 How to perform time-interleaving acquisitions? 68 7.7 How to set the external trigger? 69 7.8 How to perform binary decimation? (depending on firmware) 70 7.9 How to perform partial readout? 71 7.10 How to load a new firmware? 74 7.11 How to optimize NSA settings? 75 7.12 How to switch from normal mode acquisition (Multi-record) to averager mode? 76 Software utilities 77 8.1 ADC card Verification Utility (AqMD3Verify) 77 FAQ 79 9.1 Q. What is coherent sampling? 79 9.2 Q. How to manage the internal temperature? 79 9.3 Q. What are the differences between the various data streaming firmware options supported by high-speed ADC cards ? 80 9.4 Q. What happens if the host processor goes in hibernation mode? 81 General information 82 10.1 Safety notes 82 10.2 Cleaning precautions 84 10.3 Product markings 84 10.4 Electrical & environmental specifications 85 10.5 Related documentation 85 10.6 Full product family 86

5 Introduction Overview Depending on the selected option, the U5309A signal acquisition card offers one, two, four or eight 8- bits channels, with an analog bandwidth of DC to 500 MHz. Featuring a large DDR3 memory for long acquisition time, the U5309A also includes a Xilinx Virtex-6 FPGA allowing implementation of custom real-time processing algorithms. Benefiting from the very high data transfer rates of the PCIe 2.0 eight-lane interface, and occupying a single slot in a host PC, the U5309A offers high performance in a small footprint, making it an ideal platform for many commercial, industrial and aerospace & defense embedded systems. Typical Applications Pulsed Radar Analytical time-of-flight LASER ranging / Emission monitoring Ultrasonic imaging Key Features Sampling rate up to 2 GS/s 2 channels or 8 channels with 8-bit resolution and DC to 500 MHz analog bandwidth Up to 2 GB of DDR3 on-board memory Controlled by a Xilinx Virtex-6 FPGA with support for custom real-time processing

Block diagrams Figure 1.1 - U5309A -CH2 block diagram Figure 1.2 - U5309A -CH8 block diagram Most of the technical specifications concerning your particular ADC card are covered in this manual, however for the complete specifications please refer to the U5309A datasheet.

U5309A User's Manual 7 Chapter 1 Main ADC Card Features 1.1 U5309A front panel features 8 1.2 Channel Input Specifications 9 1.3 Sampling and Data Acquisition 11 1.4 Trigger 12 1.5 Calibration 15

8 U5309A User's Manual 1.1 U5309A front panel features Front panel connectors Connector Type Description TRG IN MMCXfemale Externaltrigger signalinput,50 Ω terminated. Levelrangeis±5 V. IN 1 to IN 2 1 1 to 8 2 SSMC male Analogsignalinput. DC-coupledand50 Ωterminated. Maximuminputvoltage±3.4VDC (or ±5V DC)3. JTAG MicroUSB ProvidesconnectiontotheDPU for specific reprogramming. TRG OUT MMCXfemale Trigger Outsignal. User selectablefromseveralfunctions. I/O 1, 2, 3 MMCXfemale User configurableInput/Outputsignal. 3.3VCMOSandTTL compatible. CLK IN MMCXfemale Externalclockinput. AC coupledand50Ωterminated, signallevel:+5to+15dBm. Pleaserefer todatasheetfor details. REF IN MMCXfemale Externalreferenceclockinput, AC coupledand50Ωterminated. Itcanaccepta100 MHzsignalfrom-3to+3 dBm. Note: It is recommendedtofirst connect theSSMC endof theinput cableandtightenusing the torquewrench(U1092A-WCK)beforeconnectingtheSMA end, this minimizes strainonthe connector. A 1m SSMC toSMA cableis availableas anaccessory (U1092A-CB3)A 1m SSMC toBNC cableis alsoavailable(U5300A-100). Table 1.1 - List of U5309A front-panel IOs. 1For the 2 channels version (U5309A-CH2 option) 2For the 8 channels version (U5309A-CH8 option) 3For cards delivered after April 2015. The driver automatically adjusts offset accordingly.

U5309A User's Manual 9 1.2 Channel Input Specifications This section provides information and specifications regarding the input characteristics of the ADC card. Channel Input The U5309A offer several options for the number of channel input. Model Input channel(s) U5309A-CH1 1channelavailable(IN 1) U5309A-CH2 2channelsavailable(IN 1andIN 2) U5309A-CH4 4channelsavailablesimultaneously (1or 2,3or 4,5or 6,and7or 8) U5309A-CH8 8channelsavailablesimultaneously(from1to8) Table 1.2 - List of the U5309A channel versions. The U5309A has the following front end capabilities: Model Impedance / Coupling Bandwidth (nom- inal) Full Scale Ranges (FSR) Absolute Max- imum DC Voltage Offset Adjust- ment Range U5309A-F03** DC 50Ω 300MHz 250mV,500mV,1V, 2.5V,and5V ±3.4V (or ±5VDC)* ±0.6FSR U5309A-F05** 500MHz U5309A-F03- LVR*** 300MHz 50mVto1V ±3.4V (or ±5VDC)* ±0.5FSR U5309A-F05- LVR*** 500MHz * For modules delivered after April 2015. The driver automatically adjusts offset accordingly. ** Standard Voltage Range *** LVR: Low Voltage Range - Devices delivered after April 2015. For more information, please contact [email protected]. Table 1.3 - Front-end specifications of the channel input(s). Impedance & Coupling The input channel termination is 50 Ω. The input coupling is DC.

10 U5309A User's Manual Input Protection The input amplifiers are designed to accept signals below the absolute maximum level shown in the table. Mezzanine Front-end The front-end electronics are all mounted on a removable mezzanine card. In the event of accidental damage or as components fatigue over time (e.g. relays in high duty cycle automated testing applications), the mezzanine card allows for fast and efficient replacement. Bandwidth and Rise Time The bandwidth specification indicates the frequency at which an input signal will be attenuated by 3 dB (approximately 30% loss of amplitude). The bandwidth also has an impact on the minimum rise and fall times that can be passed through the front-end electronics. A pulse with a very sharp edge will be observed to have a minimum rise timeTmin determined by the front-end electronics. In general a pulse with a given 10-90% rise time T10-90real will be observed with a lower value given by: T10-902=T10-90real2+Tmin2 where Tmin(ns)≈0.35/BW(GHz) Vertical Resolution The U5309A ADC Card uses a 8-bit ADC giving 256 levels at each input full scale range.

U5309A User's Manual 11 1.3 Sampling and Data Acquisition The ADC Card acquires waveforms in association with triggers. Each waveform is made of a series of measured voltage values (sample points) coming from the ADC at a uniform sampling rate. Sampling rate The U5309A Acquisition card contains an analog-to-digital conversion (ADC) system that can sample waveforms, in a real time sampling mode, at the maximum rates shown in the table below. Model Channel Con- figuration Option Max. Sampling Rate Available Channels Resolution Acquisition Modes U5309A CH1/CH2 -SR0 500MS/s CH1:1 CH2:2 8bits Singleor multi- record (upto131'072 records) -SR1 1GS/s -SR2 2GS/s CH4/CH8 -SR1 1GS/s CH4:4 CH8:8 Table 1.4 - Acquisition sampling rate and resolution per channel. The External Clock can be used to vary the sampling rate of the ADC card, see External clock and reference (page 46).

1.4 Trigger The trigger settings applied to the ADC card are used to determine at which time the device will start recording data. The various trigger settings are outlined below. Trigger source The trigger source can be: the signal applied to an input channel (digital internal triggering) an external signal applied to the TRG IN front panel input connector (external triggering) a software trigger (See How to generate a software trigger? (page 67)). The different trigger modes are detailed in section Trigger modes and time-stamps (page 47) Trigger impedance & coupling The U5309A has a fixed 50 Ω termination impedance with DC coupling. Trigger input bandwidths The bandwidth depends on the trigger source. Channel trigger The -3 dB bandwidth of the comparator of the channel triggers is the same as the bandwidth of the channel input. This is option dependent. Please refer to the table in the Channel Input (page 9) section. For input signals with high frequency components, this means that the signal acquired and displayed doesn’t correspond exactly to the signal seen from the trigger comparator input. Since, the signal seen on the trigger comparator can be attenuated, this should be taken into account when selecting channel triggers and specifying the trigger level. External trigger The external trigger input has a bandwidth from DC to 2 GHz. Refer to section How to set the external trigger? (page 69) for additional information. Trigger level The trigger level specifies the voltage at which the selected trigger source will produce a valid trigger. All trigger circuits have sensitivity levels that must be exceeded in order for reliable trigger to occur. The external trigger input has a hysteresis of 5% of FSR (Full Scale Range), and FSR is ±5 V, therefore the ADC card will trigger on signals with a peak-to-peak amplitude > 0.5 V. The internal channel trigger of the U5309A, is implemented digitally and as such, the level may be configured via the driver, within the limits shown in the table below.

13 Slope Min Max Positive =offset- range*127/256+Hysteresis =offset+range*126/256 Negative =offset- range*127/256 =offset+range*126/256- Hysteresis Table 1.5 - Minimum and maximum value of the digital channel trigger. "Offset" and "range" refer to the channel's current Vertical Offset and Vertical Range settings. The hysteresis is configured automatically as a function of the vertical FSR, as follows: Full Scale Range (Volts) Hysteresis (LSB) Hysteresis (Volts) 5 6 0.12 2.5 6 0.06 1 8 0.03 0.5 8 0.016 0.25 14 0.014 Table 1.6 - Minimum and maximum value of the digital channel trigger. "Offset" and "range" refer to the channel's current Vertical Offset and Vertical Range settings. Edge trigger slope The trigger slope defines which one of the two possible transitions will be used to initiate the trigger when it passes through the specified trigger level. Positive slope indicates that the signal is transitioning from a lower voltage to a higher voltage. Negative slope indicates the signal is transitioning from a higher voltage to a lower voltage. The trigger time interpolator is only applicable to the external trigger input (TRG IN), it does not operate on the channel trigger of the U5309A. Trigger precision and resolution The U5309A trigger time interpolator offers a resolution of 8 ps (nominal) and a precision of 15 ps RMS (nominal) . The channel trigger resolution and precision are both equal to 1 sample. The accuracy of absolute trigger time is guaranteed (as specified in the datasheet) down to sample rates 1/16 of the highest sample rate (1/32 of the highest sample rate with interleaving).

If comparing the initial trigger time T0 measured using the same waveform either used as channel input trigger or as an external trigger, the T0 position can be slightly different (especially if the waveform used as trigger has a slow edge). First, the analog bandwidth can be different for the channel trigger input and the external trigger input, resulting in a different slope and so a different T0. Secondly, compared with the channel trigger, the external trigger threshold is not calibrated. The input channel trigger calibration allows a T0 adjustment both in threshold and in timing, resulting in a more accurate T0. However, when using the external trigger, the measured T0 is still precise and theT0 position difference stays stable. Using a signal with faster edge as external trigger can reduce this effect. Trigger delays For more details about triggers modes, post/pre-trigger delays and time-stamps, see Trigger modes and time-stamps (page 47).

15 1.5 Calibration The U5309A is factory calibrated and shipped with a calibration certificate. The internal calibration refers to the adjustment of ADC card internal parameters, corresponding to user selected parameters and required before starting acquisition. Internal calibration The internal calibration (or self-calibration) measures and adjusts the internal timing, gain and offset parameters between the ADCs and against a precise reference. The ADC card includes a high precision voltage source and a 16-bit DAC, used to perform the input voltage and offset calibration. The supplied software drivers include self-calibration function which can be executed upon user request. The ADC cards are never self-calibrated in an automatic way, (i.e. as a consequence of another operation). This ensures programmers have full control of all calibration operations performed through software in order to maintain proper event synchronization within automated test applications. For accurate time and voltage measurements it is recommended to perform a self-calibration once the module has attained a stable operating temperature (usually reached after 20 minutes of ADC card operation after power on). A full internal calibration of a ADC card can be time consuming because of the many possible configuration states. Therefore, the self-calibration is performed only for the current configuration state, and is mandatory before making the first acquisition with given settings. Indeed the AqMD3 driver prevents an acquisition from being performed unless a self-calibration has first been completed. Note that some configuration changes do not require a new self-calibration. To avoid unnecessary self-calibrations, the IAqMD3Calibration.IsRequired IVI.NET property or the AQMD3_ATTR_ CALIBRATION_IS_REQUIRED IVI-C attribute should be queried. ADC card can usually work with signals present at the channel input, or trigger input. However, to ensure the best performance, or if the calibration is found to be unreliable (as shown by a calibration failure status), it is recommended to remove such signals. Similarly, when working with internal clock, it is recommended to remove external reference and external clock inputs during calibration to avoid parasitic effects. It is not recommended to perform multiple successive calibrations. If a recurrent calibration failure occurs, in case of specific application, please contact support for advice. Smart-calibration The smart calibration implemented in MD3 drivers allows to save time by automatically keeping in memory the calibration information from any self-calibration performed since the beginning of the session. When the acquisition parameters are changed, no re-calibration of the card is necessary if a

self-calibration has already been performed with the same acquisition conditions (i.e. the same set of parameters), unless the clock mode parameters are changed. Indeed, any change in the clock mode parameters (i.e. External clock frequency, Clock source or Reference mode parameters), induces a restart of the clocks which requires a new self-calibration. For details, see How to calibrate the card? (page 63). Factory calibration Factory calibration is the process of measuring the actual performance of a device-under-test (DUT) using laboratory instruments that have significantly better performance than the DUT. Laboratory instrument performance must be traceable to the International System (SI) Units via a national metrology institute (NIST, NPL, NRC, PTB, CENAM, INMETRO, BIPM, etc.) The measured performance is then compared to published datasheet specifications. For each factory calibration, Acqiris tests the performance corresponding to all datasheet specifications, for every installed option. If needed, the DUT is adjusted and re-qualified ; ensuring it is in line with full specifications. Our ADC cards are calibrated at factory during the production phase. There is no need to systematically calibrate each year. Firstly, the cards include a self-calibration function providing a good degree of confidence that your card is operating within its specifications on a day-to-day basis, and triggering an error message if out of calibration relative to the internal calibration signal. Secondly, our cards are warranted to stay within specification over the standard 3-year warranty. They usually stay within specification much longer and we rarely have to effectively recalibrate the cards. Lastly, a onetime calibration can be ordered in case customer detects a deviation in the measure of its final product that appears to be caused by the ADC card. The onetime calibration consists in processing the card through production test to determine if it is still within specification: If yes, the ADC card is returned with the certificate of calibration which certifies it is within spe- cification. If not, the required calibration is performed, and another production test is done to provide the certificate of calibration. If repair is required, and the card is out of warranty, a repair quote will be provided. For more information, or to request for a calibration, please contact technical support [email protected].

U5309A User's Manual 17 Chapter 2 Real-Time Processing Options The U5309A ADC Card provides several optional modes. This section describes each acquisition mode and associated real-time signal processing. 2.1 Acquisition modes and specific features 17 2.2 Easy firmware switch 18 2.3 Digitizer firmware (DGT option) 19 2.4 Real-time averaging (AVG option) 22 2.5 Peak Detection (PKD) 30 The modes available with your product depends on the firmware options ordered with your products. To check which options and mode are present on your ADC card you can use the MD3 Software Front Panel from the: Windows Start Menu > Acqiris > MD3 > Acqiris MD3 SFP. Then use the menu Help > About. The field System Options gives the option list. 2.1 Acquisition modes and specific features The following table show the availability of firmware options versus channel configuration and sampling rate. Firmware Channel Configuration & Sampling Rate -CH1/-CH2 -CH8 -SR0 -SR1 -SR2 -SR1 -DGT ü ü ü ü -AVG ü ü ü On-CH1only — -PKD ü ü ü On-CH1only — -TSR ü ü ü — Combining-AVG &-TSR ü ü ü — Table 2.1 - List of supported firmware options vs. sampling rate option.

18 U5309A User's Manual 2.2 Easy firmware switch A simple call to the configuration function will enable to switch to the required option.

U5309A User's Manual 19 2.3 Digitizer firmware (DGT option) The digitizer firmware (normal mode) allows standard data acquisition, including: ADC card initialization, setting of the acquisition and clocking modes, management of channel triggering for best synchronization, storing data in the internal memory and/or transferring them to the host computer. Single and multi-record acquisition modes To maximize sampling rates and utilize memory as efficiently as possible the ADC cards include both single and multi-record modes. For both of these modes the data of all of the active channels is acquired synchronously; all of the ADC's are acquiring data at the same time, to within a small fraction of the maximum sampling rate. The single record acquisition mode is the normal operation of most ADC card products. In this mode an acquisition consists of a waveform recorded with a single trigger. The user selects the sampling rate and record size, and sets the number of records to 1 (default value). For details about the trigger sources, see Trigger (page 12). Figure 2.1 - Acquisition sequence using a single record. The ADC cards also feature a multi-record acquisition mode. This mode allows the capture and storage of consecutive single waveforms. Multi-record acquisition mode is useful as it can optimize the ADC card's sampling rate and memory requirements for applications where only portions of the signal being analyzed are important. The mode is extremely useful in almost all impulse-response type applications (RADAR, SONAR, LIDAR, Time-of-Flight, Ultrasonics, Medical and Biomedical Research, etc.). In multi-record acquisition mode the acquisition memory is divided into a pre-selected number of records. Waveforms are stored in successive memory records as they arrive. Each waveform requires its own individual trigger. Figure 2.2 - Acquisition sequence using a multi-records. It is possible to miss a trigger at high trigger rate, as illustrated with trigger 3.

20 U5309A User's Manual The multi-record acquisition mode enables successive events, occurring within a very short time, to be captured and stored without loss. A very fast trigger rearm time is a crucial feature for multi- record acquisitions. Thanks to fast trigger rearm, the U5309A achieves very low “dead time” between the records of a multi-record acquisition. The “dead time” is the period after the end of an event when the card cannot accept a new trigger event. The re-arm time is provided in the U5309A's U5309A datasheet. Program examples for Single record or multi-records acquisitions are available: For IVI-C C1:\Program Files\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI-C For IVI.NET C:\Program Files\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI.NET Acquisition memory Data from the ADC is stored in on-board acquisition memory. The amount of memory in use for acquisition can be programmed and is selectable from 1 point to the full amount of acquisition memory available. Model Memory option ordered Acquisition memory Max samples/channel U5309A -CH2 -M01 128MB 64MS/ch -M05 512MB 256MS/ch -M20 2GB 1GS/ch U5309A -CH8 -M01 128MB 16MS/ch -M05 512MB 64MS/ch -M20 2GB 256MS/ch U5309A -CH1 -M01 64MB 64MS/ch -M05 256MB 256MS/ch -M20 1GB 1GS/ch U5309A -CH4 -M01 64MB 16MS/ch -M05 256MB 64MS/ch -M20 1GB 256MS/ch Table 2.2 - Maximum number of samples which can be recorded per channel, depending on ordered memory option. For technical reasons, a certain acquisition memory overhead is required for each waveform, reducing the available memory by a small amount. 1Or the alternative drive letter where the Acqiris MD3 Software has been installed on your machine.

U5309A User's Manual 21 The effective maximum memory available for acquisition depends on several parameters, such as the acquisition mode (single / multi-record / streaming), sampling rate, record size, number of records, trigger delay, etc.... This maximum is determined by the driver for each specific configuration. The AQMD3_ATTR_MAX_SAMPLES_PER_CHANNEL attribute in IVI-C or IAqMD3Acquisition.MaxSamplesPerChannel property in IVI.NET can be used to retrieve the maximum number of samples per channel that can be acquired for a specific configuration. When using the Soft Front Panel, the Max Samples per channel parameter is given on the Acquisition panel. Acquisition time (Timebase range) The timebase range defines the time period over which data is being acquired. For example, the U5309A-M01-SR1 has a standard acquisition memory of 64 MS/ch and a maximum sampling rate of 1 GS/s. Therefore, at the maximum sampling rate, the ADC card can record a signal over a time window of up to 67 ms (approx 67 M samples * 1 ns/ sample). Maximum acquisition time There is a limit on the acquisition time / acquisition length in digitizer mode depending on the record size, post trigger delay and binary decimation factor. Above this limit, the driver returns a post-trigger overflow. This limitation is given by the table below, where acquisition time = record size x sampling interval + post-trigger delay. Sample rate Max acquisition time (in seconds) 1.00E+09 68.72 Table 2.3 - Maximum acquisition time vs. sampling rate.

22 U5309A User's Manual 2.4 Real-time averaging (AVG option) Introduction Averaging signals reduces random noise effects, improving the signal-to-noise ratio, as well as increasing resolution and dynamic range. The averaging is performed by accumulating successive recorded waveforms. The number of waveforms to be accumulated and the record length are defined by user. The waveforms are successively acquired and stored in a record. The accumulation of all the waveform records results in an "accumulated record" which is provided in output. The main features are: Synchronous, single-channel and dual-channel, real-time sampling and averaging up to 2 GS/s Averaging from 1 up to 520'000 triggers, in steps of 8 triggers (excepted when using less than 8 triggers). Some possible values are 1, 2, 3, 4, 5, 6, 7, 8, 16, 24, 32, … triggers Effective acquisition length from 1 K up to 240 KSamples in dual-channel mode, or up to 480 KSamples if using only a single channel (CH1 option or if a single channel is used and the other one is disabled) Noise suppressed accumulation (NSA) Timing sequence The minimum time between summed events depends on the trigger Rearm Time as specified in the U5309A datasheet. Figure 2.3 - Timing sequence in real-time averaging mode. The current solution supports a single accumulated record. The number of potential trigger lost between two acquisitions depends on several factors: The time needed to perform the last accumulation AVG Dead Time, which depends on the number of samples acquired. The AVG Dead Time can be estimated at #Samples x 2.1 [ns] for SR2. The read time of the previous averaging sequence, depending on the number of samples to

U5309A User's Manual 23 transfer and mainly on the PCIe connection and PC multitasking activity.. The time to initiate the next acquisition. A solution to reduce the time between averaging sequences, is to combine AVG and TSR modes. See Averager with triggered simultaneous acquisition and readout (AVG/TSR option) (page 39) section for details. Noise suppressed accumulation (NSA) In some applications, such as time-of-flight spectrometry, the signal is a rare event sitting on top of a noisy baseline and the averaging process reduces the random noise. As a consequence, to enhance the acquisition card ability to detect such signals in the presence of synchronous noise, the averaging firmware allows the user to set a Threshold that must be exceeded for each data value to be entered into the sum. Furthermore, the noise base can be subtracted from each data value above threshold before the accumulation is done (See Figure below). The noise base should always be equal or smaller than the threshold. Figure 2.4 - Signal detection using noise suppressed accumulation. It is possible to use the NSA on negative polarity pulse. By enabling the channel data inversion capability, the signal will be inverted before applying the NSA settings. See Data inversion (page 1). Parameters: Enabled: Specifies whether the noise suppressed accumulation is active. This attribute affects card behavior only when the acquisition mode attribute is set to averager. Threshold: Specifies the threshold of the noise suppressed accumulation. Each data value must exceed the threshold value to be entered into the sum. This parameter is defined per channel in ADC counts. It can be configured in the range [0 to 255] . NoiseBase: Specifies the noise base value for the noise suppressed accumulation. The noise base is subtracted from data values which are higher than the configured threshold. This parameter is defined per channel in ADC counts. It can be configured in the range .

24 U5309A User's Manual The NSA basenoise must be equal or smaller than NSA threshold. Self trigger mode See Trigger output (page 51). Apart from the trigger sources described in the section Trigger (page 12) (internal and external triggering), another trigger mode called Self-Trigger enables minimum synchronous (pattern) noise. Acqiris’s ADC cards use several interleaved ADC cores. In applications where multiple waveforms are accumulated, the synchronicity between ADCs sequence and trigger results in a synchronous noise which often becomes the dominant factor.For successive measurements, or averaging, switching between the ADC cores to acquire the 1st sample of a data record avoids accumulation of synchronous noise. Self trigger In self-trigger mode an autonomous trigger signal is generated internally in the ADC card and output through the front panel I/O3 connector. This trigger signal consists of programmable periodic pulses that are synchronous to the sample clock. The self-trigger mode serves two purposes: – Reducing trigger jitter by synchronizing the input signal to the sample clock – Minimizing the synchronous noise, which consistently improve SNR through averaging of successive measurements. To use the Self-Trigger mode, the Trigger ActiveSource must be set to SelfTrigger. Figure below shows the signal to noise ratio using an external trigger at a frequency multiple of the sampling frequency (worst case) and the Self-Trigger at any frequency (best case), on a U5303A ADC card —Similar SNR improvement is expected on a U5309A starting from minimum SNR. Figure 2.5 - Example of signal to noise ratio vs Number of averagers for U5303A.

U5309A User's Manual 25 Parameters ActiveSource (IAqMD3Trigger.ActiveSource property): Specifies the trigger source. There are three trigger sources: internal, external and self-trigger. If the Self-Trigger mode is selected the Self-Trigger parameters should be set and the IO 3 output should be enabled. Frequency (IAqMD3TriggerSourceSelfTriggerSquareWave Interface): Specifies the frequency of the Self-Trigger square wave signal. The units are Hertz. DutyCycle (IAqMD3TriggerSourceSelfTriggerSquareWave Interface): Configures the duty cycle of the Self-Trigger square wave signal. Units are percentage of the period. Slope (IAqMD3TriggerSourceSelfTriggerSquareWave Interface): Specifies whether a rising or a falling edge of the generated waveform triggers the acquisition card. Out-AveragerAwg (ControlIOs interface): Self-Trigger signal is propagated through the IO 3. Post trigger delay The post trigger delay step depends on sampling rate and channel options, it can be summarized as follow: U5309A -CH1 -CH2 -SR2 multipleof16ns Notsupported -SR1 multipleof32ns multipleof16ns -SR0 multipleof64ns multipleof32ns Table 2.4 - Post-trigger delay granularity. Multi-purpose inputs and outputs (IO 1, 2) The multi-purpose inputs and outputs (IO 1, 2) in the front panel may be used to control the accumulation or read the ADC card status: Parameters (ControlIO interface) In-AccumulationEnable: ADC card input (IO 1). This signal controls the execution of the averaging sequence by checking its value only at the averager start. If the accumulation enable is '1' at the start, the averager will perform the average independently of this input value. By the contrary, if the accumulation enable is '0' at the start, the ADC card will wait until the accumulation enable rises to start the averaging at that moment (no need for a new start). Out-AccumulationActive: ADC card output (IO 2). This signal informs that the ADC card is busy accumulating. Out-AcquisitionActive: ADC card output (IO 1 or IO 2). This signal informs that the ADC card is busy acquiring.

26 U5309A User's Manual Data readout when using FetchAccumulatedWaveformInt32 The data returned by the driver is unsigned. Since the API is limited to signed data type (for AVG fetch Int32), a conversion should be applied to interpret data returned through API as unsigned int (32-bit) as in provided examples. IVI-C To convert from raw value to Volts: ViReal64 valueInVolts = static_cast(dataArray[firstValidPoint[currentRecord] + cur- rentPoint]) * scaleFactor + scaleOffset; IVI.NET To convert from raw value to Volts: IAqMD3AccumulatedWaveformCollection waveformCollection = null ; waveformCollection = instrument.Channels[«Channel1»].Measurement.FetchAccumulatedWaveform(0, nbrRecords, 0, nbrSamples, waveformCollection); foreach (var waveform in waveformCollection) { for (int point = 0; point < waveform.ValidPointCount; ++point) { double sampleInVolts = waveform.GetScaled(point); } } Partial readout after an incomplete accumulation It is possible to read data after an incomplete accumulation. If user stops the acquisition using an Acquisition.Abort before reaching the specified number of triggers, the accumulated data can be read, excepted for incomplete block of 8 triggers. For instance: - If the number of acquired triggers is <8, no data is available. - If the number of acquired triggers is between 8 and 16, the data accumulation for the first 8 triggers can be read. - If the number of acquired triggers is between 16 and 24, the data accumulation for the first 16 triggers can be read. And so on in multiple of 8 accumulations. After an Acquisition.Abort and an incomplete accumulation, the ScaleFactor and ScaleOffset returned by the Fetch function refer to the complete accumulation. In case of partial average readout, the effective scale factor is obtained from the returned ScaleFactor multiplied by the configured number of averages, and divided by the actual number of averages.

U5309A User's Manual 27 Other AVG Parameters Finally, below are specific parameters commonly used in the averager: NumberOfAverages: number of waveforms to average in the record. DataInversionEnabled: the data acquired may be inverted if desired, before the averaging. Mode: select the averager mode (IAqMD3Acquisition.Mode property in IVI.NET or AQMD3_VAL_ ACQUISITION_MODE_AVERAGER in IVI-C) Enabling the Averager mode IVI.NET The average mode is selected by setting IAqMD3Acquisition.Mode property to Acqiris.AqMD3.AcquisitionMode.Averager: instrument.Acquisition.Mode = AcquisitionMode.Averager; IVI-C The attribute AQMD3_ATTR_ACQUISITION_MODE (ViInt32) must be set to value AQMD3_VAL_ ACQUISITION_MODE_AVERAGER: AqMD3_SetAttributeViInt32( session, "", AQMD3_ATTR_ACQUISITION_MODE, AQMD3_VAL_ACQUISITION_MODE_AVERAGER ); Program examples for acquisitions with real-time averaging are available: For IVI-C C1:\Program Files\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI-C For IVI.NET C:\Program Files\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI.NET AVG Configuration The interfaces/methods/properties (functions/attributes) listed below are provided by the Acqiris MD3 Software. Detailed help on these interfaces may be found in the AqMD3 IVI Driver Help — Please refer to AqMD3.chm (IVI-C) or Acqiris.AqMD3.Fx40.chm (IVI.NET). 1Or the alternative drive letter where the Acqiris MD3 Software has been installed on your machine.

28 U5309A User's Manual IVI-C Functions Function Description AqMD3_NSAConfigure Configures the Noise Suppressed Accumulation prop- erties. AqMD3_FetchAc- cumulatedWaveformInt32 This function returns the accumulated waveform which the digitizer has acquired for the specified channel. This waveform is from a previously initiated accumulated acquisition in Averager or Peak Detec- tion mode. Returned waveform data units are raw accumulated ADC values which may be converted to Volts by the formula: V = ScaleFactor * data + ScaleOffset AqMD3_FetchAc- cumulatedWaveformReal64 This function returns the averaged waveform which the digitizer has acquired for the specified channel. This waveform is from a previously initiated accu- mulated acquisition in Averager or Peak Detection mode. Returned waveform data units are Volts. Attributes Attribute Description AQMD3_ATTR_ ACQUISITION_MODE The acquisition mode (i.e. Averager). AQMD3_ATTR_ ACQUISITION_NUMBER_ OF_AVERAGES Specifies the number of waveforms to average in the record. This attribute affects card behavior only when the Acquisition Mode attribute is set to Averager or PeakDetection. AQMD3_ATTR_NSA_ ENABLED Specifies whether the Noise Suppressed Accumulation is active. This attribute affects card behavior only when the Acquisition Mode attribute is set to Averager. AQMD3_ATTR_NSA_ NOISE_BASE Specifies the noise base value for the Noise Suppressed Accumulation. The noise base is subtracted from data values which are higher than the configured threshold. The units are ADC counts. AQMD3_ATTR_NSA_ THRESHOLD Specifies the threshold of the Noise Suppressed Accumulation. Each data value must exceed the threshold value to be entered into the sum. The units are ADC counts.

U5309A User's Manual 29 IVI.NET Interface Method / Property name Description IAqMD3Acquisition Mode Theacquisitionmode. IAqMD3Acquisition NumberOfAverages Specifies thenumberof waveforms toaver- ageintherecord. This attributeaffects card behavioronly whentheAcquisitionMode attributeis set toAveragerorPeak- Detection. IAqMD3ChannelAccumulationNSA Configure Configures theNoiseSuppressedAccu- mulationproperties. Enabled Specifies whethertheNoiseSuppressed Accumulationis active. This attribute affects cardbehavioronly whentheAcquis- itionModeattributeis set toAverager. NoiseBase Specifies thenoisebasevaluefortheNoise SuppressedAccumulation. Thenoisebase is subtractedfrom datavalues whichare higherthantheconfiguredthreshold. The units areADC counts. Threshold Specifies thethresholdof theNoiseSup- pressedAccumulation. Eachdatavalue must exceedthethresholdvaluetobe enteredintothesum. Theunits areADC counts. IAqMD3ChannelMeasurement FetchAccumulatedWaveformInt32 This functionreturns theaccumulatedwave- form whichtheADC cardhas acquiredfor thespecifiedchannel. This waveform is from apreviously initiatedaccumulatedacquis- itioninAveragerorPeak Detectionmode. Returnedwaveform dataunits areraw accu- mulatedADC values whichmay becon- vertedtoVolts by theformula: V = ScaleFactor* data+ ScaleOffset. FetchAccumulatedWaveformReal64 This functionreturns theaveragedwaveform whichtheADC cardhas acquiredforthespe- cifiedchannel. This waveform is from apre- viously initiatedaccumulatedacquisitionin AveragerorPeak Detectionmode. Returned waveform dataunits areVolts.

30 U5309A User's Manual 2.5 Peak Detection (PKD) Introduction The Peak Detection firmware allows real-time acquisition and peak detection for the models supported. Moreover, there is the possibility to generate a histogram of peak versus time for successive acquisitions (accumulation). Note that PKD does not reduce the amount of data memorized. This function searches for the peaks, sets the rest of the data to zero (where there is no peak) and memorizes the data set to zero and the peaks. The main features are: Synchronous, single-channel and dual-channel, real-time sampling and peak detection up to 2 GS/s. Accumulation of 1 to 520,000 triggers in steps of 8 triggers (except the first 8 triggers). Some possible values are 1,2,3,4,5,6,7,8,16,24,32,… triggers. Effective acquisition length from 1 K up to 240 KSamples. Self-Trigger mode for minimal synchronous noise. Peak detection algorithm Nine samples are used to validate if a sample corresponds to a peak; the sample itself, along with the four samples before and after that sample are considered. The sample will be considered as a peak, if within the 9 samples analyzed: a rising edge is found before the sample that exceeds the programmable delta ΔRise, a falling edge is found after the sample that exceeds the programmable delta ΔFall, and the sample is the maximum of all points between the two defined rising and falling edges. There is additional verification to make sure that only one peak is found within the rising and falling edge region. Using this algorithm, peaks can be found on-the-fly in signals with frequencies up to half the sample rate. Figure 2.6 - Peak detection algorithm Parameters(Channels.Item.PeakDetection interface): AmplitudeAccumulationEnabled: selects if the peak value is stored or the peak value is forced to '1'.

U5309A User's Manual 31 RisingDelta: defines the amount by which two consecutive samples must differ to be considered as rising edge in the peak detection algorithm. FallingDelta: defines the amount by which two consecutive samples must differ to be considered as falling edge in the peak detection algorithm. Timing sequence The minimum time between summed events depends on the trigger Rearm Time as specified in the U5309A datasheet. Figure 2.7 - Timing sequence in PKD mode Current solution supports a single sequence mode. The number of potential trigger lost depends on several factors: The time needed to perform the last accumulation PKDDead Time, which depends on the num- ber of samples acquired (For instance, PKD Dead Time is 2.189 ms for an acquisition of 480 ksamples), The time to read the previous PKD acquisition sequence, depending on the number of samples to transfer and mainly on the PCIe connection. The time to initiate the next acquisition. Post trigger delay The post trigger delay step depends on sampling rate and channel options, it can be summarized as follow: U5309A -CH1 -CH2 -SR2 multipleof16ns Notsupported -SR1 multipleof32ns multipleof16ns -SR0 multipleof64ns multipleof32ns Table 2.5 - Post-trigger delay granularity. Multi-purpose inputs and outputs (IO 1, 2) The multi-purpose inputs and outputs (IO 1, 2) in the front panel may be used to control the accumulation or read the ADC card status:

32 U5309A User's Manual Parameters (ControlIO interface) In-AccumulationEnable: ADC card input (IO 1). This signal controls the execution of the averaging sequence by checking its value only at the averager start. If the accumulation enable is '1' at the start, the averager will perform the average independently of this input value. By the contrary, if the accumulation enable is '0' at the start, the ADC card will wait until the accumulation enable rises to start the averaging at that moment (no need for a new start). Out-AccumulationActive: ADC card output (IO 2). This signal informs that the ADC card is busy accumulating. Out-AcquisitionActive: ADC card output (IO 1 or IO 2). This signal informs that the ADC card is busy acquiring. Other parameters NumberOfAverages: number of waveforms to average in the record. DataInversionEnabled: the data acquired may be inverted if desired. PKD configuration The interfaces/methods/properties (functions/attributes) listed below are provided by the Acqiris MD3 driver. Detailed help may be found in the AqMD3 IVI Driver Help (Please refer to AqMD3.chm (IVI-C) or Acqiris.AqMD3.Fx40.chm (IVI.NET)). Program examples for acquisitions with real-time peak detect are available: For IVI-C C1:\Program Files\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI-C For IVI.NET C:\Program Files\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI.NET IVI-C Functions AqMD3_SelfTriggerAbortGeneration AqMD3_SelfTriggerInitiateGeneration AqMD3_SelfTriggerSquareWaveConfigure AqMD3_SelfTriggerCustomWaveLoadConfigurationFile AqMD3_PeakDetectionConfigure Attributes AQMD3_ATTR_SELF_TRIGGER_MODE AQMD3_ATTR_SELF_TRIGGER_SQUARE_WAVE_DUTY_CYCLE AQMD3_ATTR_SELF_TRIGGER_SQUARE_WAVE_FREQUENCY AQMD3_ATTR_SELF_TRIGGER_SQUARE_WAVE_SLOPE 1Or the alternative drive letter where the Acqiris MD3 Software has been installed on your machine.

U5309A User's Manual 33 AQMD3_ATTR_ACQUISITION_MODE AQMD3_ATTR_ACQUISITION_NUMBER_OF_AVERAGES AQMD3_ATTR_CHANNEL_DATA_INVERSION_ENABLED AQMD3_ATTR_PEAK_DETECTION_RISING_DELTA AQMD3_ATTR_PEAK_DETECTION_FALLING_DELTA AQMD3_ATTR_PEAK_DETECTION_AMPLITUDE_ACCUMULATION_ENABLED IVI.NET Interface Method / Property name IAqMD3TriggerSourceSelfTrigger AbortGeneration IAqMD3TriggerSourceSelfTrigger InitiateGeneration IAqMD3TriggerSourceSelfTrigger Mode IAqMD3TriggerSourceSelfTriggerSquareWave Configure IAqMD3TriggerSourceSelfTriggerSquareWave DutyCycle IAqMD3TriggerSourceSelfTriggerSquareWave Frequency IAqMD3TriggerSourceSelfTriggerSquareWave Slope IAqMD3TriggerSourceSelfTriggerCustomWave LoadConfigurationFile IAqMD3Acquisition Mode IAqMD3Acquisition NumberOfAverages IAqMD3Channel DataInversionEnabled IAqMD3ChannelPeakDetection Configure IAqMD3ChannelPeakDetection AmplitudeAccumulationEnabled IAqMD3ChannelPeakDetection FallingDelta IAqMD3ChannelPeakDetection RisingDelta

Chapter 3 Readout modes 3.1 Standard readout modes As presented in the Digitizer firmware (DGT option) (page 19), the two standard acquisition and readout modes are: Single record mode: one shot with single waveform, with a single trigger Multi-record mode: one shot with multiple waveforms, with multiple triggers Figure 3.1 - Acquisition sequence using a single record. Figure 3.2 - Acquisition sequence using multi-records. The specific readout mode(s) detailed in the following depends on your product version and ordered options.

U5309A User's Manual 35 3.2 Triggered simultaneous acquisition and readout (TSR) Overview The purpose of the TSR option is to acquire in multi-record mode and read the data simultaneously. This solution allows longer acquisition duration compare with standard acquisition (DGT) and is dedicated to applications requiring no trigger loss. TSR option is not supported in association peak detection (PKD) mode. TSR and AVG modes can be combined. See Averager with triggered simultaneous acquisition and readout (AVG/TSR option) (page 39) section for details. Functional description Standard acquisition and readout vs. TSR mode In a standard multi-record acquisition and readout the duration of the acquisition is limited by the ADC card internal buffer memory size. The readout of the data is performed after the acquisition has stopped. The acquisition data rate supported is up to the maximum allowed by the ADC card. With the triggered simultaneous acquisition and readout (TSR), the readout of the data is performed during the acquisition. The readout can be performed as soon as a programmable number of records is acquired. Each segment is triggered by an external or software trigger. Unlike Continuous Simultaneous acquisition and Readout (CSR) (page 1) mode, this mode allows gaps in the acquisition. Figure 3.3 - Sequence of a multi-record acquisition, with TSR mode.

36 U5309A User's Manual Figure 3.4 - Illustration of the recorded data in the on-board memory when using TSR mode. After initiating the acquisition, when the 1st trigger occurs, the card records data and stores it into a circular buffer which can be read simultaneously. Thanks to TSR mode, the data rate can be sustained without losing any trigger. The maximum performances of the system depend on the records size and trigger rate of the application. Mode of operation The TSR option implements an optimal and automated control of memory addressing. It results in an easy to use solution when compared with solutions requiring memory bank management. User can choose not to select the number of records. In this case, the driver provided with the ADC card will automatically select the maximum number of records depending on the memory option and the number of samples per records. If the TSR Enabled property is set to true (and the Initiate Acquisition function is launched), the card will acquire data and store them into a circular buffer which can be read simultaneously. Once the Acquisition is initiated, the user has to poll on the TSR IsAcquisitionComplete property to check for the availability of data. When minimum programmable number of records are acquired, data can be fetched through standard (single- or multi-record) fetch functions. The TSR Continue function can be called to release the buffer containing the read data and make it available for the next acquisitions. User can also release the buffer after partial read or without reading any data. The TSR MemoryOverflowOccurred property indicates that no more memory is available to perform additional acquisitions, implying that follow-on triggers may be lost. For maximum performance, it is recommended to optimize the number of record to be acquired before the readout starts (NumRecordsToAcquire). Typically, if the number of samples per record is low, reading several records in one single Direct Memory Access (DMA) optimize the DMA transfer. There is a compromise between memory readout frequency and PCIe delay. (Recommendation is to set the number of record before readout to reach around 1 MB of data). It is recommended to set the NumRecordsToAcquire to a value close to 1 MB/(Record size).

U5309A User's Manual 37 If an overflow occurs, the writing is disabled, implying that follow-on triggers may be lost. A property indicates that no more memory is available to perform additional acquisitions. The already acquired data are still valid and can be read-out. Memory can be cleared only with Acquisition -> Abort(). A typical usage example is shown below (pseudo-instructions): Enable TSR operation Initiate acquisition Loop until needed Check for memory overflow Poll for acquisition completion Fetch data Continue (release memory) End loop Abort acquisition Code example Program examples are available: For IVI-C C1:\Program Files\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI-C For IVI.NET C:\Program Files\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI.NET Due to design constraints, the number of trigger events needed to have an acquisition complete can be higher than the number of records configured (through NumRecordsToAcquire property). It is therefore mandatory to query the TSR IsAcquisitionComplete property to check for data availability. TSR configuration The interfaces/methods/properties (functions/attributes) listed below are provided by the Acqiris MD3 driver. Detailed help may be found in the AqMD3 IVI Driver Help — Please refer to AqMD3.chm (IVI- C) or Acqiris.AqMD3.Fx40.chm (IVI.NET). IVI-C Functions AQMD3_TSRContinue Attributes AQMD3_ATTR_TSR_ENABLED AQMD3_ATTR_TSR_IS_ACQUISITION_COMPLETE 1Or the alternative drive letter where the Acqiris MD3 Software has been installed on your machine.

38 U5309A User's Manual AQMD3_ATTR_TSR_MEMORY_OVERFLOW_OCCURRED IVI.NET Interface Method / Property name IAqMD3AcquisitionTSR Continue IAqMD3AcquisitionTSR Enabled IAqMD3AcquisitionTSR IsAcquisitionComplete IAqMD3AcquisitionTSR MemoryOverflowOccurred

U5309A User's Manual 39 3.3 Averager with triggered simultaneous acquisition and readout (AVG/TSR option) Overview The combination of averaging mode and streaming feature (AVG & TSR options) allows signal acquisition, real time averaging and data readout simultaneously, avoiding trigger loss. The averager features are the same as with AVG option (max number of average, max record size, triggering, …) — see detail in section Real-time averaging (AVG option) (page 22). The addition of simultaneous acquisition and readout feature (TSR) on top of real-time averaging, enable minimal dead time between accumulations. Functional description The architecture is based on TSR (Triggered simultaneous acquisition and readout), and enables simultaneous real time averaging and transfer of average records to host processor. Acquisition sequence As illustrated below, the readout of an "averager record" is performed during the next averager accumulation The readout can be performed as soon an "averager record" is acquired. Sequence in AVG and TSR mode Figure 3.5 - Acquisition and readout seuence in AVG+TSR mode.

40 U5309A User's Manual When compared with standard averager mode, the AVG&TSR mode has neither AVG dead time nor readout time between acquisition sequences. The overall dead time between average records is minimum and limited to trigger re-arm time (~ 800 ns), minimizing the risk of trigger loss. Thanks to TSR mode, high data rate can be sustained without losing any trigger. The number of averages for an averager sequence can be selected: from 1 to 520 000 triggers. Abort function is not yet supported in AVG +TSR mode. The workaround is to close and reinitialize the card. Usage Supported configuration U5309A-AVG/TSR, all sampling rates supported: SR0 @ 500 MS/s SR1 @ 1 GS/s SR2 @ 2 GS/s U5309A-CH4 and U5309A-CH8 are not supported. Acquisition sequence First, user should configure the averager: Accumulation settingsand features are the same as standard AVG. Then TSR mode has to be enabled. Acquisition are performed continuously until you stop them. See detailed acquisition sequence below.

U5309A User's Manual 41 Figure 3.6 - AVG+TSR acquisition sequence.

42 U5309A User's Manual Performance Excepted for small number of averages, the architecture enables no trigger loss. The maximum performance of the system depends on the number of average and the trigger rate. The minimum number of average is 8. The maximum number of average records only depends on the record size and the size of the storage device. Output format The readout of the averager records and output format are the same than with standard averager mode. Each AVG readout sequence illustrated on figure above, has a latency time (similar to "AVG deadtime") before starting data readout. But there is no trigger lost during this time, contrary to standard AVG mode. Limited risk of overflow There is a risk of overflow only with configurations using minimum number of averages, and very high trigger rate. If an overflow occurs, the writing is disabled, implying that follow-on triggers may be lost. A property indicates that there is no more memory available to perform additional acquisitions. Abort function is not yet supported in AVG +TSR mode. So in this case, memory can be cleared by closing and reinitializing the card. AVG/TSR Configuration Regarding averager AVG function, the interfaces/methods/properties (functions/attributes) are detailed in AVG Configuration (page 27) section or TSR configuration (page 37) section. Detailed help may be found in the AqMD3 IVI Driver Help (AqMD3.chm). Code example Program examples can be found in here: For IVI-C C1:\Program Files\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI-C For IVI.NET C:\Program Files\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI.NET 1Or the alternative drive letter where the Acqiris MD3 Software has been installed on your machine.

U5309A User's Manual 43 Chapter 4 Other Signal Processing Features This sections presents the on-board signal processing features that can be enable e.g. to optimize signal performance or reduce data volume, depending on each application. These features are common to the acquisition modes, excepted when specified differently. 4.1 Sampling rate reduction (binary decimation) 44

44 U5309A User's Manual 4.1 Sampling rate reduction (binary decimation) A programmable binary decimation may be used to lower the sample rate by a ratio of 2n, where n is defined in the range of 1 to 10, depending on the model and configuration (See Table below). To enable decimation, user should set the sampling rate to required decimated sampling rate. Model Sampling rate option Acquisition mode Maximum Decimation Ratio Lower supported sampling rate CH1/CH2 -SR0 Singlerecord 28 1.9531MS/s Multi-Record 23 62.5MS/s -SR1 Singlerecord 29 1.9531MS/s Multi-Record 24 62.5MS/s -SR2 Singlerecord 210 1.9531MS/s Multi-Record 25 62.5MS/s CH4/CH8 -SR1 - Notsupported N/A Table 4.1 - List of selectable sampling rates. The accuracy of absolute trigger time is guaranteed (as specified in the U5309A datasheet) down to sample rates 1/16 of the highest sample rate (1/32 of the highest sample rate with interleaving).

U5309A User's Manual 45 Chapter 5 Control and Synchronization 5.1 External clock and reference 46 5.2 Trigger modes and time-stamps 47 5.3 Trigger output 51 5.4 Multi-purpose inputs and outputs 53

46 U5309A User's Manual 5.1 External clock and reference For applications for which the user wants to replace the internal clock of the acquisition card and drives the ADC with an external source, either an external clock or an external reference signal can be used. The clock or reference signal can be entered into the ADC card by the dedicated CLK IN and REF IN connectors. External clock (CLK IN) The External Clock may be used to vary the sampling rate of the ADC card. If selected for the ADC card, it must be continuously present to operate correctly. The input is AC coupled. Parameter Value CH2 CH8 FrequencyRange 1.8GHzto2.2GHz 3.6GHzto4.4GHz Amplitude +5to+15dBm Threshold 0V Table 5.1 - External clock input specifications. Note that the sample rate will depend on the model option, as shown in the table below: Channel Configuration Option Sample rate CH2 -SR0 =Externalclockfrequency/4 -SR1 =Externalclockfrequency/2 -SR2 =Externalclockfrequency CH8 -SR0 N/A -SR1 =Externalclockfrequency/4 -SR2 N/A Table 5.2 - Effective sampling rate when using external clock. External reference (REF IN) For applications that require greater timing precision and long-term stability than is obtainable from the internal clock, a 100 MHz reference signal can be used. The external reference is nominally at 100 MHz. However, frequencies in a range will be accepted. If your input is not at exactly the specified value, you must remember to compensate for the difference in your application since the ADC card and the driver have no way to know about such deviations.

U5309A User's Manual 47 Parameter Value Tolerance NominalFrequency 100MHz ±100kHz Signallevel -3dBmto+3dBm Impedance 50Ω Coupling AC Table 5.3 - External reference specifications. If synchronization between several ADC cards is required, the reference signal should be applied to all of them. 5.2 Trigger modes and time-stamps Trigger modes As listed previously the trigger source can be: the signal applied to an input channel (digital internal triggering) an external signal applied to the TRG IN front panel input connector (external triggering) a software trigger (See How to generate a software trigger? (page 67)) Pre- and post-trigger delay Description To increase trigger flexibility, a pre- or post-trigger delay can be applied to the trigger position.

48 U5309A User's Manual Figure 5.1 - Acquisition timeline depending on the trigger delay defined. Trigger delay parameter The amount of pre-trigger delay can be adjusted between 0 and 100% of the acquisition time window (i.e. sampling interval x number of samples), whereas the post-trigger delay can be adjusted within the time interval: from 0 to (232 – 1) * block_size (samples) where block_size is 16. Pre- or post-trigger delays are just different aspects of the same trigger positioning parameter: The condition of 100% pre-trigger indicates that all data points are acquired prior to the trigger, i.e. the trigger point is at the end of the acquired waveform. The condition of 0% pre-trigger (which is identical to a post-trigger of 0%) indicates that all data points are acquired immediately after the trigger, i.e. the trigger point is at the beginning of the acquired waveform. The condition of a non-zero post-trigger delay indicates that the data points are acquired after the trigger occurs, at a time that corresponds to the post-trigger delay, i.e. the trigger point is before the acquired waveform. By definition post-trigger settings are a positive number and pre-trigger settings are a negative number. Thus it is only natural that the software drivers treat pre- and post-trigger delays as a single parameter in seconds that can vary between: – NumberSamples * SamplingInterval (100% pre-trigger) and + MaxPostTrigSamples * SamplingInterval (max post-trigger). The ADC card hardware accepts pre- and post-trigger adjustments in increments of 16 samples.

U5309A User's Manual 49 Trigger time interpolator and time-stamps The trigger time-stamp is the trigger arrival time. The ADC card accurately measures and stores these time-stamps using the information from the on board Trigger Time Interpolator (TTI). This information is essential for determining the precise relation between the trigger and the digitized samples of the signal. The TTI resolution determines the resolution of the trigger time-stamps. Please refer to Trigger section of your U5309A datasheet for the relevant specifications. Managing time-stamps The ADC card features a time-stamp counter. In multi-record acquisitions, each acquired record has a precise time-stamp, given by the time-stamp counter. The accurate time-stamp of each trigger is given by the sum of the time reference and the time-stamp counter. The time reference is configured: at the first card initialization, at the last initialization with reset flag = 1, or when using Set Time function (IVI-C) or writing Time (IVI.NET). The time-stamp counter is reset each time the time reference is configured. Parameters IVI-C InitialXTimeSeconds: Specifies the seconds portion of the absolute time at which the first data point was acquired. InitialXTimeFraction: Specifies the fractional portion of the absolute time at which the first data point was acquired. The actual time is the sum of InitialXTimeSeconds and InitialXTimeFraction. Adding these values in a variable of type double implies a loss of precision. IVI.NET StartTime: StartTime is the time between the first valid data point (that is the data point at index FirstValidPoint) in the waveform and the trigger. Positive values indicate that the StartTime occurred after the trigger. If StartTime is zero, the waveform is not relative to anything, or the relative measure is zero, or the waveform is empty. EndTime: EndTime is the time between the last valid data point in the waveform and the TriggerTime. Positive values of EndTime indicate that it occurred after the trigger. If EndTime is zero, there is exactly one data point and the StartTime is zero, or the waveform is empty. TotalTime: TotalTime is the timespan represented by the valid points in the waveform. Numerically, it is equivalent to the IntervalPerPoint * (ValidPointCount - 1). It is also numerically the

50 U5309A User's Manual EndTime – StartTime. TotalTime is zero if there is exactly one data point in the waveform, or the waveform is empty. TriggerTime: TriggerTime is the absolute time at which this measurement was triggered. Note that this differs from Start Time in that the trigger may have occurred at some time other than when the first data point was captured, as in pre-trigger or post-trigger applications. TriggerTime is an absolute time and cannot be set to zero. If it is set to NotATime, the waveform is empty or there is no absolute reference for the waveform.

U5309A User's Manual 51 5.3 Trigger output A trigger output pulse can be generated for external synchonization. When the ADC card is ready to be triggered and a valid trigger signal occurs, a trigger output pulse is generated. This signal is available on the front panel TRG OUT MMCX connector, and may be enabled or disabled as required. In idle state, Trigger Out signal is low. When a trigger is accepted a high level pulse occurs. There are several trigger sources or signals which may be assigned to the trigger out connector (See table below). Trigger out sources Description of signal TriggerAccepted ApulsesignalissentdirectlytotheTrigger Out. TriggerAcceptedResync Apulsesignalresynchronizedtoasub-multipleofsampleclockissentto theTrigger Out. TriggerCompare Thetrigger inputconditionhasbeensatisfied,butnotnecessarily triggered,e.g.thetrigger enablewasnotasserted. HighLevel Fixedhighlevelsignalfor debugpurposes. LowLevel(default) Fixedlow levelsignalfor debugpurposes. Table 5.4 - List of supported trigger out signals. Trigger output signal behavior By default, the trigger output is LowLevel. If selecting a trigger output source, e.g. TriggerAcceptedResync or TriggerAccepted as trigger output source, when the ADC card is ready to be triggered and a valid trigger signal occurs, a trigger output pulse is generated. Selecting the trigger output source The trigger output can be selected using following properties / attributes: Driver Attribute / Property Available Instance Value IVI-C AQMD3_ATTR_TRIGGER_OUTPUT_ENABLED Boolean AQMD3_ATTR_TRIGGER_OUTPUT_OFFSET Real64 AQMD3_ATTR_TRIGGER_OUTPUT_SOURCE LowLevel,HighLevel,TriggerAccepted, TriggerAcceptedResync,TriggerCompare IVI.NET IAqMD3TriggerOutput.Source IAqMD3TriggerOutput.Enabled Boolean IAqMD3TriggerOutput.Offset Double

52 U5309A User's Manual Specifications Figure 5.2 - Trigger output block diagram. In the default software configuration, the output swing is 1.6 V (±0.8 V) when unloaded and 0.8 V (±0.4 V) when terminated on 50 Ω. The rise and fall times are 2.5 ns typical. The offset can be adjusted by software control in the range [–2.5 V to +2.5 V] unloaded, or [-1.25 V to +1.25 V] into 50 Ω. The maximum output current capability is ±15 mA. As the output is retro-terminated, it is possible to drive a 50 Ω line un-terminated (HiZ) without loss of performance. For a TTL compatible signal, set the offset to 1.0 V and the swing at destination will be +0.2 to +1.8 V. For an ECL compatible signal, terminated on 50 Ω to –1.2 V, set the offset to –1.2 V and the output will be in the range [–0.8 to –1.6 V]). Alternatively, to reduce the current drawn from the ADC card, the terminations shown here can be used: Figure 5.3 - Suggested trigger signal terminations. The external trigger output functionality is implemented in the hardware. No trigger out signal occurs for software-generated or digital triggers.

U5309A User's Manual 53 5.4 Multi-purpose inputs and outputs The multi-purpose I/O connectors may be used for any of the functions shown in the following table: IO Connector Functions Type Description of signal Mode / Option Notes Inputs Disabled - IO connector isdisabled. In-ToLogicDevices - ThePio_IninputsignaltotheDPU user core IO 1-Pio_In(0),IO 2-Pio_In(1). Thesesignalsareresynchronizedtothe samplingclockdividedby16andtransferred fromtheControlFPGAtotheDPU withanon- deterministicclockcyclelatency. -FDK In-AccumulationEnable Level Thissignalcontrolstheexecutionofthe averagingsequence. -AVG or - PKD IO 1only Outputs Out-LogicDeviceDPUA - ThePio_OutoutputsignalfromtheDPU user coreIO 2-Pio_Out(1). ThesesignalsaretransferredfromtheDPU to theControlFPGAwithanon-deterministic clockcyclelatency. -FDK Out-FPGASyncOut Pulse TheSyncOutoutputsignalfromtheDPU user core.ThissignalistransferredfromtheDPU to theControlFPGAwithadeterministicclock cyclelatency. -FDK Out-100MHzRe- ferenceClockDivBy2 Clock The100MHzreferenceclockdividedby2(50 MHz). IO 1only Out-SamplingClockDivBy32 Clock Thesamplingclockdividedby32. IO 1only Out-AcquisitionActive Level Indicatesthattheacquisitioniscurrentlyrun- ning. Digitizer mode IO 1&2only Out-TriggerArmed Level Trigger isarmed. IO 1&2only Out-LowLevel Level Fixed'low'levelsignalfor debugpurposes. Out-HighLevel Level Fixed'high'levelsignalfor debugpurposes. Out-TriggerAcceptedResync Pulse Activewhenavalidtrigger eventhasoccurred. Thissignalisresynchronizedtothesample clock. Out-AccumulationActive Level Indicatesthattheaccumulationiscurrentlyrun- ning. IO 2only. Requires- AVG or - PKD option. Table 5.5 - List of signals selectable for the programmables I/Os . The list of Available signals is indicated (as a comma separated list) by member IAqMD3ControlIO.AvailableSignals (IVI.NET) or attribute AQMD3_ATTR_CONTROL_IO_ AVAILABLE_SIGNALS (IVI-C).

54 U5309A User's Manual Signal Logic Levels The multi-purpose IO signals are 3.3 V CMOS compatible (5V Tolerant buffer). The levels shown in the table below should be observed. Direction Low level High level Input <0.8V >2.0to3.45V Output Intherange0to0.8V Intherange1.6to3.3V Table 5.6 - Logic levels. As an Input The input is high-impedance and will be pulled high if unconnected via an internal weak pull-up (42.2 k pull-up resistor). Figure 5.4 - Programmable IO schematic As an Output The high level output will typically give 1.6 V into 50 Ω. As can be seen in the diagram below, the 3.3 V output buffer has a 50 Ω resistor in series. Therefore the available output high level voltage will depend on the load applied. In the example below a 50 Ω termination will result in a nominal high level of 1.6 V. (Vo = (Rload/(50 + Rload)) * 3.3). Figure 5.5 - Output equivalent circuit.

55 Chapter 6 Programming Information This section provides general programming information regarding the use of the Acqiris drivers. The AqMD3 IVI driver provides access to the functionality of AqMD3 ADC cards through a .NET or ANSI C API which also complies with the IVI specifications. 6.1 Overview of the AqMD3 Driver Development environments IVI-C Driver The AqMD3 IVI-C driver can be used in the following development environments: Visual C++, LabWindow/CVI, LabVIEW, MATLAB. IVI.NET Driver The AqMD3 IVI.NET driver can be used in the following development environments: Visual C#, Visual C++/CLI, Visual Basic.NET Driver API documentation The AqMD3 APIdocumentation can also be accessed from: IVI-C: Start > Acqiris > MD3 > Documentation > AqMD3-C IVI Driver Version# Documentation IVI.NET: Start > Acqiris > MD3 > Documentation > AqMD3.NET IVI Driver Version# Documentation or from: IVI-C : C:\Program Files1\IVI Foundation\IVI\Drivers\AqMD3\AqMD3.chm IVI.NET: C:\Program Files\IVI Foundation\IVI\Drivers\AqMD3\Acqiris.AqMD3.Fx40.chm.lnk You can also found more information about IVI at http://www.ivifoundation.org/resources. The drivers IVI.COM AqMD2 and IVI-C AqMD2, based on previous AgMD2 driver, are available but are no recommended for new designs or new projects. See C:\Program Files (x86)\IVI Foundation\IVI\Drivers\AqMD2 1(Or your installation path)

56 U5309A User's Manual Program examples You may build and run the example programs installed with the driver. They demonstrate driver usage in a variety of application development environments. Program examples can be found in C:\Program Files\IVI Foundation\IVI\Drivers\AqMD3\Examples 6.2 Programming with the IVI-C Driver in various development environments IVI-C drivers are implemented using standard Windows DLL technology. Consequently, IVI-C drivers can be used in a wide variety of development environments. The topics in this section provide detailed instructions on how to access and use IVI-C drivers in a variety of popular development environments. Each topic includes a complete example of IVI-C driver usage. Using Visual C++ Explains how to use the IVI-C driver from Visual C++ . Referencing the Driver In order to access any of the driver functions, the proper header file (.h) must be included in the project and the proper import library (.lib) must be referenced. This section demonstrates usage of the driver using instrument-specific references. All IVI-C driver programs must do the following: #include "AqMD3.h" Link to AqMD3.lib Prefix function calls with "AqMD3_" To use the AqMD3 specific driver, perform the following steps in Visual Studio. 1. In solution explorer, right-click on the project and choose Properties. 2. In the property pages dialog, expand the Linker node and select Input. 3. In the Additional Dependencies field, enter "AqMD3.lib". 4. Click OK. 5. In the main application source file (.cpp), add the following line to the top of the file: #include "AqMD3.h" Visual Studio must know the path to your driver's library (.lib) and header (.h) files. You can enter the following paths using the Tools, Options, Projects and Solutions, VC++ Directories dialog. For Include Files (Win32 & x64) add: C:\Program Files (x86)\IVI Foundation\IVI\Include For Library Files (Win32) add: C:\Program Files (x86)\IVI Foundation\IVI\Lib_\msc For Library Files (x64) add: C:\Program Files (x86)\IVI Foundation\IVI\Lib_x64\msc Note: For 32 bit operating systems paths start with: C:\Program Files\ Alternately, these paths may be entered in the Project Properties dialog, Configuration Properties, C++ and Linker panes.

U5309A User's Manual 57 Initializing the Driver Calling AqMD3_InitWithOptions will establish an I/O connection to an instrument (often referred to as an "I/O session") or setup the driver to work in simulation mode. Calling AqMD3_close at the end of your program is required by the IVI specifications, else unpredictable driver behavior could result. Any resources held by the driver will not be properly released if close is not called. For more details on initializing the driver, see AqMD3.chm, section Initializing the Driver. ViSession session; ViStatus status; status = AqMD3_InitWithOptions("PXI40::0::0::INSTR", VI_TRUE, VI_TRUE, "", &session); status = AqMD3_close(session); Initializing Using Options This example shows how IVI-defined initialization options and driver-specific options can be passed to the Initialize function. // If true, this will query the instrument model and fail initialization // if the model is not supported by the driver ViBoolean idQuery = VI_FALSE; // If true, the instrument is reset at initialization ViBoolean reset = VI_FALSE; // Setup IVI-defined initialization options ViConstString standardInitOptions = "Cache=true, InterchangeCheck=false, QueryInstrStatus=true, RangeCheck=true, RecordCoercions=false, Simulate=false"; status = AqMD3_InitWithOptions("PXI40::0::0::INSTR", idQuery, reset, standardInitOptions, &session); status = AqMD3_close(vi); Accessing Attributes Accessing attributes in an IVI-C driver is accomplished via a set of IVI-defined accessor functions. There are two accessor functions for each attribute type -- one accessor for reading attribute values and another accessor for writing attribute values. The standard attribute accessors for reading attribute values are: GetAttributeViInt32 GetAttributeViInt64 GetAttributeViReal64 GetAttributeViBoolean GetAttributeViString Correspondingly, the standard attribute accessors for writing attribute values are: SetAttributeViInt32 SetAttributeViInt64 SetAttributeViReal64 SetAttributeViBoolean SetAttributeViString Each attribute accessor takes an attribute ID that uniquely identifies the attribute to access. These attribute IDs are #define'd constants listed in the AqMD3.h header file and documented in the "Attributes by Name" section of the help file. The following example demonstrates basic usage of attribute accessors to read and write IVI-C driver attribute values.

58 U5309A User's Manual 6.3 Migrating from MD2 2.x to MD3 3.x Please refer to the following documents for guidelines, accessible from: Start > Acqiris > MD3 > Documentation or from: C:\Program Files\Acqiris\MD3\Documentation AgMD2 to AqMD3 (IVI-C) Software Migration Note.pdf AgMD2 IVI.COM to AqMD3 IVI.NET Software Migration Note.pdf

U5309A User's Manual 59 6.4 Initial configuration At initialization, the driver uses the pre-defined defaults values. The following table details the initial configuration of the ADC card. Property Default value Comment Channeli(withi=1,2,...) Enable Inputfilter Bypass=false Thebandwidthisfixed Verticalrange 5(Volts) 1VonU5309-LVR Verticaloffset 0(Volts) Verticalcoupling DC Trigger source External1 Trigger delay 0(ns) Trigger type Edge Trigger coupling DC Trigger level 0(Volts) Trigger slope Positive Interleave Disable Mode Normal(DGT) Samplingrate DependsonSRxoption Sampleclock Internal Sampleclockexternalfrequency DependsonSRxoption External clock and reference (page 46) Sampleclockexternaldivider DependsonSRxoption Fixed(Sampleclockexternalfrequency/Samp- lingrate) Referenceoscillator Internal Referenceoscillator frequency 100MHz Fixed Recordsize 1024 Number ofrecordstoacquire 1 Number ofaverages 1 for AVG andPKD modeonly

60 U5309A User's Manual 6.5 Apply setup The MD3 driver implements the following consistent behavior: No configuration change is applied immediately to the ADC card hardware. Specifically, this means that setting any property/attribute only changes the 'setup' in the driver, and an explicit call to ApplySetup is required to implement the change in the card hardware. There are some exceptions for 'actions': being methods/functions that perform an action which e.g. modifies also the ADC card's state. The following methods WILL perform an implicit ApplySetup before the actual action. Actions with implicit ApplySetup Method name Description SelfTest Toinsurethecardisactuallyinthedesiredstatebeforedoingtheselftest. SelfCalibrate Toinsurethecardisactuallyinthedesiredstatebeforeself-calibrating. Initiate Toapplytheconfiguredsetuptothecardhardwarebeforestartingthemeasurement. Read AllReadmethodsstartbyperforminganInitiatefollowedbyWaitandthenFetch. Reset PlacesthecardinaknownstateandconfigurescardoptionsonwhichtheIVIspecific driver depends. ResetWithDefaults DoestheequivalentofResetandthen,(1) disablesclassextensioncapabilitygroups,(2) setsattributestoinitialvaluesdefinedbyclassspecs,and(3) configuresthedriver tooption stringsettingsusedwhenInitializewaslastexecuted.

U5309A User's Manual 61 Chapter 7 How To ... ? 7.1 How to discover the PXI Instrument? 62 7.2 How to calibrate the card? 63 7.3 How to configure and read data on two channels? 65 7.4 How to access repeated capabilities? 66 7.5 How to generate a software trigger? 67 7.6 How to perform time-interleaving acquisitions? 68 7.7 How to set the external trigger? 69 7.8 How to perform binary decimation? (depending on firmware) 70 7.9 How to perform partial readout? 71 7.10 How to load a new firmware? 74 7.11 How to optimize NSA settings? 75 7.12 How to switch from normal mode acquisition (Multi-record) to averager mode? 76

62 U5309A User's Manual 7.1 How to discover the PXI Instrument? The C/C++ code below can be used to discover the PXI instruments on user system and get their VISA addresses. #include #include int main() { ViSession rm = VI_NULL; viOpenDefaultRM( &rm ); ViChar search[] = "PXI?*::INSTR"; ViFindList find = VI_NULL; ViUInt32 count = 0; ViChar rsrc[256]; ViStatus status = viFindRsrc( rm, search, &find, &count, rsrc ); if( status==VI_SUCCESS && count>0 ) { do { printf( "Found: \"%s\"\n", rsrc ); status = viFindNext( find, rsrc ); } while( status==VI_SUCCESS ); viClose( find ); } else if( count==0 ) { printf( "No PXI instrument found\n" ); } viClose( rm ); return 0; }

U5309A User's Manual 63 7.2 How to calibrate the card? Calibration principle The card is initialized without calibration. A calibration is mandatory before making any acquisition to guarantee measurement accuracy. The MD3 driver prevents an acquisition from being performed unless a self-calibration has first been completed. Since a full internal calibration of an ADC card can be time consuming because of the many possible configuration states, the self-calibration is performed only for the current configuration state. A new self-calibration is required after every change of configuration of the card. See Calibration (page 15) section. Running fast calibration The function SelfCalibrate should be used to perform a fast calibration. As explained above, a calibration is required after every acquisition parameter modification (e. g. full scale range, filter, sample rate, ...). The IAqMD3Calibration.IsRequired IVI.NET property or the AQMD3_ATTR_CALIBRATION_IS_REQUIRED IVI-C attribute can be used to check if a new self calibration is required . MD3 Smart-calibration The smart calibration implemented in MD3 drivers allows to save time by automatically keeping in memory the calibration information from any self-calibration performed since the beginning of the session. When the acquisition parameters are changed, no re-calibration of the card is necessary if a self-calibration has already been performed with the same acquisition conditions (i.e. the same set of parameters), unless the clock mode parameters are changed. Indeed, any change in the clock mode parameters (i.e. External clock frequency, Clock source or Reference mode parameters), induces a restart of the clocks which requires a new self-calibration.

64 U5309A User's Manual Group Category Parameter Calibration required A Acquisition Samplingrate Onlythe1sttime,for anidenticalsetofparameter values Channelparameters Verticalrange Inputfilter Bypass(Yes/No) B Trigger Trigger source Onlythe1sttime C Externalreference Referencemode(Externalor InternalReference) Eachtimethisparameter changes Clockmode Externalclockfrequency Eachtimethisparameter changes Clocksource Eachtimethisparameter changes Driver interfaces and functions The interfaces/methods/properties (functions/attributes) listed below are provided by the Acqiris MD3 driver. Please refer to AqMD3.chm (IVI-C) or Acqiris.AqMD3.Fx40.chm (IVI.NET) for detailed help. IVI-C Functions AqMD3_SelfCalibrate AqMD3_CalibrationLoadFromFile AqMD3_CalibrationSaveToFile Attributes AQMD3_ATTR_CALIBRATION_IS_REQUIRED IVI.NET Interface Method / Property name IAqMD3Calibration IsRequired SelfCalibrate SaveToFile LoadFromFile

U5309A User's Manual 65 7.3 How to configure and read data on two channels? To configure and read the data on two channels, user should: 1) Configure two channels. For instance: //configure channel1 driver.Channels["Channel1"].Configure(range, offset, coupling, true); //configure channel2 driver.Channels["Channel2"].Configure(range_ch2, offset_ch2, coupling, true); 2) Readout both channels. For instance: // Fetch acquired data. // Giving a null pointer as data array to the fetch function means the // driver will allocate the proper amount of memory during the fetch call. Ivi.Digitizer.IWaveformCollection waveformsCh1 = null; Ivi.Digitizer.IWaveformCollection waveformsCh2 = null; waveformsCh1 = driver.Channels["Channel1"].MultiRecordMeasurement.FetchMultiRecordWaveform (firstRecord, numRecords, offsetWithinRecord, numPointsPerRecord, waveformsCh1 ); //fetch the data on channel 2 waveformsCh2 = driver.Channels["Channel2"].MultiRecordMeasurement.FetchMultiRecordWaveform (firstRecord, numRecords, offsetWithinRecord, numPointsPerRecord, waveformsCh2 );

66 U5309A User's Manual 7.4 How to access repeated capabilities? For U5309A, the AqMD3 driver supports the following repeated capabilities with pre-defined values detailed in following table. Repeated capability Available instance name Channel "Channeli",withi=[1-2]or =[1-8]dependingon-CH2or -CH8option. TriggerSource "Internali",withi=[1-2]or =[1-8]dependingon-CH2or -CH8option, "External1","Software","Immediate", "SelfTrigger" (for AVG,PKD mode) ArmSource Notsupported LogicDevice For -FDKoptiononly: "DPUA" PrivateFirmware Notaccessible PrivateStore Notaccessible ControlIO1 "ControlIO1","ControlIO2","ControlIO3" DelayControl Notsupported LogicDeviceIFDL(Inter FPGA DataLink) Notsupported LogicDeviceMemoryBank For -FDKoptiononly: "DPUA:DDR3A","DPUA:DDR3B" MonitoringValue Theseparametersarefor informationonlyor canbeusedfor debuggingpurpose. ThereareaccessiblethroughtheMD3SFPor thecommandbelow.Pleaserefer to AqMD3.chm (IVI-C) or Acqiris.AqMD3.Fx40.chm (IVI.NET) . Stream Notsupported 1For details, please refer to Multi-purpose inputs and outputs (page 53). The number of instances and their names however can be queried from the driver: Using the AqMD3 IVI.NET driver: Collection Interfaces have a Count property. Instances interface have Name property. User can iterate over all collection instances using .NET foreach loop control. Using the AqMD3 IVI-C driver: For each repeated capability XXX, there is a AqMD3_ATTR_XXX_COUNT attribute and a AqMD3_GetXxxName function (e.g. AqMD3_ATTR_CHANNEL_COUNT attribute and AqMD3_ GetChannelName function).

U5309A User's Manual 67 7.5 How to generate a software trigger? A call to function AqMD3_SendSoftwareTrigger (IVI-C) or to method IAqMD3Trigger.SendSoftwareTrigger (IVI.NET) sends a single software trigger. SendSoftwareTrigger() must be called as many times as required. Multi-record acquisitions required a trigger per record. Accumulated records require a trigger per accumulation. SendSoftwareTrigger() needs to be called for each trigger event.

68 U5309A User's Manual 7.6 How to perform time-interleaving acquisitions? It is possible to combine two channels and to perform an acquisition at higher sampling rate. The following example give the function calls used to: combine the two channels, use channel 1 and set the sampling rate to GS/s Channels time-interleaving (IVI-C) AqMD3_SetAttributeViString(session, "Channel1", AQMD3_ATTR_TIME_INTERLEAVED_CHANNEL_LIST, "Channel2"); AqMD3_SetAttributeViReal64(session, "", AQMD3_ATTR_SAMPLE_RATE, e9); Channels time-interleaving (IVI.NET) driver.Channels[L"Channel1"].TimeInterleavedChannelList = "Channel2"; spDriver->Acquisition->SampleRate = e9; In order to disable interleaveaving, the following code can be used: Channels time-interleaving (IVI-C) AqMD3_SetAttributeViString(session, "Channel1", AQMD3_ATTR_TIME_INTERLEAVED_CHANNEL_LIST, ""); Channels time-interleaving (IVI.NET) driver.Channels[L"Channel1"].TimeInterleavedChannelList = "";

U5309A User's Manual 69 7.7 How to set the external trigger? To set the trigger source to External1 and configure the trigger level, the following commands can be used. IVI-C: AqMD3_SetAttributeViString(session, "", AQMD3_ATTR_ACTIVE_TRIGGER_SOURCE, "External1"); AqMD3_SetAttributeViReal64(session, "External1", AQMD3_ATTR_TRIGGER_LEVEL, level); IVI.NET: spDriver->Trigger->ActiveSource = "External"; IAqMD3TriggerSourcePtr spTrigSrc = spDriver->Trigger->Sources->Item[L"External1"]; spTrigSrc->Level = level; //in volts The different trigger sources are listed in the section How to access repeated capabilities? (page 66).

70 U5309A User's Manual 7.8 How to perform binary decimation? (depending on firmware) The binary decimation is not supported for all combinations of firmware, channel configuration and sampling rate. It is supported only with the digitizer (-DGT) or TSR (-TSR) mode. It is not supported in Averager (- AVG) or Peak Detection (-PKD) mode. The available decimation factors depend on the channel configuration (-CHx) and sampling rate (-SRx) options of your digitizer. Please refer to Sampling and Data Acquisition (page 11)section for more information. Using the AqMD3 IVI-C driver: To use the binary decimation and set the sample rate to a lower value use the AQMD3_ATTR_ SAMPLE_RATE attribute. sampleRate = 200e6; status=AqMD3_SetAttributeViReal64(session,””, AQMD3_ATTR_SAMPLE_RATE,sampleRate); Using the AqMD3 IVI.NET driver: To use the binary decimation and set the sample rate to a lower value use the SampleRate property. sampleRate = 200e6; driver.Acquisition.SampleRate = sampleRate;

U5309A User's Manual 71 7.9 How to perform partial readout? If the acquisition uses a single record with large record size, the ADC card memory can be read in two or more blocks. It is possible to read the data partially using several calls to AqMD3_ FetchMultiRecordWaveformXXX (IVI-C)or MultiRecordMeasurement.FetchMultiRecordWaveform(IVI.NET) function, defining the first record, the number of records, the first point and the number of points the user wants to read at each call of the function. Example using AqMD3 IVI-C Reading Int16 data in two blocks of points/2 length each (with NUM_RECORDS =1)

72 U5309A User's Manual ViConstString channel = "Channel1"; ViInt64 const firstRecord = 0; ViInt64 const offsetWithinRecord = 0; ViInt64 const numRecordsToRead = 1; ViInt64 const numPointToRead = points / 2; ViInt64 arraySize = 0; ViInt16* dataArray = NULL; ViInt64 actualRecords = 0; ViInt64 actualPoints[numRecordsToRead], firstValidPoint[numRecordsToRead]; ViReal64 initialXOffset[numRecordsToRead], initialXTimeSeconds [numRecordsToRead], initialXTimeFraction[numRecordsToRead]; ViReal64 xIncrement = 0.0, scaleFactor = 0.0, scaleOffset = 0.0; ViStatus status = VI_SUCCESS; // Computes minimum data array size for the requested fetch status = AqMD3_QueryMinWaveformMemory(session, 16, numRecordsToRead, 0, numPointToRead, &arraySize); if (status != VI_SUCCESS) { /*handle errors and warnings*/ } // Allocate memory for waveform data dataArray = (ViInt16*)malloc((size_t)arraySize * sizeof(ViInt16)); // Fetch the first numPointToRead data status = AqMD3_FetchMultiRecordWaveformInt16( session , channel , firstRecord , numRecordsToRead , offsetWithinRecord , numPointToRead , arraySize , dataArray , &actualRecords , actualPoints , firstValidPoint , initialXOffset , initialXTimeSeconds , initialXTimeFraction , &xIncrement , &scaleFactor , &scaleOffset); if (status != VI_SUCCESS) { /*handle errors and warnings*/ } // Fetch the second numPointToRead data into the same data array status = AqMD3_FetchMultiRecordWaveformInt16( session , channel , firstRecord , numRecordsToRead , offsetWithinRecord + numPointToRead , numPointToRead , arraySize , dataArray , &actualRecords , actualPoints , firstValidPoint , initialXOffset , initialXTimeSeconds , initialXTimeFraction , &xIncrement , &scaleFactor , &scaleOffset); if (status != VI_SUCCESS) { /*handle errors and warnings*/ }

U5309A User's Manual 73 Example using AqMD3 IVI.NET Reading Int32 data in two blocks (with NUM_RECORDS =1) // Fetch the acquired data in array. long offsetWithinRecord = 0; long firstRecord = 0; string channel = "Channel1"; long numRecordsToRead = 1; long numPointToRead = driver.Acquisition.RecordSize / 2; // Create waveform collection with the requested number of records and points to fetch var waveforms = driver.Acquisition.CreateWaveformCollectionInt32(numRecordsToRead, numPointToRead); //To first the first numPointToRead data: waveforms = driver.Channels[channel].MultiRecordMeasurement.FetchMultiRecordWaveform (firstRecord, numRecordsToRead, offsetWithinRecord, numPointToRead, waveforms); //To first the last numPointToRead data using the same waveform object: waveforms = driver.Channels[channel].MultiRecordMeasurement.FetchMultiRecordWaveform (firstRecord, numRecordsToRead, offsetWithinRecord + numPointToRead, numPointToRead, waveforms);

74 U5309A User's Manual 7.10 How to load a new firmware? The on-board FPGAs (field-programmable gate arrays) contain processor logic needed to efficiently execute several crucial functions. They will be automatically programmed at startup before calibration.

U5309A User's Manual 75 7.11 How to optimize NSA settings? The following procedure can be used to find the optimal settings using MD3 SFP. The same type of the procedure can be executed from a program. First of all the NSA should always be used in conjunction with the Baseline Stabilization on U5309A. Optimizing the NSA parameters Parameters (Channels2.Item2.Accumulation.NSA interface): 1. Enabled: Specifies whether the Noise Suppressed Accumulation is active 2. NoiseBase: Specifies the noise base value for the Noise Suppressed Accumulation. The noise base is subtracted from data values which are higher than the configured threshold. This parameter is defined per channel in ADC counts in the range 0 to 8191 LSB. 3. Threshold: Specifies the threshold of the Noise Suppressed Accumulation. Each data value must exceed the threshold value to be entered into the sum. This parameter is defined per channel in ADC counts in the range 0 to 8191 LSB. The NoiseBase should be equal to 0 The Threshold should be roughly 3 sigma (3 times the standard deviation noted in the previous step) + DigitalOffset as set at the previous step (100). In the following picture the assumption is that DigitalOffset was set = 100 and the standard deviation is 4, e.i the threshold is 100 + 3*4 = 112. Now you can set the number of averages to a number which is convenient for you (for example 1000 averages/accumulations) and your low intensity peak should stand out from the baseline noise. The procedure shown is valid for positive peaks. If your peaks are negative, they can be digitally inverted via the data inversion parameter in the channel configuration.

76 U5309A User's Manual 7.12 How to switch from normal mode acquisition (Multi-record) to averager mode? If you perform acquisition in standard digitizer mode using multi-records and then want to switch to averager mode, you may have the following exception: "AqMD3: Invalid value '1' for method 'put_Mode', parameter 'Acquisition Mode'. Multi-record acquisitions not supported for Acquisition Mode Averager or PeakDetection.IDispatch error #28176" The averager mode is supported with a single record only. When you want to change the acquisition mode from the multi-record to the averager mode (or peak-detection), you need to set the NumRecordsToAcquire parameter to 1 before changing the acquisition mode. If you attempt to set a configuration that is not valid, the driver returns an error and does not apply any changes. For instance, you can proceed using the following instructions: Set the NumRecordsToAcquire = 1 driver.Acquisition.NumRecordsToAcquire = 1; Then change the acquisition mode to averager driver.Acquisition.Mode = AcquisitionMode.Averager;

77 Chapter 8 Software utilities This section describes supplied programs which may be used to configure various aspects of your cards. 8.1 ADC card Verification Utility (AqMD3Verify) The AqMD3Verify utility verifies the card status: This utility proposes the user to connect a precise simple reference signal, and then, it com- pares the ADC card acquisition of this reference signal with reference signal expected values. This utility checks the version of control FPGA firmware already loaded. If necessary, it pro- poses to update the firmware using the Firmware Update Utility. You can launch AqMD3Verify from the start menu. AqMD3Verify requests the user to connect a reference signal and then to press any key to continue (as shown in the window below). AqMD3Verify checks the version of control FPGA firmware already loaded, and if necessary, proposes the user to update the firmware, automatically using the Firmware Update Utility (As shown in the window below : Accept the FPGA update answering "y").

78 U5309A User's Manual When the version of control FPGA firmware is updated and successful, please power off your computer, restart it again for the update to take effect, and process AqMD3Verify tool as described in this section.

79 Chapter 9 FAQ 9.1 Q. What is coherent sampling? 79 9.2 Q. How to manage the internal temperature? 79 9.3 Q. What are the differences between the various data streaming firmware options supported by high-speed ADC cards ? 80 9.4 Q. What happens if the host processor goes in hibernation mode? 81 9.1 Q. What is coherent sampling? A. Coherent Sampling refers to the relationship between the input frequency Fin, sampling frequency Fs, number of cycles in the sampled set and the number of samples. With coherent sampling one is assured that the signal power in an FFT is contained within one FFT bin (assuming a single input tone). The condition for coherent sampling is given by: Fin/Fs=Ncycles/Nsamples For example if we have Nsamples = 211, and Fs = 100e6, and we expect and input frequency close to Fs/2, let's say Fin = 44 MHz, then Ncycles = 901.12 which is close to an integer. We could therefore round down to Ncycles = 901 and we would get Fin = 43.994140625 MHz, which is an input frequency that satisfies coherent sampling. The integer number should be chosen carefully. We have three possible types of integers, even, odd, and prime. Even is not a good idea since we would hit the same code every Msamples, where M can be much less than N. Odd is a better idea since it takes longer to hit the same code. According to some sources a prime number of cycles is the best (with the exception of the prime 2) because it takes a long time before the same code repeats. —————————————————————— 9.2 Q. How to manage the internal temperature? A. The operating temperature of the U5309A as specified in the U5309A datasheet, is the workstation internal ambient temperature at intake of the ADC card's fan.

cards ? 80 U5309A User's Manual The effective temperature limit is fixed by the maximum internal DPU temperature which should stay below 85°C to guarantee FPGA proper operating. The ADC card's fan speed is automatically controlled with the internal temperature, it maintains the FPGA core temperature below 85°C. This DPU FPGA core temperature (or junction temperature Tj) can be monitored from the MD3 SFP from Interfaces > Temperature, or using the function BoardTemperature (IVI.NET) / AqMD3_ QueryBoardTemperature (IVI-C). Note that the channel temperatures (given by ChannelTemperature (IVI.NET) / AqMD3_ ChannelTemperature (IVI-C)) can reach 100°C in standard operating mode, which is within the components operating conditions. This parameter is provided for information only. —————————————————————— 9.3 Q. What are the differences between the various data streaming firmware options supported by high-speed ADC cards ? A. Acqiris ADC cards offer various acquisition modes depending on user requirements. Definitions DGT: standard DiGiTizer mode. TSR: Triggered Simultaneous acquisition and Readout. CSR: Continuous Simultaneous acquisition and Readout. CST: Continuous Simultaneous acquisition and readout, with triggers. Supported models The supported firmware options depend on ADC card model and are summarized in the table below. Module DGT (no-option) TSR CSR CST U5303A √ √ √ U5309A √ √ U5310A √ √ SA220P √ √ Acquisition modes With standard DGT mode, acquisition and readout are sequential, whereas CSR, TSR and CST options allows simultaneous acquisition and readout. DGT, TSR and CSR modes allow triggered multiple records. CSR, TSR and CST options enable longer acquisition duration when compared with standard DGT options since they offers simultaneous gapless acquisition and readout.

U5309A User's Manual 81 Especially, TSR and CST options are dedicated to applications requiring no trigger loss. Indeed, only TSR or CST allows gap between the records. When performing continuous gapless acquisition, CSR option is recommended. Output format With TSR, output data includes acquired data and decoded trigger timestamps (i.e. Acquired data are fetched as standard IVI waveforms, same as with DGT mode). With CST or CSR, user gets raw data on output. User can read on output two data streams independently: raw acquired data and trigger information (absolute trigger position). Data transfer rate The data transfer performance is higher with CST or CSR and data transfer performance independent of trigger settings / record size. —————————————————————— 9.4 Q. What happens if the host processor goes in hibernation mode? A. Hibernation while the ADC card is in operation is not supported. Recommendation is to close the ADC card before the host computer is allowed to go into hibernation. There are many situations where equipment should go into hibernation mode. If the system allows hibernation for saving power, then the ADC card should also be powered down. If user system is capable of managing hibernation, then when the application code decides/detects that the system should go into hibernation, it can close the ADC card, and re-initialize it when it wakes up from hibernation. After being powered off, the ADC card must reload of the FPGA (several seconds) upon power on, and a self-calibration is required.

Chapter 10 General information 10.1 Safety notes The following safety precautions should be observed before using this product and any associated instrumentation. This product is intended for use by qualified personnel who recognize shock hazards and are familiar with the safety precautions required to avoid possible injury. Read and follow all installation, operation, and maintenance information carefully before using the product. If this product is not used as specified, the protection provided by the equipment could be impaired. This product must be used in a normal condition (in which all means for protection are intact) only. The types of product users are: Responsible body is the individual or group responsible for the use and maintenance of equipment, for ensuring that the equipment is operated within its specifications and operating limits, and for ensuring operators are adequately trained. Operators use the product for its intended function. They must be trained in electrical safety procedures and proper use of the card. They must be protected from electric shock and contact with hazardous live circuits. Service personnel are trained to work on live circuits, perform safe installations, and repair products. Only properly trained service personnel may perform installation and service procedures. Operator is responsible to maintain safe operating conditions. To ensure safe operating conditions, cards should not be operated beyond the full temperature range specified in the datasheet. Exceeding safe operating conditions can result in shorter lifespans, improper card performance and user safety issues. When the cards are in use and operation within the specified full temperature range is not maintained, card surface temperatures may exceed safe handling conditions which can cause discomfort or burns if touched. In the event of a card exceeding the full temperature range, always allow the card to cool before touching or removing cards from host computer or chassis. Exercise extreme caution when a shock hazard is present. Lethal voltage may be present on cable connector jacks or test fixtures. The American National Standards Institute (ANSI) states that a shock hazard exists when voltage levels greater than 30 V RMS, 42.4 V peak, or 60 V DC are present. A good safety practice is to expect that hazardous voltage is present in any unknown circuit before measuring. Operators of this product must be protected from electric shock at all times. The responsible body must ensure that operators are prevented access and/or insulated from every connection point. In some cases, connections must be exposed to potential human contact. Product operators in these

U5309A User's Manual 83 circumstances must be trained to protect themselves from the risk of electric shock. If the circuit is capable of operating at or above 1000 V, no conductive part of the circuit may be exposed. Do not connect cards directly to unlimited power circuits. They are intended to be used with impedance-limited sources. NEVER connect cards directly to AC mains. When connecting sources to cards, install protective devices to limit fault current and voltage to the card. Before operating a card, ensure that the line cord is connected to a properly-grounded power receptacle. Inspect the connecting cables, test leads, and jumpers for possible wear, cracks, or breaks before each use. When installing equipment where access to the main power cord is restricted, such as rack mounting, a separate main input power disconnect device must be provided in close proximity to the equipment and within easy reach of the operator. For maximum safety, do not touch the product, test cables, or any other instruments while power is applied to the circuit under test. ALWAYS remove power from the entire test system and discharge any capacitors before: connecting or disconnecting cables or jumpers, installing or removing ADC cards, or making internal changes, such as installing or removing jumpers. Do not touch any object that could provide a current path to the common side of the circuit under test or power line (earth) ground. Always make measurements with dry hands while standing on a dry, insulated surface capable of withstanding the voltage being measured. The card and accessories must be used in accordance with its specifications and operating instructions, or the safety of the equipment may be impaired. Do not exceed the maximum signal levels of the cards and accessories, as defined in the specifications and operating information, and as shown on the card or test fixture panels, or ADC card. If you are using a test fixture, keep the lid closed while power is applied to the device under test. Safe operation requires the use of a lid interlock. Cards and accessories shall not be connected to humans. Before performing any maintenance, disconnect the line cord and all test cables. Any part or component replacement must be done by Acqiris. No operator serviceable parts inside. Refer servicing to qualified personnel. To prevent electrical shock do not remove covers.

84 U5309A User's Manual 10.2 Cleaning precautions To prevent electrical shock, disconnect the card from mains before cleaning. Use a dry cloth or one slightly dampened with water to clean the external case parts. Do not attempt to clean internally. To clean the connectors, use alcohol in a well-ventilated area. Allow all residual alcohol moisture to evaporate, and the fumes to dissipate prior to energizing the card. 10.3 Product markings The CE mark is a registered trademark of the European Community. Australian Communication and Media Authority mark to indicate regulatory compliance as a registered supplier. This symbol indicates product compliance with the Canadian Interference-Causing Equipment Standard (ICES-001). It also identifies the product is an Industrial Scientific and Medical Group 1 Class A product (CISPR 11, Clause 4). South Korean Class A EMC Declaration. this equipment is Class A suitable for professional use and is for use in electromagnetic environments outside of the home. A 급기기( 업무용방송통신기자재) 이기기는업무용(A 급) 전자파적합기기로서판매자또는사용자 는이점을주의하시기바라며, 가정외의지역에서사용하는것을목적으로합니다. This symbol on an card means caution, risk of danger. You should refer to the operating instructions located in the user documentation in all cases where the symbol is marked on the card.

U5309A User's Manual 85 This product complies with the WEEE Directive marketing requirement. The affixed product label (above) indicates that you must not discard this electrical/electronic product in domestic household waste. Product Category: With reference to the equipment types in the WEEE directive Annex 1, this product is classified as “Monitoring and Control instrumentation” product. To return unwanted products, contact your local Acqiris office. This symbol indicates the time period during which no hazardous or toxic substance elements are expected to leak or deteriorate during normal use. Forty years is the expected useful life of the product. This symbol indicates the card is sensitive to electrostatic discharge (ESD). ESD can damage the highly sensitive components in your card. ESD damage is most likely to occur as the module is being installed or when cables are connected or disconnected. Protect the circuits from ESD damage by wearing a grounding strap that provides a low resistance path to ground. Alternatively, ground yourself to discharge any built-up static charge by touching the outer shell of any grounded instrument chassis before touching the port connectors. This symbol denotes a hot surface. The side cover of the module will be hot after use and should be allowed to cool for several minutes. 10.4 Electrical & environmental specifications For full specifications, please refer to the U5309A datasheet. 10.5 Related documentation All documentation relating to your ADC card may be found from https://extranet.acqiris.com/. If you have run the Acqiris MD3 software installer on your PC, the related product documentation has been installed to your hard drive.

86 U5309A User's Manual Document Description Startup Guide Includes procedures to help you to unpack, inspect, install (software and hardware), perform card connections, verify operation,andtroubleshootyour product. User Manual Provides in-depth information and reference material specific toyour ADC cardproduct Data Sheet In addition to a detailed product introduction, the data sheet suppliesfullproductspecifications. Soft Front Panel (help system) ProvidesinformationontheuseoftheSoftFrontPanel. IVI Driver reference (help system) Provides detailed documentation of the IVI.NET and IVI-C driver API functions, as well as information to help you get started with using the IVI drivers in your application developmentenvironment. 10.6 Full product family This help file has been organized to allow easy access by arranging the product lines under their form factors listed below: PCI express ADC cards The products in the industry standard PCI Express format benefit from the very high data transfer rates of the PCIe interface, and occupying a single slot in a host PC. They also feature programmable on-board processing capabilities. Acqiris Model Number Model Name U1084A 8-bitPCIeHigh-speedPCIeADC cardwithon-boardsignalprocessing U5303A 12-bitPCIeHigh-speedADC cardwithon-boardsignalprocessing U5309A 8-bitPCIeHigh-SpeedADC cardwithon-boardsignalprocessing U5310A 10-bitPCIeHigh-SpeedADC cardwithon-boardsignalprocessing Note: That the U1084A product utilizes PCIe Gen 1.1 and a x4 slot, whereas the U53xx series support PCIe Gen 2.0 and a x8 slot. PXI express ADC card This product line is composed of Acqiris PXI Express high-speed ADC cards. These are PXI Express compliant, using either a PXIe or PXIe Hybrid slot. Designed to benefit from fast data interfaces, the products can be integrated with other test and automation modules in PXIe and Hybrid chassis slots. The PXI format offers high performance in a small, rugged package. It is an ideal deployment platform for many automated test systems Acqiris Model Number Model Name U5203A PXIExpress12-bitHigh-SpeedDigitizer

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