DFI DV970 Operation & User’s Manual

1 DV970 COM Express Basic Module User’s Manual A47900847 Preliminary Version

2 Copyright This publication contains information that is protected by copyright. No part of it may be re- produced in any form or by any means or used to make any transformation/adaptation without the prior written permission from the copyright holders. This publication is provided for informational purposes only. The manufacturer makes no representations or warranties with respect to the contents or use of this manual and specifi- cally disclaims any express or implied warranties of merchantability or fitness for any particular purpose. The user will assume the entire risk of the use or the results of the use of this docu- ment. Further, the manufacturer reserves the right to revise this publication and make changes to its contents at any time, without obligation to notify any person or entity of such revisions or changes. Changes after the publication’s first release will be based on the product’s revision. The website will always provide the most updated information. © 2018. All Rights Reserved. Trademarks Product names or trademarks appearing in this manual are for identification purpose only and are the properties of the respective owners. COM Express Specification Reference PICMG® COM Express ModuleTM Base Specification. http://www.picmg.org/ FCC and DOC Statement on Class B This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC rules. These limits are designed to provide reason- able protection against harmful interference when the equipment is operated in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encour- aged to try to correct the interference by one or more of the following measures: • Reorient or relocate the receiving antenna. • Increase the separation between the equipment and the receiver. • Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. • Consult the dealer or an experienced radio TV technician for help. Notice: 1. The changes or modifications not expressly approved by the party responsible for compli- ance could void the user’s authority to operate the equipment. 2. Shielded interface cables must be used in order to comply with the emission limits.

3 Table of Contents Copyright .............................................................................................................2 Trademarks ........................................................................................................2 COM Express Specification Reference ...................................................2 FCC and DOC Statement on Class B .....................................................2 Warranty ..............................................................................................................4 Static Electricity Precautions ......................................................................4 Safety Measures ..............................................................................................4 About the Package .........................................................................................5 Optional Items..................................................................................................5 Before Using the System Board ...............................................................5 Chapter 1 - Introduction .............................................................................6 Specifications ................................................................................................6 Features ..........................................................................................................7 Chapter 2 - Concept ....................................................................... 8 COM Express Module Standards ..............................................................8 Specification Comparison Table ...............................................................9 DV970 PCIe Lanes Routing Table ......................................................... 10 Chapter 3 - Hardware Installation .............................................. 11 Board Layout ............................................................................................... 11 System Memory .......................................................................................... 12 Installing the DIMM Module ....................................................................... 12 Connectors ................................................................................................... 13 CPU Fan Connector.................................................................................... 13 COM Express Connectors ........................................................................... 14 COM Express Connectors Signal Discription ................................................. 17 Standby Power LED ................................................................................... 29 Cooling Option ............................................................................................ 29 Heat Sink with Fan ..................................................................................... 29 Installing DV970 onto a Carrier Board ................................................ 30

4 Warranty 1. Warranty does not cover damages or failures that arised from misuse of the product, in- ability to use the product, unauthorized replacement or alteration of components and prod- uct specifications. 2. The warranty is void if the product has been subjected to physical abuse, improper instal- lation, modification, accidents or unauthorized repair of the product. 3. Unless otherwise instructed in this user’s manual, the user may not, under any circum- stances, attempt to perform service, adjustments or repairs on the product, whether in or out of warranty. It must be returned to the purchase point, factory or authorized service agency for all such work. 4. We will not be liable for any indirect, special, incidental or consequential damages to the product that has been modified or altered. Static Electricity Precautions It is quite easy to inadvertently damage your PC, system board, components or devices even before installing them in your system unit. Static electrical discharge can damage computer components without causing any signs of physical damage. You must take extra care in han- dling them to ensure against electrostatic build-up. 1. To prevent electrostatic build-up, leave the system board in its anti-static bag until you are ready to install it. 2. Wear an antistatic wrist strap. 3. Do all preparation work on a static-free surface. 4. Hold the device only by its edges. Be careful not to touch any of the components, contacts or connections. 5. Avoid touching the pins or contacts on all modules and connectors. Hold modules or con- nectors by their ends. Safety Measures To avoid damage to the system: • Use the correct AC input voltage range. To reduce the risk of electric shock: • Unplug the power cord before removing the system chassis cover for installation or servic- ing. After installation or servicing, cover the system chassis before plugging the power cord. Important: Electrostatic discharge (ESD) can damage your processor, disk drive and other com- ponents. Perform the upgrade instruction procedures described at an ESD worksta- tion only. If such a station is not available, you can provide some ESD protection by wearing an antistatic wrist strap and attaching it to a metal part of the system chas- sis. If a wrist strap is unavailable, establish and maintain contact with the system chassis throughout any procedures requiring ESD protection.

5 About the Package The package contains the following items. If any of these items are missing or damaged, please contact your dealer or sales representative for assistance. • One DV970 board • One Cooler (Height: TBD) Optional Items • COM333-I carrier board kit • Heat spreader (Height: 11mm) The board and accessories in the package may not come similar to the information listed above. This may differ in accordance with the sales region or models in which it was sold. For more information about the standard package in your region, please contact your dealer or sales representative. Before Using the System Board Before using the system board, prepare basic system components. If you are installing the system board in a new system, you will need at least the following internal components. • Memory module • Storage devices such as hard disk drive, etc. You will also need external system peripherals you intend to use which will normally include at least a keyboard, a mouse and a video display monitor.

6 Chapter 1 - Introduction Specifications Chapter 1 SYSTEM Processor Intel Atom® Processor C3000 Series, BGA1310 Intel Atom® C3958 Processor, 16 Cores, 16M Cache, 2.0GHz, 31W Intel Atom® C3808 Processor, 12 Cores, 12M Cache, 2.0GHz, 25W Intel Atom® C3708 Processor, 8 Cores, 16M Cache, 1.7GHz, 17W Memory Two 260-pin ECC SODIMM up to 32GB Dual Channel DDR4 2400MHz (Memory max speed depends on CPU SKU) BIOS Insyde SPI 128Mbit EXPANSION Interface 000G/200G/300G: B1: 2 x PCIe x2 or 2 x PCIe x1 (Gen 3) B2: 1 x PCIe x2 (Gen 3) + 1 x PCIe x1 (Gen 2) or 2 x PCIe x1 (Lane 8 Gen 3, Lane 12 Gen 2) B3: 1 x PCIe x8 or 2 x PCIe x4 or 4 x PCIe x2 or 4 x PCIe x1 (Gen 3) 100G: B1: 1 x PCIe x8 or 2 x PCIe x4 or 4 x PCIe x2 or 4 x PCIe x1 (Gen 3) B3: 2 x PCIe x2 or 2 x PCIe x1 (Gen 3) B4: 2 x PCIe x2 or 2 x PCIe x1 (Gen 3) 1 x LPC 1 x I2C 1 x SMBus 2 x UART (TX/RX) ETHERNET Controller PHY for X557 or CS4227/CS4223 and Controller for Intel® I210AT/ Intel® I210IT 2 x Independent 10GbE Media Access Controller (Sku dependent) Supports up to Two 10GBASE-KR Interfaces and Max up to Four 10GbE MAC Ports Supports Intel® X557-AT/AT2/AT4 10GbE PHY Supports Inphi CS4227 (2 port)/CS4223 (4 port) (maximum bandwidth is 20Gb when 4 ports of 10G interface active at the same time) 1 x Intel® I210AT (10/100/1000Mbps) (normal temp.) or 1 x Intel® I210IT (10/100/1000Mbps) (wide temp.) I/O USB 2 x USB 3.0 4 x USB 2.0 SATA 2 x SATA 3.0 (up to 6Gb/s) RAID 0/1/10 DIO 1 x 8-bit DIO (4 in, 4 out) WATCHDOG TIMER Output & Interval System Reset, Programmable via Software from 15 to 255 Seconds SECURITY TPM Available Upon Request POWER Type 12V, 5VSB, VCC_RTC (ATX mode) 12V, VCC_RTC (AT mode) Consumption TBD OS SUPPORT Windows Server 2012 Windows Server 2016 Yocto Project v1.8/v2.0 ENVIRONMENT Temperature Operating: 0 to 60°C or -20 to 70°C Storage: -40 to 85°C Humidity Operating: 5 to 90% RH Storage: 5 to 90% RH MTBF TBD Mechanical Dimensions COM Express® Basic 95mm (3.74") x 125mm (4.9") Compliance PICMG COM Express® R3.0, Type 7

7 Chapter 1 Features • Watchdog Timer The Watchdog Timer function allows your application to regularly “clear” the system at the set time interval. If the system hangs or fails to function, it will reset at the set time interval so that your system will continue to operate. • DDR4 DDR4 delivers increased system bandwidth and improves performance. The advantages of DDR4 provide an extended battery life and improve the performance at a lower power than DDR3/DDR2. • Serial ATA Serial ATA is a storage interface that is compliant with SATA 1.0a specification. With speed of up to 6Gb/s (SATA 3.0), it improves hard drive performance faster than the standard paral- lel ATA whose data transfer rate is 100MB/s. However, the bandwidth of the SATA 3.0 will be limited by carrier board design. • Gigabit LAN The Intel® I210AT or I210IT Gigabit LAN PHY controller features up to 1Gbps data transmis- sion with support for Intel® Active Management Technology. It provides remote maintenance and manageability for networked computing assets in an enterprise environment. • USB The system board supports the new USB 3.0. It is capable of running at a maximum trans- mission speed of up to 5 Gbit/s (625 MB/s) and is faster than USB 2.0 (480 Mbit/s, or 60 MB/s) and USB 1.1 (12Mb/s). USB 3.0 reduces the time required for data transmission and is backward compatible with USB 2.0. It is a marked improvement in device transfer speeds between your computer and a wide range of simultaneously accessible external Plug and Play peripherals.

8 Chapter 2 Chapter 2 - Concept COM Express Module Standards The figure below shows the dimensions of the different types of COM Express modules. DV970 is a COM Express Basic module. Its dimension is 95mm x 125mm. 106.00 91.00 70.00 51.00 4.00 18.00 6.00 0.00 16.50 4.00 0.00 Extended Basic Compact Mini 74.20 80.00 91.00 121.00 151.00 Common for all Form Factors Extended only Basic only Compact only Compact and Basic only Mini only

9 Chapter 2 Specification Comparison Table • 5 Indicates 12V-tolerant features on former VCC_12V signals. • 6 Cells in the connected columns spanning rows provide a rough approximation of features sharing connector pins. The table below shows the COM Express standard specifications and the corresponding specifications supported on the DV970 module. Connector Feature COM Express Module Base Specification Type 7 Min / Max DFI DV970 Type 7 (000G/200G/300G) DFI DV970 Type 7 (100G) A-B PCI Express Lanes 0 - 5 6 / 6 4 6 A-B , C-D PCI Express Lanes 6 - 15 0 / 10 3 2 C-D PCI Express Lanes 16 - 31 0 / 16 8 8 C-D PCI Express Graphics (PEG) NA NA NA C-D 10G LAN Ports 0 - 3 0 / 4 4 4 A-B NC-SI 0 / 1 1 0 A-B 1Gb LAN Port 0 1 / 1 1 0 A-B DDI 0 NA NA NA A-B DDIs 1 - 3 NA NA NA A-B LVDS Channel A NA NA NA A-B LVDS Channel B NA NA NA A-B eDP on LVDS CH A pins NA NA NA A-B VGA Port NA NA NA A-B Serial Ports 1 - 2 0 / 2 2 2 A-B CAN interface on SER1 0 / 1 0 0 A-B SATA Ports 0 / 2 2 2 A-B HDA Digital Interface NA NA NA A-B USB 2.0 Ports 4 / 4 4 4 A-B USB0 Client 0 / 1 0 0 A-B USB7 Client NA NA NA C-D USB 3.0 Ports 0 / 4 2 2 A-B LPC Bus or eSPI 1 / 1 1 LPC 1 LPC A-B SPI (Devices) 1 / 2 1 1 C-D Rapid Shutdown 0 / 1 0 0 A-B6 SDIO (muxed on GPIO) 0 / 1 0 0 A-B General Purpose I/O 8 / 8 8 8 A-B SMBus 1 / 1 1 1 A-B I2C 1 / 1 1 1 A-B Watchdog Timer 0 / 1 1 1 A-B Speaker Out 1 / 1 1 1 A-B Carrier Board BIOS Flash Support 0 / 1 1 1 A-B Reset Functions 1 / 1 1 1 A-B Trusted Platform Module 0 / 1 1 1 A-B Thermal Protection 0 / 1 1 1 A-B Battery Low Alarm 0 / 1 1 1 A-B Suspend/Wake Signals 0 / 3 2 2 A-B Power Button Support 1 / 1 1 1 A-B Power Good 1 / 1 1 1 A-B VCC_5V_SBY Contacts 4 / 4 4 4 A-B5 Sleep Input 0 / 1 1 1 A-B5 Lid Input 0 / 1 1 1 A-B5 Carrier Board Fan Control 0 / 1 1 1 A-B , C-D VCC_12V Contacts 24 / 24 24 24 System Management Power Management Power System I/O Type 7 Based on Type 6. Modules trades all audio and video interfaces, 2 SATA ports and four USB 2.0 for additional PCI Express lanes, four 10 Gb Ethernet ports and an NC-SI management interface for the GbE port. Features C3958 C3808 C3708 Thermal Design Power (TDP) (Watts) 31 25 17 Number of 64-bit Intel Atom® Microarchitecture Goldmont Cores 16 12 8 Processor Base Frequency (GHz) 2 2 1.7 Total SoC L2 Cache (MB) 16 12 16 Max. Number of Memory Channels Available 2 Max. DDR4 (1.2V) Memory Data Rate Supported (MT/s) 2400 2133 Number of High-Speed I/O (HSIO) Lanes Shared between PCIe, SATA, and USB 3.0 20 HSIO Lane Numbers (0 through 19) Available Lanes 0-19 Max. Number of PCI Express (8.0/5.0/2.5 GT/s) Lanes 16 via HSIO Lanes from Lanes 0-15 Max. Number of SATA (6.0/3.0/1.5 Gbps) Lanes 16 via HSIO Lanes from Lanes 4-19 Max. Number of Sets of USB 3.0 Signals (SSTX+/SSTX- SSRX+/SSRX-) 4 via HSIO Lanes from Lanes 16-19 Number of Sets of USB 2.0 Signals (DATA+/DATA-) 4 LAN Controller 0 (Gb/s)* 10/2.5/1 LAN Controller 1 (Gb/s)* 10/2.5/1 * Each LAN controller must run the same LEK. Note: Different SKUs may require different BIOS.

10 Chapter 2 DV970 PCIe Lanes Routing Table ������ ��������� ����������� ����������� ������� ������ ����������� ������� ������ ����������� ����������� ������� ������ ����������� ������� ������ ����������� ������ ������ ������� ������� �������� ������ ����������� ������� ������� ������� ������� ����������� ����������� �������� ������� ����������� ������� ������� ����������� ����������� �������� ������� ����������� ������� ������� ����������� �������� ������� ������� ������� ����������� �������� ������� ������� ������� �������� ������� �������� ������� ������� �������� ������� �������� ������� ������� ������� ������� �������� ������� �������� ������� �������� �������� ������� �������� ������� �������� �� ���� ���� ����� ���� ���� �������� �������� �������� �������� ���� ������� ������� ������� ������� ���������������������������� ������������� �� �������� �� �������� �������� ��������� �� ��������� �� �������� �� �������� ������������ �������� �������� �� �������� �� �������� �� �������� �������� ���������� ���� ���� ������������ �������� ������������� ������������������ �������� ���������� �������� ���������� ������������ �������� �������� ������������ �������� �������� �� ��������� �� �� �������� �������� �������� ������������ �� �� �������� �������� �������� ������������ �� �������� �� �������� �������������������� �� �������� ����� ������ ��������� ����� ���������������� ��������� ���� ���� ���� �� ������������ ���� ���� ����

11 Chapter 3 Chapter 3 - Hardware Installation Board Layout Top View Bottom View DDR4_1 SODIMM DDR4_2 SODIMM 1 CPU fan Intel I210AT or I210IT Standby Power LED SPI Flash BIOS TPM (optional) Intel Atom C3000 Series P17C9X2G 304SL C A A A A 5 1 COM Express Connector C1 D1 C110 D110 B1 B110 A1 A110 COM Express Connector iTE IT8528E

12 Chapter 3 System Memory DDR4_2 Standby Power LED DDR4_1 Important: Electrostatic discharge (ESD) can damage your board, processor, disk drives, add-in boards, and other components. Perform installation procedures at an ESD workstation only. If such a station is not available, you can provide some ESD protection by wear- ing an antistatic wrist strap and attaching it to a metal part of the system chassis. If a wrist strap is unavailable, establish and maintain contact with the system chassis throughout any procedures requiring ESD protection. Important: When the Standby Power LED is red, it indicates that there is power on the board. Power off the PC then unplug the power cord prior to installing any devices. Failure to do so will cause severe damage to the board and components. Installing the DIMM Module 1. Make sure the PC and all other peripheral devices connected to it has been powered down. 2. Disconnect all power cords and cables. 3. Locate the SODIMM socket on the system board. 4. Note the key on the socket. The key ensures that the module can be plugged into the socket in only one direction. Note: The system board used in the following illustrations may not resemble the actual one. These illustrations are for reference only.

13 Chapter 3 Connectors CPU Fan Connector Connect the CPU fan’s cable connector to the CPU fan connector on the board. The cooling fan will provide adequate airflow throughout the chassis to prevent overheating the CPU and board components. 3 1 Sense +12V Ground 6. Push down the module until the clips at each end of the socket lock into position. You will hear a distinctive “click”, indicating the module is correctly locked into position. Clip Clip 5. Grasping the module by its edges, align the module into the socket at an approximately 30 degrees angle. Apply firm even pressure to each end of the module until it slips down into the socket. The contact fingers on the edge of the module will almost completely disappear inside the socket.

14 Chapter 3 COM Express Connectors The COM Express connectors are used to interface the DV970 COM Express board to a carrier board. Connect the COM Express connectors (located on the solder side of the board) to the COM Express connectors on the carrier board. COM Express Connectors Refer to the following pages for the pin functions of these connectors. C A A A A 5 1

15 Chapter 3 COM Express Connectors-Continued A1 GND (FIXED) B1 GND (FIXED) A56 PCIE_TX4- B56 PCIE_RX4- A2 GBE0_MDI3- B2 GBE0_ACT# A57 GND B57 GPO2 A3 GBE0_MDI3+ B3 LPC_FRAME# / ESPI_CS0#* A58 PCIE_TX3+ B58 PCIE_RX3+ A4 GBE0_LINK100# B4 LPC_AD0 / ESPI_IO_0* A59 PCIE_TX3- B59 PCIE_RX3- A5 GBE0_LINK1000# B5 LPC_AD1 / ESPI_IO_1* A60 GND (FIXED) B60 GND (FIXED) A6 GBE0_MDI2- B6 LPC_AD2 / ESPI_IO_2* A61 PCIE_TX2+ B61 PCIE_RX2+ A7 GBE0_MDI2+ B7 LPC_AD3 / ESPI_IO_3* A62 PCIE_TX2- B62 PCIE_RX2- A8 GBE0_LINK# B8 LPC_DRQ0# / ESPI_ALERT0#* A63 GPI1 B63 GPO3 A9 GBE0_MDI1- B9 LPC_DRQ1# / ESPI_ALERT1#* A64 PCIE_TX1+ B64 PCIE_RX1+ A10 GBE0_MDI1+ B10 LPC_CLK / ESPI_CK* A65 PCIE_TX1- B65 PCIE_RX1- A11 GND (FIXED) B11 GND (FIXED) A66 GND B66 WAKE0# A12 GBE0_MDI0- B12 PWRBTN# A67 GPI2 B67 WAKE1# A13 GBE0_MDI0+ B13 SMB_CK A68 PCIE_TX0+ B68 PCIE_RX0+ A14 GBE0_CTREF B14 SMB_DAT A69 PCIE_TX0- B69 PCIE_RX0- A15 SUS_S3# B15 SMB_ALERT# A70 GND (FIXED) B70 GND (FIXED) A16 SATA0_TX+ B16 SATA1_TX+ A71 PCIE_TX8+ B71 PCIE_RX8+ A17 SATA0_TX- B17 SATA1_TX- A72 PCIE_TX8- B72 PCIE_RX8- A18 SUS_S4# B18 SUS_STAT# / ESPI_RESET#* A73 GND B73 GND A19 SATA0_RX+ B19 SATA1_RX+ A74 PCIE_TX9+ B74 PCIE_RX9+ A20 SATA0_RX- B20 SATA1_RX- A75 PCIE_TX9- B75 PCIE_RX9- A21 GND (FIXED) B21 GND (FIXED) A76 GND B76 GND A22 N.C. B22 N.C. A77 N.C. B77 N.C. A23 N.C. B23 N.C. A78 N.C. B78 N.C. A24 SUS_S5# B24 PWR_OK A79 GND B79 GND A25 N.C. B25 N.C. A80 GND (FIXED) B80 GND (FIXED) A26 N.C. B26 N.C. A81 N.C. B81 N.C. A27 BATLOW# B27 WDT A82 N.C. B82 N.C. A28 (S)ATA_ACT# B28 RSVD A83 GND B83 GND A29 RSVD B29 RSVD A84 NCSI_TX_EN B84 VCC_5V_SBY A30 RSVD B30 RSVD A85 GPI3 B85 VCC_5V_SBY A31 GND (FIXED) B31 GND (FIXED) A86 RSVD B86 VCC_5V_SBY A32 RSVD B32 SPKR A87 RSVD B87 VCC_5V_SBY A33 RSVD B33 I2C_CK A88 PCIE_CK_REF+ B88 BIOS_DIS1# A34 BIOS_DIS0# / ESPI_SAFS* B34 I2C_DAT A89 PCIE_CK_REF- B89 NCSI_RX_ER A35 THRMTRIP# B35 THRM# A90 GND (FIXED) B90 GND (FIXED) A36 N.C. B36 N.C. A91 SPI_POWER B91 NCSI_CLK_IN A37 N.C. B37 N.C. A92 SPI_MISO B92 NCSI_RXD1 A38 GND B38 GND A93 GPO0 B93 NCSI_RXD0 A39 PCIE_TX12+ B39 PCIE_RX12+ A94 SPI_CLK B94 NCSI_CRS_DV A40 PCIE_TX12- B40 PCIE_RX12- A95 SPI_MOSI B95 NCSI_TXD1 A41 GND (FIXED) B41 GND (FIXED) A96 TPM_PP B96 NCSI_TXD0 A42 USB2- B42 USB3- A97 N.C. B97 SPI_CS# A43 USB2+ B43 USB3+ A98 SER0_TX B98 NCSI_ARB_IN A44 USB_2_3_OC# B44 USB_0_1_OC# A99 SER0_RX B99 NCSI_ARB_OUT A45 USB0- B45 USB1- A100 GND (FIXED) B100 GND (FIXED) A46 USB0+ B46 USB1+ A101 SER1_TX B101 FAN_PWMOUT A47 VCC_RTC B47 ESPI_EN#* A102 SER1_RX B102 FAN_TACHIN A48 RSVD B48 N.C. A103 LID# B103 SLEEP# A49 GBE0_SDP B49 SYS_RESET# A104 VCC_12V B104 VCC_12V A50 LPC_SERIRQ / ESPI_CS1#* B50 CB_RESET# A105 VCC_12V B105 VCC_12V A51 GND (FIXED) B51 GND (FIXED) A106 VCC_12V B106 VCC_12V A52 PCIE_TX5+ B52 PCIE_RX5+ A107 VCC_12V B107 VCC_12V A53 PCIE_TX5- B53 PCIE_RX5- A108 VCC_12V B108 VCC_12V A54 GPI0 B54 GPO1 A109 VCC_12V B109 VCC_12V A55 PCIE_TX4+ B55 PCIE_RX4+ A110 GND (FIXED) B110 GND (FIXED) * : DV970 only supports LPC interface, no eSPI mode interface. Row A Row B Row A Row B

16 Chapter 3 C1 GND (FIXED) D1 GND (FIXED) C56 PCIE_RX17- D56 PCIE_TX17- C2 GND D2 GND C57 N.C. D57 TYPE2# C3 USB_SSRX0- D3 USB_SSTX0- C58 PCIE_RX18+ D58 PCIE_TX18+ C4 USB_SSRX0+ D4 USB_SSTX0+ C59 PCIE_RX18- D59 PCIE_TX18- C5 GND D5 GND C60 GND (FIXED) D60 GND (FIXED) C6 USB_SSRX1- D6 USB_SSTX1- C61 PCIE_RX19+ D61 PCIE_TX19+ C7 USB_SSRX1+ D7 USB_SSTX1+ C62 PCIE_RX19- D62 PCIE_TX19- C8 GND D8 GND C63 RSVD D63 RSVD C9 N.C. D9 N.C. C64 RSVD D64 RSVD C10 N.C. D10 N.C. C65 PCIE_RX20+ D65 PCIE_TX20+ C11 GND (FIXED) D11 GND (FIXED) C66 PCIE_RX20- D66 PCIE_TX20- C12 N.C. D12 N.C. C67 RAPID_SHUTDOWN D67 GND C13 N.C. D13 N.C. C68 PCIE_RX21+ D68 PCIE_TX21+ C14 GND D14 GND C69 PCIE_RX21- D69 PCIE_TX21- C15 10G_PHY_MDC_SCL3 D15 10G_PHY_MDIO_SDA3 C70 GND (FIXED) D70 GND (FIXED) C16 10G_PHY_MDC_SCL2 D16 10G_PHY_MDIO_SDA2 C71 PCIE_RX22+ D71 PCIE_TX22+ C17 10G_SDP2 D17 10G_SDP3 C72 PCIE_RX22- D72 PCIE_TX22- C18 GND D18 GND C73 GND D73 GND C19 PCIE_RX6+ D19 PCIE_TX6+ C74 PCIE_RX23+ D74 PCIE_TX23+ C20 PCIE_RX6- D20 PCIE_TX6- C75 PCIE_RX23- D75 PCIE_TX23- C21 GND (FIXED) D21 GND (FIXED) C76 GND D76 GND C22 PCIE_RX7+ D22 PCIE_TX7+ C77 RSVD D77 RSVD C23 PCIE_RX7- D23 PCIE_TX7- C78 PCIE_RX24+ D78 PCIE_TX24+ C24 10G_INT2 D24 10G_INT3 C79 PCIE_RX24- D79 PCIE_TX24- C25 GND D25 GND C80 GND (FIXED) D80 GND (FIXED) C26 10G_KR_RX3+ D26 10G_KR_TX3+ C81 PCIE_RX25+ D81 PCIE_TX25+ C27 10G_KR_RX3- D27 10G_KR_TX3- C82 PCIE_RX25- D82 PCIE_TX25- C28 GND D28 GND C83 RSVD D83 RSVD C29 10G_KR_RX2+ D29 10G_KR_TX2+ C84 GND D84 GND C30 10G_KR_RX2- D30 10G_KR_TX2- C85 N.C. D85 N.C. C31 GND (FIXED) D31 GND (FIXED) C86 N.C. D86 N.C. C32 10G_SFP_SDA3 D32 10G_SFP_SCL3 C87 GND D87 GND C33 10G_SFP_SDA2 D33 10G_SFP_SCL2 C88 N.C. D88 N.C. C34 10G_PHY_RST_23 D34 10G_PHY_CAP_23 C89 N.C. D89 N.C. C35 10G_PHY_RST_01 D35 10G_PHY_CAP_01 C90 GND (FIXED) D90 GND (FIXED) C36 10G_LED_SDA D36 RSVD C91 PCIE_RX28+ D91 PCIE_TX28+ C37 10G_LED_SCL D37 RSVD C92 PCIE_RX28- D92 PCIE_TX28- C38 10G_SFP_SDA1 D38 10G_SFP_SCL1 C93 GND D93 GND C39 10G_SFP_SDA0 D39 10G_SFP_SCL0 C94 PCIE_RX29+ D94 PCIE_TX29+ C40 10G_SDP0 D40 10G_SDP1 C95 PCIE_RX29- D95 PCIE_TX29- C41 GND (FIXED) D41 GND (FIXED) C96 GND D96 GND C42 10G_KR_RX1+ D42 10G_KR_TX1+ C97 RSVD D97 RSVD C43 10G_KR_RX1- D43 10G_KR_TX1- C98 N.C. D98 N.C. C44 GND D44 GND C99 N.C. D99 N.C. C45 10G_PHY_MDC_SCL1 D45 10G_PHY_MDIO_SDA1 C100 GND (FIXED) D100 GND (FIXED) C46 10G_PHY_MDC_SCL0 D46 10G_PHY_MDIO_SDA0 C101 N.C. D101 N.C. C47 10G_INT0 D47 10G_INT1 C102 N.C. D102 N.C. C48 GND D48 GND C103 GND D103 GND C49 10G_KR_RX0+ D49 10G_KR_TX0+ C104 VCC_12V D104 VCC_12V C50 10G_KR_RX0- D50 10G_KR_TX0- C105 VCC_12V D105 VCC_12V C51 GND (FIXED) D51 GND (FIXED) C106 VCC_12V D106 VCC_12V C52 PCIE_RX16+ D52 PCIE_TX16+ C107 VCC_12V D107 VCC_12V C53 PCIE_RX16- D53 PCIE_TX16- C108 VCC_12V D108 VCC_12V C54 TYPE0# D54 RSVD C109 VCC_12V D109 VCC_12V C55 PCIE_RX17+ D55 PCIE_TX17+ C110 GND (FIXED) D110 GND (FIXED) Row C Row D Row C Row D

17 Chapter 3 COM Express Connectors Signals and Descriptions Signal Pin# Pin Type Pwr Rail /Tolerance COMe SPEC PU/PD DV970 PU/PD Module Base Specification R3.0 GBE0_MDI0+ A13 I/O Analog 3.3V max Suspend GBE0_MDI0- A12 I/O Analog 3.3V max Suspend GBE0_MDI1+ A10 I/O Analog 3.3V max Suspend GBE0_MDI1- A9 I/O Analog 3.3V max Suspend GBE0_MDI2+ A7 I/O Analog 3.3V max Suspend GBE0_MDI2- A6 I/O Analog 3.3V max Suspend GBE0_MDI3+ A3 I/O Analog 3.3V max Suspend GBE0_MDI3- A2 I/O Analog 3.3V max Suspend GBE0_ACT# B2 OD CMOS 3.3V Suspend/3.3V Gigabit Ethernet Controller 0 activity indicator, active low. GBE0_LINK# A8 OD CMOS 3.3V Suspend/3.3V Gigabit Ethernet Controller 0 link indicator, active low. GBE0_LINK100# A4 OD CMOS 3.3V Suspend/3.3V Gigabit Ethernet Controller 0 100 Mbit / sec link indicator, active low. GBE0_LINK1000# A5 OD CMOS 3.3V Suspend/3.3V Gigabit Ethernet Controller 0 1000 Mbit / sec link indicator, active low. GBE0_CTREF A14 REF GND min, 3.3V max N.C. Reference voltage for Carrier Board Ethernet channel 0 magnetics center tap. The reference voltage is determined by the requirements of the Module PHY and may be as low as 0V and as high as 3.3V. The reference voltage output shall be current limited on the Module. In the case in which the reference is shorted to ground, the current shall be limited to 250 mA or less. GBE0_SDP A49 I/O 3.3V Suspend/3.3V RSVD PU 10K� Gigabit Ethernet Controller 0 Software-Definable Pin. Can also be used for IEEE1588 support such as a 1pps signal. Signal Pin# Pin Type Pwr Rail /Tolerance COMe SPEC PU/PD DV970 PU/PD Module Base Specification R3.0 NCSI_CLK_IN B91 I CMOS 3.3V Suspend/3.3V PD 10K� PD 10K� to GND NC-SI Clock reference for receive, transmit, and control interface. NCSI_RXD0 B93 O CMOS 3.3V Suspend/3.3V PD 3K� to GND NC-SI Receive Data (from NC to BMC). NCSI_RXD1 B92 O CMOS 3.3V Suspend/3.3V PD 3K� to GND NC-SI Receive Data (from NC to BMC). NCSI_TXD0 B96 I CMOS 3.3V Suspend/3.3V PD 10K� PD 10K� to GND NC-SI Transmit Data (from BMC to NC). NCSI_TXD1 B95 I CMOS 3.3V Suspend/3.3V PD 10K� PD 10K� to GND NC-SI Transmit Data (from BMC to NC). NCSI_CRS_DV B94 O CMOS 3.3V Suspend/3.3V PD 10K� to GND NC-SI Carrier Sense/Receive Data Valid to MC, indicating that the transmitted data from NC to BMC is valid. NCSI_TX_EN A84 I CMOS 3.3V Suspend/3.3V PD 10K� PD 10K� to GND NC-SI Transmit enable. NCSI_RX_ER B89 O CMOS 3.3V Suspend/3.3V RSVD PU 10K� to 3.3V Suspend NC-SI Receive error. NCSI_ARB_IN B98 I CMOS 3.3V Suspend/3.3V PU 10K� to 3.3V Suspend RSVD PU 4.7K� to 3.3V Suspend (IPD 20K�) NC-SI hardware arbitration input. NCSI_ARB_OUT B99 O CMOS 3.3V Suspend/3.3V NC-SI hardware arbitration output. NC-SI Signals Descriptions Pin Types I Input to the Module O Output from the Module I/O Bi-directional input / output signal OD Open drain output RSVD pins are reserved for future use and should be no connect. Do not tie the RSVD pins together. Power Inputs used for power delivery to the Module electronics. KR 10GBASE-KR compatible signal. Gigabit Ethernet Signals Descriptions Gigabit Ethernet Controller 0: Media Dependent Interface Differential Pairs 0,1,2,3. The MDI can operate in 1000, 100 and 10 Mbit / sec modes. Some pairs are unused in some modes, per the following: 1000BASE-T 100BASE-TX 10BASE-T MDI[0]+/- B1_DA+/- TX+/- TX+/- MDI[1]+/- B1_DB+/- RX+/- RX+/- MDI[2]+/- B1_DC+/- MDI[3]+/- B1_DD+/-

18 Chapter 3 Signal Pin# Pin Type Pwr Rail /Tolerance COMe SPEC PU/PD DV970 PU/PD Module Base Specification R3.0 10G_KR_TX0+ D49 O KR AC coupled at receiver 10GBASE-KR ports, transmit output differential pairs. See section ‘AC Coupling of 10G_KR_TX Signals‘ below for details on AC coupling 10G_KR_TX0- D50 O KR AC coupled at receiver 10GBASE-KR ports, transmit output differential pairs. See section ‘AC Coupling of 10G_KR_TX Signals‘ below for details on AC coupling 10G_KR_TX1+ D42 O KR AC coupled at receiver 10GBASE-KR ports, transmit output differential pairs. See section ‘AC Coupling of 10G_KR_TX Signals‘ below for details on AC coupling 10G_KR_TX1- D43 O KR AC coupled at receiver 10GBASE-KR ports, transmit output differential pairs. See section ‘AC Coupling of 10G_KR_TX Signals‘ below for details on AC coupling 10G_KR_TX2+ D29 O KR AC coupled at receiver 10GBASE-KR ports, transmit output differential pairs. See section ‘AC Coupling of 10G_KR_TX Signals‘ below for details on AC coupling 10G_KR_TX2- D30 O KR AC coupled at receiver 10GBASE-KR ports, transmit output differential pairs. See section ‘AC Coupling of 10G_KR_TX Signals‘ below for details on AC coupling 10G_KR_TX3+ D26 O KR AC coupled at receiver 10GBASE-KR ports, transmit output differential pairs. See section ‘AC Coupling of 10G_KR_TX Signals‘ below for details on AC coupling 10G_KR_TX3- D27 O KR AC coupled at receiver 10GBASE-KR ports, transmit output differential pairs. See section ‘AC Coupling of 10G_KR_TX Signals‘ below for details on AC coupling 10G_KR_RX0+ C49 I KR AC coupled on Module AC Coupling capacitor 10GBASE-KR ports, receive input differential pairs. 10G_KR_RX0- C50 I KR AC coupled on Module AC Coupling capacitor 10GBASE-KR ports, receive input differential pairs. 10G_KR_RX1+ C42 I KR AC coupled on Module AC Coupling capacitor 10GBASE-KR ports, receive input differential pairs. 10G_KR_RX1- C43 I KR AC coupled on Module AC Coupling capacitor 10GBASE-KR ports, receive input differential pairs. 10G_KR_RX2+ C29 I KR AC coupled on Module AC Coupling capacitor 10GBASE-KR ports, receive input differential pairs. 10G_KR_RX2- C30 I KR AC coupled on Module AC Coupling capacitor 10GBASE-KR ports, receive input differential pairs. 10G_KR_RX3+ C26 I KR AC coupled on Module AC Coupling capacitor 10GBASE-KR ports, receive input differential pairs. 10G_KR_RX3- C27 I KR AC coupled on Module AC Coupling capacitor 10GBASE-KR ports, receive input differential pairs. 10G_PHY_MDIO_SDA0 D46 10G_PHY_MDIO_SDA1 D45 10G_PHY_MDIO_SDA2 D16 10G_PHY_MDIO_SDA3 D15 10G_PHY_MDC_SCL0 C46 10G_PHY_MDC_SCL1 C45 10G_PHY_MDC_SCL2 C16 10G_PHY_MDC_SCL3 C15 10G_PHY_CAP_01 D35 I CMOS 3.3V Suspend/3.3V PU 10K� to 3.3V Suspend PU 100K� to 3.3V Suspend Phy mode capability pin: Indicates if the PHY for 10G lanes 0 and 1 is capable of configuration by I²C. High indicates MDIO-only configuration, and low indicates configuration capability via I²C or MDIO. The actual protocol used for PHY configuration is determined by the module, in part based on this input. The actual protocol used is indicated over the dedicated I²C interface 10G_PHY_CAP_23 D34 I CMOS 3.3V Suspend/3.3V PU 10K� to 3.3V Suspend PU 100K� to 3.3V Suspend Phy mode capability pin: Indicates if the PHY for 10G lanes 2 and 3 is capable of configuration by I²C. High indicates MDIO-only configuration, and low indicates configurationcapability via I²C or MDIO. The actual protocol used for PHY configuration is determined by the module, in part based on this input. The actual protocol used is indicated over the dedicated I²C interface 10G_SFP_SDA0 C39 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K� to 3.3V Suspend IPU 5K�, RSV PU 4.7K� to 3.3V Suspend I2C data signal of the 2-wire management interface used by the 10GbE controller to access the management registers of an external Optical SFP Module. 10G_SFP_SDA1 C38 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K� to 3.3V Suspend IPU 5K�, RSV PU 4.7K� to 3.3V Suspend I2C data signal of the 2-wire management interface used by the 10GbE controller to access the management registers of an external Optical SFP Module. MDIO: PU 2.2K� to 3.3V Suspend MDC : PU 2.2K� to 3.3V Suspend 10Gb Ethernet Signals Descriptions MDIO Mode: Management Data I/O interface mode data signal for serial data transfers between the MAC and an external PHY. I2C Mode: I2C data signal, of the 2-wire management interface used for serial data transfers between the MAC and an external PHY. 3.3V Suspend/3.3V O CMOS I/O OD CMOS PU 2.2K� to 3.3V Suspend MDIO Mode: Management Data I/O Interface mode clock signal for serial data transfers between the MAC and an external PHY. I2C Mode: I2C Clock signal, of the 2-wire management interface used for serial data transfers between the MAC and an external PHY. O CMOS I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K� to 3.3V Suspend

19 Chapter 3 10G_SFP_SDA2 C33 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K� to 3.3V Suspend PU 4.7K� to 3.3V Suspend I2C data signal of the 2-wire management interface used by the 10GbE controller to access the management registers of an external Optical SFP Module. 10G_SFP_SDA3 C32 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K� to 3.3V Suspend PU 4.7K� to 3.3V Suspend I2C data signal of the 2-wire management interface used by the 10GbE controller to access the management registers of an external Optical SFP Module. 10G_SFP_SCL0 D39 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K� to 3.3V Suspend IPU 5K�, RSV PU 4.7K� to 3.3V Suspend I2C clock signal of the 2-wire management interface used by the 10GbE controller to access the management registers of an external Optical SFP Module. 10G_SFP_SCL1 D38 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K� to 3.3V Suspend IPU 5K�, RSV PU 4.7K� to 3.3V Suspend I2C clock signal of the 2-wire management interface used by the 10GbE controller to access the management registers of an external Optical SFP Module. 10G_SFP_SCL2 D33 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K� to 3.3V Suspend PU 4.7K� to 3.3V Suspend I2C clock signal of the 2-wire management interface used by the 10GbE controller to access the management registers of an external Optical SFP Module. 10G_SFP_SCL3 D32 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K� to 3.3V Suspend PU 4.7K� to 3.3V Suspend I2C clock signal of the 2-wire management interface used by the 10GbE controller to access the management registers of an external Optical SFP Module. 10G_LED_SDA C36 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K� to 3.3V Suspend PU 4.7K� to 3.3V Suspend I2C Data of the 2-wire interface that transfers LED signals and PHY straps for I2C or MDIO operation of optical PHYs. Refer to the details in I2C Data Mapping to Carrier Board Based PCA9539 I/O Expander. 10G_LED_SCL C37 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K� to 3.3V Suspend PU 4.7K� to 3.3V Suspend I2C Clock of the 2-wire interface that transfers LED and strap signals for I2C or MDIO operation of optical PHYs. 10G_INT0 C47 I CMOS 3.3V Suspend/3.3V PU 2.2K� to 3.3V Suspend PU 2.2K� to 3.3V Suspend Interrupt pin from copper PHY or optical SFP Module to the 10GbE controller. 10G_INT1 D47 I CMOS 3.3V Suspend/3.3V PU 2.2K� to 3.3V Suspend PU 2.2K� to 3.3V Suspend Interrupt pin from copper PHY or optical SFP Module to the 10GbE controller. 10G_INT2 C24 I CMOS 3.3V Suspend/3.3V PU 2.2K� to 3.3V Suspend PU 2.2K� to 3.3V Suspend Interrupt pin from copper PHY or optical SFP Module to the 10GbE controller. 10G_INT3 D24 I CMOS 3.3V Suspend/3.3V PU 2.2K� to 3.3V Suspend PU 2.2K� to 3.3V Suspend Interrupt pin from copper PHY or optical SFP Module to the 10GbE controller. 10G_SDP0 C40 I/O CMOS 3.3V Suspend/3.3V Software-Definable Pins. Can also be used for IEEE1588 support such as a 1pps signal. 10G_SDP1 D40 I/O CMOS 3.3V Suspend/3.3V Software-Definable Pins. Can also be used for IEEE1588 support such as a 1pps signal. 10G_SDP2 C17 I/O CMOS 3.3V Suspend/3.3V Software-Definable Pins. Can also be used for IEEE1588 support such as a 1pps signal. 10G_SDP3 D17 I/O CMOS 3.3V Suspend/3.3V Software-Definable Pins. Can also be used for IEEE1588 support such as a 1pps signal. 10G_PHY_RST_01 C35 O CMOS 3.3V Suspend/3.3V PU 10K� to 3.3V Suspend Output signal that resets an optical PHY on port 0 and port1 (with copper PHY this signal is not used). 10G_PHY_RST_23 C34 O CMOS 3.3V Suspend/3.3V PU 10K� to 3.3V Suspend Output signal that resets an Optical PHY on port 2 and port 3 (with Copper PHY this signal is not used). Signal Pin# Pin Type Pwr Rail /Tolerance COMe SPEC PU/PD DV970 PU/PD Module Base Specification R3.0 SATA0_TX+ A16 O SATA AC coupled on Module AC Coupling capacitor SATA0_TX- A17 O SATA AC coupled on Module AC Coupling capacitor SATA0_RX+ A19 I SATA AC coupled on Module AC Coupling capacitor SATA0_RX- A20 I SATA AC coupled on Module AC Coupling capacitor SATA1_TX+ B16 O SATA AC coupled on Module AC Coupling capacitor SATA1_TX- B17 O SATA AC coupled on Module AC Coupling capacitor SATA1_RX+ B19 I SATA AC coupled on Module AC Coupling capacitor SATA1_RX- B20 I SATA AC coupled on Module AC Coupling capacitor Serial ATA Channel 1 receive differential pair. SATA Signals Descriptions Serial ATA Channel 0 transmit differential pair. Serial ATA Channel 0 receive differential pair. Serial ATA Channel 1 transmit differential pair.

20 Chapter 3 (S)ATA_ACT# A28 I/O CMOS 3.3V / 3.3V AND Gate out, up to 3.3V Serial ATA (activity indicator), active low. Signal Pin# Pin Type Pwr Rail /Tolerance COMe SPEC PU/PD DV970 PU/PD Module Base Specification R3.0 PCIE_TX0+ A68 AC Coupling capacitor PCIE_TX0- A69 AC Coupling capacitor PCIE_RX0+ B68 PCIE_RX0- B69 PCIE_TX1+ A64 AC Coupling capacitor PCIE_TX1- A65 AC Coupling capacitor PCIE_RX1+ B64 PCIE_RX1- B65 PCIE_TX2+ A61 AC Coupling capacitor PCIE_TX2- A62 AC Coupling capacitor PCIE_RX2+ B61 PCIE_RX2- B62 PCIE_TX3+ A58 AC Coupling capacitor PCIE_TX3- A59 AC Coupling capacitor PCIE_RX3+ B58 PCIE_RX3- B59 PCIE_TX4+ A55 AC Coupling capacitor PCIE_TX4- A56 AC Coupling capacitor PCIE_RX4+ B55 PCIE_RX4- B56 PCIE_TX5+ A52 AC Coupling capacitor PCIE_TX5- A53 AC Coupling capacitor PCIE_RX5+ B52 PCIE_RX5- B53 PCIE_TX6+ D19 AC Coupling capacitor PCIE_TX6- D20 AC Coupling capacitor PCIE_RX6+ C19 PCIE_RX6- C20 PCIE_TX7+ D22 AC Coupling capacitor PCIE_TX7- D23 AC Coupling capacitor PCIE_RX7+ C22 PCIE_RX7- C23 PCIE_TX8+ A71 AC Coupling capacitor PCIE_TX8- A72 AC Coupling capacitor PCIE_RX8+ B71 PCIE_RX8- B72 PCIE_TX9+ A74 AC Coupling capacitor PCIE_TX9- A75 AC Coupling capacitor PCIE_RX9+ B74 PCIE_RX9- B75 PCIE_TX10+ A77 N.C. PCIE_TX10- A78 N.C. PCIE_RX10+ B77 N.C. PCIE_RX10- B78 N.C. I PCIE AC coupled off Module PCI Express Differential Receive Pairs 7 I PCIE AC coupled off Module PCI Express Differential Receive Pairs 6 O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 7 I PCIE AC coupled off Module PCI Express Differential Receive Pairs 8 Different connector layout for Type 7 O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 9 Different connector layout for Type 7 I PCIE AC coupled off Module PCI Express Differential Receive Pairs 9 Different connector layout for Type 7 O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 10 Different connector layout for Type 7 I PCIE AC coupled off Module PCI Express Differential Receive Pairs 5 O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 6 I PCIE AC coupled off Module PCI Express Differential Receive Pairs 4 O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 5 O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 1 I PCIE AC coupled off Module PCI Express Differential Receive Pairs 3 O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 4 I PCIE AC coupled off Module PCI Express Differential Receive Pairs 2 O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 3 O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 8 Different connector layout for Type 7 General Purpose PCI Express Lanes Signals Descriptions O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 0 I PCIE AC coupled off Module PCI Express Differential Receive Pairs 1 O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 2 I PCIE AC coupled off Module PCI Express Differential Receive Pairs 0 I PCIE AC coupled off Module PCI Express Differential Receive Pairs 10 Different connector layout for Type 7

21 Chapter 3 PCIE_TX11+ A81 N.C. PCIE_TX11- A82 N.C. PCIE_RX11+ B81 N.C. PCIE_RX11- B82 N.C. PCIE_TX12+ A39 AC Coupling capacitor PCIE_TX12- A40 AC Coupling capacitor PCIE_RX12+ B39 PCIE_RX12- B40 PCIE_TX13+ A36 N.C. PCIE_TX13- A37 N.C. PCIE_RX13+ B36 N.C. PCIE_RX13- B37 N.C. PCIE_TX14+ A25 N.C. PCIE_TX14- A26 N.C. PCIE_RX14+ B25 N.C. PCIE_RX14- B26 N.C. PCIE_TX15+ A22 N.C. PCIE_TX15- A23 N.C. PCIE_RX15+ B22 N.C. PCIE_RX15- B23 N.C. PCIE_TX16+ D52 AC Coupling capacitor PCIE_TX16- D53 AC Coupling capacitor PCIE_RX16+ C52 PCIE_RX16- C53 PCIE_TX17+ D55 AC Coupling capacitor PCIE_TX17- D56 AC Coupling capacitor PCIE_RX17+ C55 PCIE_RX17- C56 O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 11 Different connector layout for Type 7 I PCIE AC coupled off Module PCI Express Differential Receive Pairs 11 Different connector layout for Type 7 O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 12 Different connector layout for Type 7 I PCIE AC coupled off Module PCI Express Differential Receive Pairs 12 Different connector layout for Type 7 O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 13 Different connector layout for Type 7 I PCIE AC coupled off Module PCI Express Differential Receive Pairs 13 Different connector layout for Type 7 O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 14 Different connector layout for Type 7 I PCIE AC coupled off Module PCI Express Differential Receive Pairs 14 Different connector layout for Type 7 O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 15 Different connector layout for Type 7 I PCIE AC coupled off Module PCI Express Differential Receive Pairs 15 Different connector layout for Type 7 O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 16 These are the same lines as Type 7 PEG_TX0± I PCIE AC coupled off Module PCI Express Differential Receive Pairs 16 These are the same lines as Type 7 PEG_RX0± O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 17 These are the same lines as Type 7 PEG_TX1± I PCIE AC coupled off Module PCI Express Differential Receive Pairs 17 These are the same lines as Type 7 PEG_RX1± PCIE_TX18+ D58 AC Coupling capacitor PCIE_TX18- D59 AC Coupling capacitor PCIE_RX18+ C58 PCIE_RX18- C59 PCIE_TX19+ D61 AC Coupling capacitor PCIE_TX19- D62 AC Coupling capacitor PCIE_RX19+ C61 PCIE_RX19- C62 PCIE_TX20+ D65 AC Coupling capacitor PCIE_TX20- D66 AC Coupling capacitor PCIE_RX20+ C65 PCIE_RX20- C66 PCIE_TX21+ D68 AC Coupling capacitor PCIE_TX21- D69 AC Coupling capacitor PCIE_RX21+ C68 PCIE_RX21- C69 PCIE_TX22+ D71 AC Coupling capacitor PCIE_TX22- D72 AC Coupling capacitor PCIE_RX22+ C71 PCIE_RX22- C72 PCIE_TX23+ D74 AC Coupling capacitor PCIE_TX23- D75 AC Coupling capacitor O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 18 These are the same lines as Type 7 PEG_TX2± I PCIE AC coupled off Module PCI Express Differential Receive Pairs 18 These are the same lines as Type 7 PEG_RX2± O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 19 These are the same lines as Type 7 PEG_TX3± I PCIE AC coupled off Module PCI Express Differential Receive Pairs 19 These are the same lines as Type 7 PEG_RX3± O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 20 These are the same lines as Type 7 PEG_TX4± I PCIE AC coupled off Module PCI Express Differential Receive Pairs 20 These are the same lines as Type 7 PEG_RX4± O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 21 These are the same lines as Type 7 PEG_TX5± I PCIE AC coupled off Module PCI Express Differential Receive Pairs 21 These are the same lines as Type 7 PEG_RX5± O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 22 These are the same lines as Type 7 PEG_TX6± I PCIE AC coupled off Module PCI Express Differential Receive Pairs 22 These are the same lines as Type 7 PEG_RX6± AC coupled on Module PCI Express Differential Transmit Pairs 23 These are the same lines as Type 7 PEG_TX7± O PCIE

22 Chapter 3 PCIE_RX23+ C74 PCIE_RX23- C75 PCIE_TX24+ D78 AC Coupling capacitor PCIE_TX24- D79 AC Coupling capacitor PCIE_RX24+ C78 PCIE_RX24- C79 PCIE_TX25+ D81 AC Coupling capacitor PCIE_TX25- D82 AC Coupling capacitor PCIE_RX25+ C81 PCIE_RX25- C82 PCIE_TX26+ D85 N.C. PCIE_TX26- D86 N.C. PCIE_RX26+ C85 N.C. PCIE_RX26- C86 N.C. PCIE_TX27+ D88 N.C. PCIE_TX27- D89 N.C. PCIE_RX27+ C88 N.C. PCIE_RX27- C89 N.C. PCIE_TX28+ D91 AC Coupling capacitor PCIE_TX28- D92 AC Coupling capacitor PCIE_RX28+ C91 PCIE_RX28- C92 PCIE_TX29+ D94 AC Coupling capacitor PCIE_TX29- D95 AC Coupling capacitor PCIE_RX29+ C94 PCIE_RX29- C95 PCIE_TX30+ D98 N.C. PCIE_TX30- D99 N.C. PCIE_RX30+ C98 N.C. PCIE_RX30- C99 N.C. PCIE_TX31+ D101 N.C. PCIE_TX31- D102 N.C. PCIE_RX31+ C101 N.C. PCIE_RX31- C102 N.C. PCIE_CLK_REF+ A88 PCIE_CLK_REF- A89 Signal Pin# Pin Type Pwr Rail /Tolerance COMe SPEC PU/PD DV970 PU/PD Module Base Specification R3.0 USB0+ A46 USB0- A45 USB1+ B46 USB1- B45 USB2+ A43 USB2- A42 USB3+ B43 USB3- B42 I/O USB 3.3V Suspend/3.3V USB differential pairs, channel 2. I/O USB 3.3V Suspend/3.3V USB differential pairs, channel 3. USB Signals Descriptions I/O USB 3.3V Suspend/3.3V USB differential pairs, channels 0. For type 7 only, USB0 may be configured as a USB client or as a host, or both at the Module designer's discretion. All other USB ports, if implemented, shall be host ports. I/O USB 3.3V Suspend/3.3V USB differential pairs, channel 1. O PCIE PCIE Reference clock output for all PCI Express and PCI Express Graphics lanes. O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 25 These are the same lines as Type 7 PEG_TX9± I PCIE AC coupled off Module PCI Express Differential Receive Pairs 25 These are the same lines as Type 7 PEG_RX9± I PCIE AC coupled off Module PCI Express Differential Receive Pairs 23 These are the same lines as Type 7 PEG_RX7± O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 24 These are the same lines as Type 7 PEG_TX8± O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 28 These are the same lines as Type 7 PEG_TX12± I PCIE AC coupled off Module PCI Express Differential Receive Pairs 28 These are the same lines as Type 7 PEG_RX12± I PCIE AC coupled off Module PCI Express Differential Receive Pairs 26 These are the same lines as Type 7 PEG_RX10± O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 27 These are the same lines as Type 7 PEG_TX11± O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 31 These are the same lines as Type 7 PEG_TX15± I PCIE AC coupled off Module PCI Express Differential Receive Pairs 31 These are the same lines as Type 7 PEG_RX15± I PCIE AC coupled off Module PCI Express Differential Receive Pairs 29 These are the same lines as Type 7 PEG_RX13± O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 30 These are the same lines as Type 7 PEG_TX14± I PCIE AC coupled off Module PCI Express Differential Receive Pairs 30 These are the same lines as Type 7 PEG_RX14± O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 29 These are the same lines as Type 7 PEG_TX13± I PCIE AC coupled off Module PCI Express Differential Receive Pairs 27 These are the same lines as Type 7 PEG_RX11± O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 26 These are the same lines as Type 7 PEG_TX10± I PCIE AC coupled off Module PCI Express Differential Receive Pairs 24 These are the same lines as Type 7 PEG_RX8±

23 Chapter 3 USB_0_1_OC# B44 I CMOS 3.3V Suspend/3.3V PU 10K� to 3.3V Suspend IPU 20K� RSV PU 10K� to 3V3 Suspend. USB over-current sense, USB channels 0 and 1. A pull-up for this line shall be present on the Module. An open drain driver from a USB current monitor on the Carrier Board may drive this line low. Do not pull this line high on the Carrier Board. USB_2_3_OC# A44 I CMOS 3.3V Suspend/3.3V PU 10K� to 3.3V Suspend IPU 20K� RSV PU 10K� to 3V3 Suspend. USB over-current sense, USB channels 2 and 3. A pull-up for this line shall be present on the Module. An open drain driver from a USB current monitor on the Carrier Board may drive this line low. Do not pull this line high on the Carrier Board. USB_SSTX0+ D4 AC Coupling capacitor USB_SSTX0- D3 AC Coupling capacitor USB_SSRX0+ C4 USB_SSRX0- C3 USB_SSTX1+ D7 AC Coupling capacitor USB_SSTX1- D6 AC Coupling capacitor USB_SSRX1+ C7 USB_SSRX1- C6 USB_SSTX2+ D10 N.C. USB_SSTX2- D9 N.C. USB_SSRX2+ C10 N.C. USB_SSRX2- C9 N.C. USB_SSTX3+ D13 N.C. USB_SSTX3- D12 N.C. USB_SSRX3+ C13 N.C. USB_SSRX3- C12 N.C. USB0_HOST_PRSNT B48 I COMS 3.3V Suspend/3.3V N.C. Module USB client may detect the presence of a USB host on USB0. A high value indicates that a host is present. Signal Pin# Pin Type Pwr Rail /Tolerance COMe SPEC PU/PD DV970 PU/PD (LPC mode) Module Base Specification R3.0 LPC_AD0 / ESPI_IO_0 B4 LPC_AD1 / ESPI_IO_1 B5 LPC_AD2 / ESPI_IO_2 B6 LPC_AD3 / ESPI_IO_3 B7 LPC_FRAME# / ESPI_CS0# B3 O CMOS 3.3V / 3.3V 1.8V Suspend / 1.8V LPC Mode: LPC frame indicates the start of an LPC cycle ESPI Mode: eSPI Master Chip Select Outputs Driving Chip Select0#. A lowselects a particular eSPI slave for the transaction. Each of the eSPI slaves is connected to a dedicated Chip Selectn# pin. LPC_DRQ0# / ESPI_ALERT0# B8 ESPI mode: PU 1K� to 1.8V PU 10K� to 3.3V, not support ESPI mode. LPC_DRQ1# / ESPI_ARERT1# B9 ESPI mode: PU 1K� to 1.8V PU 10K� to 3.3V, not support ESPI mode. LPC_SERIRQ / ESPI_CS1# A50 I/O CMOS O CMOS 3.3V / 3.3V 1.8V Suspend / 1.8V LPC_SERIRQ : PU 8.2K� to 3.3V PU 10K� to 3.3V LPC Mode: LPC serial interrupt ESPI Mode: eSPI Master Chip Select Outputs Driving Chip Select# A low selects a particular eSPI slave for the transaction. Each of the eSPI slaves is connected to a dedicated Chip Selectn# pin. O PCIE AC coupled on Module O PCIE AC coupled on Module Additional transmit signal differential pairs for the SuperSpeed USB data path. I PCIE AC coupled off Module Additional receive signal differential pairs for the SuperSpeed USB data path. 3.3V / 3.3V 1.8V Suspend / 1.8V LPC Mode: LPC multiplexed address, command and data bus. ESPI Mode: eSPI Master Data Input / Outputs These are bi-directional input/output pins used to transfer data between master and slaves. LPC and eSPI Signals Descriptions I/O CMOS Additional transmit signal differential pairs for the SuperSpeed USB data path. I PCIE AC coupled off Module Additional receive signal differential pairs for the SuperSpeed USB data path. I CMOS 3.3V / 3.3V 1.8V Suspend / 1.8V LPC Mode: LPC serial DMA request ESPI Mode: eSPI pins used by eSPI slave to request service from the eSPI master. O PCIE AC coupled on Module Additional transmit signal differential pairs for the SuperSpeed USB data path. I PCIE AC coupled off Module Additional receive signal differential pairs for the SuperSpeed USB data path. O PCIE AC coupled on Module Additional transmit signal differential pairs for the SuperSpeed USB data path. I PCIE AC coupled off Module Additional receive signal differential pairs for the SuperSpeed USB data path. LPC_CLK / ESPI_CK B10 O CMOS 3.3V / 3.3V 1.8V Suspend / 1.8V series 22� resistor series 22� resistor LPC Mode: LPC clock output - 33MHz nominal ESPI Mode: eSPI Master Clock Output This pin provides the reference timing for all the serial input and output operations.

24 Chapter 3 SUS_STAT# / ESPI_RESET# B18 O CMOS 3.3V Suspend / 3.3V 1.8V Suspend / 1.8V IPU 20K� to 3V3 Suspend. LPC Mode: SUS_STAT# indicates imminent suspend operation. It is used to notify LPC devices that a low power state will be entered soon. LPC devices may need to preserve memory or isolate outputs during the low power state. ESPI Mode: eSPI Reset, Reset the eSPI interface for both master and slaves. eSPI Reset# is typically driven from eSPI master to eSPI slaves. ESPI_EN# B47 I CMOS NA PU 20K� to logic high. PU 20K� to 3V3 Suspend. This signal is used by the Carrier to indicate the operating mode of the LPC/eSPI bus. If left unconnected on the carrier, LPC mode (default) is selected. If pulled to GND on the carrier, eSPI mode is selected. This signal is pulled to a logic high on the module through a resistor. The Carrier should only float this line or pull it low BIOS_DIS0# A34 PU 10K� to 3V3 Suspend. PU 10K� to 3V3 Suspend. BIOS_DIS1# B88 PU 10K� to 3V3 Suspend. PU 10K� to 3V3 Suspend. Signal Pin# Pin Type Pwr Rail /Tolerance COMe SPEC PU/PD DV970 (SPI_3VDU) PU/PD Module Base Specification R3.0 SPI_CS# B97 O CMOS 3.3V Suspend / 3.3V 1.8V Suspend / 3.3V Chip select for Carrier Board SPI - may be sourced from chipset SPI0 or SPI1 SPI_MISO A92 I CMOS 3.3V Suspend / 3.3V 1.8V Suspend / 3.3V Series resistor 33� Series resistor 33� Data in to Module from Carrier SPI SPI_MOSI A95 O CMOS 3.3V Suspend / 3.3V 1.8V Suspend / 3.3V Data out from Module to Carrier SPI SPI_CLK A94 O CMOS 3.3V Suspend / 3.3V 1.8V Suspend / 3.3V Clock from Module to Carrier SPI SPI_POWER A91 O 3.3V Suspend / 3.3V 1.8V Suspend / 3.3V Power supply for Carrier Board SPI – sourced from Module – nominally 3.3V. The Module shall provide a minimum of 100mA on SPI_POWER. Carriers shall use less than 100mA of SPI_POWER. SPI_POWER shall only be used to power SPI devices on the Carrier Board. Signal Pin# Pin Type Pwr Rail /Tolerance COMe SPEC PU/PD DV970 PU/PD Module Base Specification R3.0 SER0_TX A98 O CMOS-T 5V/12V General purpose serial port 0 transmitter SER0_RX A99 I CMOS-T 5V/12V PU 10K� to 3.3V & isolate by Diode General purpose serial port 0 receiver SER1_TX / CAN_TX A101 O CMOS-T 5V/12V 3.3V/12V General purpose serial port 1 transmitter CAN TX output for CAN Bus channel 0. SER1_RX / CAN_RX A102 I CMOS-T 5V/12V 3.3V/12V PU 10K� to 3.3V & isolate by Diode General purpose serial port 1 receiver RX input for CAN Bus channel 0. Signal Pin# Pin Type Pwr Rail /Tolerance COMe SPEC PU/PD DV970 PU/PD Module Base Specification R3.0 I2C_CK B33 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K� to 3.3V Suspend PU 2.2K� to 3.3V Suspend General purpose I2C port clock output I2C_DAT B34 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K� to 3.3V Suspend PU 2.2K� to 3.3V Suspend General purpose I2C port data I/O line General Purpose Serial Interface Signals Descriptions I2C Signal Descriptions SPI Signals Descriptions I CMOS NA Selection straps to determine the BIOS boot device. The Carrier should only float these or pull them low, please refer to 4.13 for strapping options of BIOS disable signals.

25 Chapter 3 Signal Pin# Pin Type Pwr Rail /Tolerance COMe SPEC PU/PD DV970 PU/PD Module Base Specification R3.0 SPKR B32 O CMOS 3.3V / 3.3V Output for audio enunciator - the "speaker" in PC-AT systems. This port provides the PC beep signal and is mostly intended for debugging purposes. WDT B27 O CMOS 3.3V / 3.3V PD 100K� to GND. Output indicating that a watchdog time-out event has occurred. FAN_PWMOUT B101 O OD CMOS 3.3V / 12V RSV PD 100K� to GND Fan speed control. Uses the Pulse Width Modulation (PWM) technique to control the fan's RPM. FAN_TACHIN B102 I OD CMOS 3.3V / 12V PU 47K� to 3.3V PU 47K� to 3.3V Fan tachometer input for a fan with a two pulse output. TPM_PP A96 I CMOS 3.3V / 3.3V PD to GND. PD 100K� to GND. Trusted Platform Module (TPM) Physical Presence pin. Active high. TPM chip has an internal pull down. This signal is used to indicate Physical Presence to the TPM. Signal Pin# Pin Type Pwr Rail /Tolerance COMe SPEC PU/PD DV970 PU/PD Module Base Specification R3.0 PWRBTN# B12 I CMOS 3.3V Suspend/3.3V PU 10K� to 3.3V Suspend PU 10K� to 3.3V Suspend A falling edge creates a power button event. Power button events can be used to bring a system out of S5 soft off and other suspend states, as well as powering the system down. SYS_RESET# B49 I CMOS 3.3V Suspend/3.3V PU 10K� to 3.3V Suspend PU 10K� to 3.3V Suspend Reset button input. Active low request for Module to reset and reboot. May be falling edge sensitive. For situations when SYS_RESET# is not able to reestablish control of the system, PWR_OK or a power cycle may be used. CB_RESET# B50 O CMOS 3.3V Suspend/3.3V PD 100K� to GND Reset output from Module to Carrier Board. Active low. Issued by Module chipset and may result from a low SYS_RESET# input, a low PWR_OK input, a VCC_12V power input that falls below the minimum specification, a watchdog timeout, or may be initiated by the Module software. PWR_OK B24 I CMOS 3.3V / 3.3V PU to 3.3V PU to 3.3V Power OK from main power supply. A high value indicates that the power is good. This signal can be used to hold off Module startup to allow Carrier based FPGAs or other configurable devices time to be programmed. SUS_STAT# B18 O CMOS 3.3V Suspend / 3.3V Indicates imminent suspend operation; used to notify LPC devices. Not used in eSPI implementations. SUS_S3# A15 O CMOS 3.3V Suspend/3.3V PD 100K� to GND Indicates system is in Suspend to RAM state. Active low output. An inverted copy of SUS_S3# on the Carrier Board may be used to enable the non-standby power on a typical ATX supply. SUS_S4# A18 O CMOS 3.3V Suspend/3.3V PD 100K� to GND Indicates system is in Suspend to Disk state. Active low output. SUS_S5# A24 O CMOS 3.3V Suspend/3.3V PD 100K� to GND Indicates system is in Soft Off state. WAKE0# B66 I CMOS 3.3V Suspend/3.3V PU 10K� to 3.3V Suspend PCI Express wake up signal. WAKE1# B67 I CMOS 3.3V Suspend/3.3V PU 10K� to 3.3V Suspend General purpose wake up signal. May be used to implement wake-up on PS2 keyboard or mouse activity. BATLOW# A27 I CMOS 3.3V Suspend/ 3.3V PU 10K� to 3.3V Suspend PU 10K� to 3.3V Suspend Indicates that external battery is low. This port provides a battery-low signal to the Module for orderly transitioning to power saving or power cut-off ACPI modes. In a type 7 system, BATLOW# can be used as a power fail indication. LID# A103 I OD CMOS 3.3V Suspend/12V PU 47K� to 3.3V Suspend PU 47K� to 3.3V Suspend & isolate by Diode LID switch. Low active signal used by the ACPI operating system for a LID switch. SLEEP# B103 I OD CMOS 3.3V Suspend/12V PU 47K� to 3.3V Suspend PU 47K� to 3.3V Suspend & isolate by Diode Sleep button. Low active signal used by the ACPI operating system to bring the system to sleep state or to wake it up again. Signal Pin# Pin Type Pwr Rail /Tolerance COMe SPEC PU/PD DV970 PU/PD Module Base Specification R3.0 RAPID_SHUTDOWN C67 I CMOS 5.0V Suspend / 5.0V Trigger for Rapid Shutdown. Must be driven to 5V though a <=50 ohm source impedance for � 20 μs. Miscellaneous Signal Descriptions Power and System Management Signals Descriptions Rapid Shutdown Signals Descriptions PU 2.2K� to 3.3V Suspend

26 Chapter 3 Signal Pin# Pin Type Pwr Rail /Tolerance COMe SPEC PU/PD DV970 PU/PD Module Base Specification R3.0 THRM# B35 I CMOS 3.3V / 3.3V IPU 10K� to 3.3V Input from off-Module temp sensor indicating an over-temp situation. THRMTRIP# A35 O CMOS 3.3V / 3.3V Active low output indicating that the CPU has entered thermal shutdown. Signal Pin# Pin Type Pwr Rail /Tolerance COMe SPEC PU/PD DV970 PU/PD Module Base Specification R3.0 SMB_CK B13 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K� to 3.3V Suspend PU 2.2K� to 3.3V Suspend System Management Bus bidirectional clock line. Thermal Protection Signals Descriptions SMBUS Signals Descriptions SMB_DAT B14 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K� to 3.3V Suspend PU 2.2K� to 3.3V Suspend System Management Bus bidirectional data line. SMB_ALERT# B15 I CMOS 3.3V Suspend/3.3V PU 2.2K� to 3.3V Suspend System Management Bus Alert – active low input can be used to generate an SMI# (System Management Interrupt) or to wake the system. Signal Pin# Pin Type Pwr Rail /Tolerance COMe SPEC PU/PD DV970 PU/PD Module Base Specification R3.0 GPO0 A93 GPO1 B54 GPO2 B57 GPO3 B63 GPI0 A54 PU 47K� to 3.3V GPI1 A63 PU 47K� to 3.3V GPI2 A67 PU 47K� to 3.3V GPI3 A85 PU 47K� to 3.3V Signal Pin# Pin Type Pwr Rail /Tolerance COMe SPEC PU/PD DV970 PU/PD Module Base Specification R3.0 VCC_12V A104~A109 B104~B109 C104~C109 D104~D109 Power Primary power input: +12V nominal. All available VCC_12V pins on the connector(s) shall be used. VCC_5V_SBY B84~B87 Power Standby power input: +5.0V nominal. If VCC5_SBY is used, all available VCC_5V_SBY pins on the connector(s) shall be used. Only used for standby and suspend functions. May be left unconnected if these functions are not used in the system design. VCC_RTC A47 Power Real-time clock circuit-power input. Nominally +3.0V. Power and GND Signal Descriptions GPIO Signals Descriptions O CMOS 3.3V / 3.3V General purpose output pins. Upon a hardware reset, these outputs should be low. I CMOS 3.3V / 3.3V General purpose input pins. Pulled high internally on the Module.

27 Chapter 3 GND A1, A11, A21, A31, A38, A41, A51, A57, A60, A66, A70, A73, A76, A79, A80, A83, A90, A100, A110, B1, B11, B21 ,B31, B38, B41, B51, B60, B70, B73, B76, B79, B80, B83, B90, B100, B110, C1, C2, C5, C8, C11, C14, C18, C21, C25, C28, C31, C41, C44, C48, C51, C60, C70, C73, C76, C80, C84, C87, C90, C93, C96, C100, C103, C110, D1, D2, D5, D8, D11, D14, D18, D21, D25, D28, D31, D41, D44, D48, D51, D60, D67, D70, D73, D76, D80, D84, D87, D90, D93, D96, D100, D103, D110 Power Ground - DC power and signal and AC signal return path. All available GND connector pins shall be used and tied to Carrier Board GND plane. Signal Pin# Pin Type Pwr Rail /Tolerance COMe SPEC PU/PD DV970 PU/PD (T7) Module Base Specification R3.0 TYPE0# C54 PDS PD 0� to GND TYPE1# C57 PDS N.C. TYPE2# D57 PDS PD 0� to GND Module type Signal Descriptions The TYPE pins indicate to the Carrier Board the Pin-out Type that is implemented on the Module. The pins are tied on the Module to either ground (GND) or are no-connects (NC). For Pin-out Type 1 and Type 10, these pins are not present (X). TYPE2# TYPE1# TYPE0# X X X pin out Type 1 (deprecated) NC NC NC pin out Type 2 (deprecated) NC NC GND pin out Type 3 (no IDE) (deprecated) NC GND NC pin out Type 4 (no PCI) (deprecated) NC GND GND pin out Type 5 (no IDE�PCI) (deprecated) GND NC NC pin out Type 6 (no IDE, no PCI) GND NC GND pin out Type 7 * The Carrier Board should implement combinatorial logic that monitors the Module TYPE pins and keeps power off (e.g deactivates the ATX_ON signal for an ATX power supply) if an incompatible Module pin out type is detected. The Carrier Board logic may also implement a fault indicator such as an LED.

28 Chapter 3 TYPE10# A97 PDS N.C. Dual use pin. Indicates to the Carrier Board that a Type 10 Module is installed. Indicates to the Carrier that a Rev 1.0 or a Rev 2.0/3.0 Module is installed. TYPE10# NC Pin-out R2.0 PD Pin-out Type 10 pull down to ground with 47K resistor 12V Pin-out R1.0 This pin is reclaimed from the VCC_12V pool. In R1.0 Modules this pin will connect to other VCC_12V pins. In R2.0 this pin is defined as a no connect for types 1-6. In R3.0 this pin is defined as a no connect for types 6 and 7. A Carrier can detect a R1.0 Module by the presence of 12V on this pin. R2.0 Module types 1-6 will no connect this pin. R3.0 Module types 6 and 7 will no connect this pin. Type 10 Modules shall pull this pin to ground through a 47K resistor.

29 Chapter 3 Standby Power LED Standby Power LED This LED will light when module board has suspend power rail. Cooling Option Heat Sink with Fan • “1” denotes the location of the thermal pad designed to contact the cor- responding components on DV970. Important: Remove the plastic covering from the thermal pads prior to mounting the heat sink onto DV970. Note: The system board used in the following illustrations may not resemble the actual board. These illustrations are for reference only. Top View of the Heat Sink Bottom View of the Heat Sink 1

30 Chapter 3 Installing DV970 onto a Carrier Board Important: The carrier board used in this section is for reference purpose only and may not resemble your carrier board. These illustrations are mainly to guide you on how to install DV970 onto the carrier board of your choice. 1. Grasp DV970 by its edges and position it on top of the carrier board with its mounting holes aligned with the standoffs on the carrier board. This helps align the COM Express connectors of the two boards to each other. COM Express connectors on DV970 COM Express connectors on the carrier board 2. Apply firm even pressure to the side with the connectors first and push down the entire board. You will hear a “click”, indicating the module is correctly seated in the COM Ex- press connectors of the carrier board. Note: The illustrations above show the pressing points of the module onto the carrier board. Be careful when pressing the module, it may damage the socket. Pressing points BIOS ROM socket

31 Chapter 3 4. Connect the heat sink and fan’s cable to the fan connector on DV970. Fan connector 3. Install a heat sink onto the DV970 with the carrier board. First align the mounting holes of the heat sink with the mounting holes of the module. 3 4 2 5 1 Side View of the Heat sink, Module, and Carrier Board Carrier board Heat sink DV970 Note: Install the heat sink according to the sequence of the screws shown in the image above to avoid damages to the CPU.