Thytronic NA30 Manual 

MANUAL NA30 PHASE & RESIDUAL OVERCURRENT, GROUND DIRECTIONAL, THERMAL IMAGE, RESIDUAL OVERVOLTAGE

T A B L E O F C O N T E N T S T A B L E O F C O N T E N T S 1 INTRODUCTION 5 Scope and liability ...........................................................................................................................................................................................5 Applicability ......................................................................................................................................................................................................5 Conformity ........................................................................................................................................................................................................5 Copyright ...........................................................................................................................................................................................................5 Warranty ...........................................................................................................................................................................................................5 Safety recommendations ...............................................................................................................................................................................5 Insulation tests ................................................................................................................................................................................................5 Product identification .....................................................................................................................................................................................6 Environment .....................................................................................................................................................................................................6 Graphical conventions ...................................................................................................................................................................................6 Glossary/definitions ........................................................................................................................................................................................6 2 GENERAL 10 Preface ........................................................................................................................................................................................................... 10 Photo .............................................................................................................................................................................................................. 10 Main features .................................................................................................................................................................................................11 3 TECHNICAL DATA 12 3.1 GENERAL ............................................................................................................................................................................................................12 Technical data ................................................................................................................................................................................................12 Insulation ........................................................................................................................................................................................................12 EMC tests for interference immunity .........................................................................................................................................................12 Voltage dip and interruption ........................................................................................................................................................................12 EMC tests for interference immunity .........................................................................................................................................................12 Emission ......................................................................................................................................................................................................... 13 Mechanical tests .......................................................................................................................................................................................... 13 Climatic tests ................................................................................................................................................................................................. 13 Safety ............................................................................................................................................................................................................. 13 Certifications ..................................................................................................................................................................................................14 3.2 INPUT CIRCUITS ...............................................................................................................................................................................................14 Auxiliary power supply Uaux ......................................................................................................................................................................14 Phase current input circuits ........................................................................................................................................................................14 Residual current input circuit ......................................................................................................................................................................14 Residual voltage input circuit ......................................................................................................................................................................14 Binary input circuits ......................................................................................................................................................................................14 Block input (Logic selectivity) .....................................................................................................................................................................14 3.3 OUTPUT CIRCUITS ............................................................................................................................................................................................14 Relays ..............................................................................................................................................................................................................14 Block output (Logic selectivity) ...................................................................................................................................................................15 3.4 MMI .....................................................................................................................................................................................................................15 3.5 COMMUNICATION INTERFACES ...................................................................................................................................................................15 Local port ........................................................................................................................................................................................................15 Remote ports ..................................................................................................................................................................................................15 3.6 GENERAL SETTINGS ........................................................................................................................................................................................16 3.7 PROTECTIVE FUNCTIONS ...............................................................................................................................................................................16 Base current - IB ...........................................................................................................................................................................................16 Thermal protection with Pt100 probes - 26 ...............................................................................................................................................16 Thermal image - 49 ........................................................................................................................................................................................16 Phase overcurrent - 50/51 ............................................................................................................................................................................16 Residual overcurrent - 50N/51N ................................................................................................................................................................ 18 Residual overvoltage - 59N ......................................................................................................................................................................... 19 Directional earth fault overcurrent - 67N ................................................................................................................................................. 19 Breaker failure - BF .......................................................................................................................................................................................22 3.8 CONTROL AND MONITORING ....................................................................................................................................................................... 23 Second harmonic restraint - 2ndh-REST .................................................................................................................................................. 23 Trip Circuit Supervision - 74TCS ................................................................................................................................................................. 23 Selective block - BLOCK2 ........................................................................................................................................................................... 23 Internal selective block - BLOCK4 ............................................................................................................................................................. 23 Circuit Breaker supervision ........................................................................................................................................................................ 23 CT supervision - 74CT .................................................................................................................................................................................. 23 Pilot wire diagnostic .................................................................................................................................................................................... 23 Demand measures ....................................................................................................................................................................................... 23 Oscillography (DFR)) .....................................................................................................................................................................................24 PLC (Programmable Logic Controller) .......................................................................................................................................................24

3.9 METERING..........................................................................................................................................................................................................25 Accuracy (type tests)....................................................................................................................................................................................25 Measures ........................................................................................................................................................................................................25 4 FUNCTION CHARACTERISTICS 26 4.1 HARDWARE DESCRIPTION .............................................................................................................................................................................26 Power supply board ......................................................................................................................................................................................27 CPU board .......................................................................................................................................................................................................27 Input board .....................................................................................................................................................................................................27 MMI (keyboard, LED and display) ..............................................................................................................................................................27 4.2 SOFTWARE DESCRIPTION ............................................................................................................................................................................. 28 Base software ............................................................................................................................................................................................... 28 Real-time operating system ........................................................................................................................................................................ 28 Task ................................................................................................................................................................................................................. 28 Drivers ............................................................................................................................................................................................................ 29 Application Software ................................................................................................................................................................................... 29 Data Base ...................................................................................................................................................................................................... 29 Self test (Application) .................................................................................................................................................................................. 29 Development tools (Builder) ....................................................................................................................................................................... 29 4.3 I/O DESCRIPTION ............................................................................................................................................................................................. 30 Metering inputs ............................................................................................................................................................................................ 30 Signal processing ......................................................................................................................................................................................... 30 Conventions ................................................................................................................................................................................................... 33 Use of measured values ...............................................................................................................................................................................34 Binary inputs ..................................................................................................................................................................................................35 Output relays ................................................................................................................................................................................................. 40 LED indicators ................................................................................................................................................................................................42 Communication interfaces ...........................................................................................................................................................................44 4.4 PROTECTIVE ELEMENTS .................................................................................................................................................................................45 Rated values ...................................................................................................................................................................................................45 Thermal protection with RTD thermometric probes - 26 ........................................................................................................................47 Thermal image - 49 ....................................................................................................................................................................................... 49 Phase overcurrent - 50/51 ........................................................................................................................................................................... 60 Residual overcurrent - 50N/51N ................................................................................................................................................................ 70 Residual overvoltage - 59N ......................................................................................................................................................................... 80 Ground directional overcurrent - 67N ........................................................................................................................................................84 Breaker failure - BF .....................................................................................................................................................................................107 4.5 CONTROL AND MONITORING ..................................................................................................................................................................... 109 Logical block - BLOCK1 ............................................................................................................................................................................. 109 Selective block - BLOCK2 ..........................................................................................................................................................................111 Internal selective block -BLOCK4 .............................................................................................................................................................116 Remote tripping ...........................................................................................................................................................................................117 Frequency tracking .................................................................................................................................................................................... 118 Second Harmonic Restraint - 2ndh-REST .............................................................................................................................................. 119 Cold Load Pickup - CLP ............................................................................................................................................................................. 120 CT supervision - 74CT .................................................................................................................................................................................122 Trip circuit supervision - 74TCS................................................................................................................................................................ 123 Circuit breaker supervision .......................................................................................................................................................................126 Demand measures ..................................................................................................................................................................................... 129 Oscillography ............................................................................................................................................................................................. 129 5 MEASURES, LOGIC STATES AND COUNTERS 130 Measures ..................................................................................................................................................................................................... 130 Protection .................................................................................................................................................................................................... 130 Delayed inputs ............................................................................................................................................................................................ 130 Internal states ............................................................................................................................................................................................. 130 Relays ............................................................................................................................................................................................................131 Counters ........................................................................................................................................................................................................131 Self test .........................................................................................................................................................................................................131 Pilot wire diagnostic ...................................................................................................................................................................................132 Selective Block - BLOCK2 ..........................................................................................................................................................................132 Fault recording - SFR ..................................................................................................................................................................................132 Event recording - SER ................................................................................................................................................................................ 133 Oscillography - DFR ................................................................................................................................................................................... 133 6 INSTALLATION 135 6.1 PACKAGING .....................................................................................................................................................................................................135 6.2 MOUNTING ......................................................................................................................................................................................................135 6.3 ELECTRICAL CONNECTIONS ....................................................................................................................................................................... 139

6.4 NOMINAL CURRENT In AND IEn SETTING ............................................................................................................................................... 149 6.5 LED ALLOCATION ........................................................................................................................................................................................... 153 6.6 FINAL OPERATIONS ...................................................................................................................................................................................... 153 7 PROGRAMMING AND SETTINGS 154 7.1 SW ThyVisor ....................................................................................................................................................................................................154 ThyVisor installation ....................................................................................................................................................................................154 ThyVisor use .................................................................................................................................................................................................154 7.2 MMI (Man Machine Interface) ....................................................................................................................................................................155 Reading variables (READ) ..........................................................................................................................................................................155 Setting modifying (SET) ..............................................................................................................................................................................155 TEST ...............................................................................................................................................................................................................157 COMMUNICATION ......................................................................................................................................................................................157 Circuit breaker commands ....................................................................................................................................................................... 158 Enable / block changes via keyboard - Password ................................................................................................................................ 158 7.3 MODULES MANAGEMENT .......................................................................................................................................................................... 159 7.4 MAINTENANCE .............................................................................................................................................................................................. 160 7.5 REPAIR ............................................................................................................................................................................................................. 160 7.6 PACKAGING .................................................................................................................................................................................................... 160 8 APPENDIX 161 8.1 APPENDIX A1 - Inverse time IEC curves ...................................................................................................................................................161 Mathematical formula ................................................................................................................................................................................161 Phase overcurrent 50/51 - Standard inverse time curve (IEC 60255-3/BS142 type A) ....................................................................162 Phase overcurrent 50/51 - Very inverse time curve (IEC 60255-3/BS142 type B) ........................................................................... 163 Phase overcurrent 50/51 - Extremely inverse time curve (IEC 60255-3/BS142 type C) ...................................................................164 Residual overcurrent 50N/51N - Standard inverse time curve (IEC 60255-3/BS142 type A) .........................................................165 Residual overcurrent 50N/51N - Very inverse time curve (IEC 60255-3/BS142 type B) ..................................................................166 Residual overcurrent 50N/51N - Extremely inverse time curve (IEC 60255-3/BS142 type C) ........................................................167 Ground directional overcurrent 67N - Standard inverse time curve (IEC 60255-3/BS142 type A) ............................................... 168 Ground directional overcurrent 67N - Very inverse time curve (IEC 60255-3/BS142 type B) ....................................................... 169 Ground directional overcurrent 67N - Extremely inverse time curve (IEC 60255-3/BS142 type C) .............................................. 170 8.2 APPENDIX A2 - Inverse time ANSI/IEEE curves .......................................................................................................................................171 Mathematical formula ................................................................................................................................................................................171 Phase overcurrent 50/51 - Moderately inverse time curve (ANSI/IEEE type MI) ............................................................................172 Phase overcurrent 50/51 - Very inverse time curve (ANSI/IEEE type VI) ........................................................................................ 173 Phase overcurrent 50/51 - Extremely inverse time curve (ANSI/IEEE type EI) ................................................................................174 Residual overcurrent 50N/51N - Moderately inverse time curve (ANSI/IEEE type MI) .................................................................175 Residual overcurrent 50N/51N - Very inverse time curve (ANSI/IEEE type VI) ...............................................................................176 Residual overcurrent 50N/51N - Extremely inverse time curve (ANSI/IEEE type EI) ......................................................................177 Ground directional overcurrent 67N - Moderately inverse time curve (ANSI/IEEE type MI)....................................................... 178 Ground directional overcurrent 67N - Very inverse time curve (ANSI/IEEE type VI) .................................................................... 179 Ground directional overcurrent 67N - Extremely inverse time curve (ANSI/IEEE type EI) ........................................................... 180 8.3 APPENDIX A3 - Inverse time - RECTIFIER, I2t and EM curves ................................................................................................................181 Mathematical formula ................................................................................................................................................................................181 Phase overcurrent 50/51 - Rectifier curves ............................................................................................................................................182 Phase overcurrent 50/51 - I2t inverse curves (I2t=K) ........................................................................................................................... 183 Phase overcurrent 50/51 - Electromechanical inverse curves (EM) ..................................................................................................184 Residual overcurrent 50N/51N - Electromechanical inverse curves (EM)........................................................................................185 Ground directional overcurrent 67N - Electromechanical inverse curves (EM) ..............................................................................186 8.4 APPENDIX B1 - I/O Diagram .........................................................................................................................................................................187 8.5 APPENDIX B2 - Interfaces ........................................................................................................................................................................... 188 8.6 APPENDIX B3- Connection diagrams ........................................................................................................................................................ 189 8.7 APPENDIX C - Dimensions ............................................................................................................................................................................192 8.8 APPENDIX D - Setting table ......................................................................................................................................................................... 193 8.9 APPENDIX E - EC Declaration of conformity ..............................................................................................................................................237

1 I N T R O D U C T I O N 1 I N T R O D U C T I O N Scope and liability This document describes the functions, the technical data of NA30 devices; instructions for mount- ing, setting and commissioning are included. This manual has been checked out, however, deviations from the description cannot be completely ruled out, so that no liability in a legal sense for correctness and completeness of the information or from any damage that might result from its use is formally disclaimed. The information given in this document is reviewed regularly; any corrections and integration will be included in subsequent editions that are identified by the date of revision. We appreciate any suggestions for improvement. We reserve the right to make technical improvements without notice. Applicability This manual is valid for NA30 devices with firmware version 1.60 and following. Conformity The product complies with the CE directives: • EMC Council Directives: 2014/30/EC • Low voltage Directives: 2014/35/EC Copyright All right reserved; It is forbidden to copy, modify or store material (document and sw) protected by copyright without Thytronic consent. Warranty Thytronic warrants devices against defects in materials and workmanship under normal use for a period of ONE (1) YEAR from the date of retail purchase by the original end-user purchaser (“War- ranty Period”). Safety recommendations The warming contained in this document are all-important for safety; special attention must be paid to the following symbols: Installation and commissioning must be carried out by qualified person; Thytronic assumes no re- sponsibility for damages caused from improper use that does not comply all warning and caution in this manual. In particular the following requirements must be met: • Remove power before opening it. • Verify the voltage absence by means suitable instrumentation on relay connections; attention must be paid to all circuits supplied by external sources (binary input, CT, etc...) • Care must be taken when handling metal parts (front panel, connectors). Insulation tests After insulation tests, hazardous voltages (capacitor charges,...) may be arise; it is advisable to grad- ually reduce the test voltage avoiding to erase it abruptly. DANGER Death, severe personal injury or substantial property damage will result if proper precautions are not taken WARNING Death, severe personal injury or substantial property damage can result if proper precautions are not taken. CAUTION Minor personal injury or property damage can result if proper precautions are not taken CAUTION Settings must be established on the basis of a coordination study. Numerical values inside examples have educational purpose only; they don’t be used, in no way, for actual applications.

Product identification Each device is equipped with: • Identification label installed on the front side with following informations: code number, phase and residual nominal currents, auxiliary voltage range and CE mark: • Test label with following informations: data, serial number and test operator signature. Environment The NA30 device must be employed according to the environment conditions shown (see technical data). In case of different environment conditions, appropriate provisions must be provided (conditioning system, humidity control, etc...). If contaminants are present (dust, corrosive substances, etc...), filters must be provided. Graphical conventions The CEI/IEC and ANSI symbols is employed where possible: e.g.: 51 = ANSI code concerning the overcurrent element. Following text formats are used: The ThyVisor[1] menu: Phase overcurrent -50/51 The parameter description (measures, thresholds, operate time,...) and related value: I> element � � � � Definite�time I>def The display messages (MMI) are shown as: NA30 Notes are highlighted with cursive letters inside colored bar Note: Useful description note Glossary/definitions IEn Relay residual nominal current IEnp Residual CT primary nominal current In Relay phase nominal current Inp Phase CT primary nominal current IB Basic current: it represents the nominal current of the line or trans- former, referred to the nominal current of the CT’s for thermal image protection UEn Relay residual nominal voltage UEnp Residual primary nominal voltage (phase-to-phase) · √3 49 Thermal image ANSI code 50/51 Phase overcurrent ANSI code 50N/51N Residual overcurrent ANSI code 59N Residual overvoltage ANSI code 67N Directional ground fault ANSI code BF Circuit breaker failure ANSI code 74CT CT supervision 74TCS Trip Circuit Supervision DFR Digital Fault Recorder (Oscillography) SER Sequential Event Recorder SFR Sequential Fault Recorder ANSI American National Standard Institute IEEE Institute of Electrical and Electronics Engineers IEC International Electrotechnical Commission CENELEC Comité Européen de Normalisation Electrotechnique 52 o CB (Circuit Breaker) Circuit Breaker Note 1 The graphic interface and the operation of the ThyVisor software are described in the relative chapters NA30#0A2MMB0 In 5A UAUX 110-230 Vac/dc 100V IEn UEn 1A 1A 5A 1A 5A 1 2 3 4 5

52a Auxiliary contact in the breaker that is in the same position as the breaker. It can be assigned to a binary input to locate the CB posi- tion (Breaker failure and/or CB diagnostic functions). (52a open = CB open) 52b Auxiliary contact in the breaker that is in the opposite position as the breaker (52b open = CB closed) K1...K6...K10 Output relays Pulse Output relay with pulse operation tTR Output relay minimum pulse width Latched Output relay with latched operation (manual reset) Output relay with latched operation (automatic reset) No-latched Output relay with no-latched operation (automatic reset) CT Current Transformer P1 IEC nomenclature for primary polarity mark of CTs (as an alternative to a ANSI dot) P2 IEC nomenclature for primary polarity mark of CTs (as an alternative to a ANSI no-dot) S1 IEC nomenclature for secondary polarity mark of CTs (as an alternative to a ANSI dot) S2 IEC nomenclature for secondary polarity mark of CTs (as an alternative to a ANSI no-dot) Self test Diagnostic Start Leave an initial condition or reset condition (Pickup) Trip Operation (with operate time) Operating time Duration of time interval between the instant when the character- istic quantity in reset condition is changed, under specified condi- tions, and the instant when the relay operates Dropout ratio The ratio of a reset value to an operate value in well-specified con- ditions. The dropout ratio may be lower or greater than 1 according as an over or under element is considered Reset time Duration of the time interval between the instant when the charac- teristic quantity in operate condition is changed, under specified conditions, and the instant when the relay operates. The stated reset time is related to a step variation of characteristic quantity in operate condition to the reset condition. Overshoot time The critical impulse time for a relay which is in its reset condition, is the longest duration a specified change in the input energizing quantity(ies) (characteristic quantity), which will cause the relay to change to operate condition, can be applied without the relay switches. The overshoot time is the difference from the operate time and the critical impulse time. The declared values for the overshoot time are applicable with the lower setting value of the operation time. MMI (Man Machine Interface) Operator front panel ThyVisor Setting and monitoring software Log file A text file that lists actions that have occurred (ThyVisor). J2SE Java Platform Standard Edition Subnet Mask (Ethernet nomenclature) Sw Software Fw Firmware Upgrade Firmware upgrade XML eXtensible Markup Language

Symbols.ai Symbols I>> Start I>> BF_OUT IPh Block2 Logic internal signal (output); may be a logical state (e.g.I>> Start) or a numerical value It is available for reading (ThyVisor + communication interface) Logic external signal (intput); may be a command coming from a binary input or a sw command It is available for reading (ThyVisor + communication interface) Internal signal (e.g. Breaker Failure output state concerning to the 2nd threshold of the 50 element) It is not available for reading (missing arrow) AND and NAND logic gates OR and NOR logic gates Limit block (I>> threshold). Computation block (Max phase current) Threshold setting (e.g. pickup I>>). The value is available for reading and is adjustable by means ThyVisor + MMI. Switch ON delay timer with reset (tON delay) ON delay timer without reset (tON delay) OFF delay timer (dropout) without reset (tDROP delay) Curve type (definite/inverse time) 0 T I L3 Max[I L1 ,I L2 ,I L3 ] I L2 I L1 tON tON tON tON t RESET INPUT OUTPUT tDROP tON tON t INPUT OUTPUT tON tON tON t INPUT OUTPUT 0 T tON & & ≥1 ≥1 EXOR logic gate tDROP =1 I>> I I ≥ I>> tON RESET 0 T 0 T

Symbols1 .ai t RESET INPUT OUTPUT tOFF tOFF tOFF tOFF Minimum pulse width operation for output relays (tTR) tTR t tTR INPUT OUTPUT tTR 0 T tTR t tTR INPUT OUTPUT Latched operating mode for output relays and LEDs Pulse operating mode for output relays t INPUT OUTPUT Latched tTR T 0 RESET OFF delay timer (dropout) with reset (tOFF delay)

2 G E N E R A L 2 G E N E R A L Preface The relay type NA30 can be used in radial networks as feeder or power transformer protection: • On long feeders in ungrounded or Petersen coil and/or high resistance grounded systems. • On the BT side of parallel connect transformers that are protected with differential element with any grounded systems. • As ground fault protection of parallel connected generators or generator-transformer unit on the same Busbar. Following input circuits are available: • Three phase current and one residual current inputs with nominal currents independently select- able at 1 A or 5 A using dip-switch. • One residual voltage input with nominal voltage programmable in the range 50...130 V (UER=100V). • Five binary inputs. • One block input (logic selectivity). In addition to the main protection element, the breaker failure (BF), CT monitoring (74CT)) and Trip Circuit Supervision (TCS) are also provided. Setting, programming and reading operations must be effected by means of Personal Computer with ThyVisor software or by means of remote communication interface (RS485 bus,Ethernet network and USB); all operations must be performed through MMI. According to the hardware configurations, the NA30 protection relay can be shipped in various case styles depending on the required mounting options: • Flush. • Projecting mounting. • Rack. • With separate operator panel. Other options are: • Auxiliary power supply operating range. • Communication protocols. Photo

Main features • Metallic case. • Backlight LCD 4x16 Display. • Eight LEDs that may be joined with matrix criteria to many and various functions. • RESET key to clear LED indications and latched output relays. • Five free settable binary inputs. • Independently settable for start, trip, self-test and control six output relay (K1...K6) Each output relay may be set with normally energized or normally de-energized operating mode and manual or automatic reset (latched/no-latched). • Rear Ethernet communication port, with MODBUS TCP/IP® protocol, with RJ45 (copper wires) or FX (optical fiber) connection. • Rear RS485 port, with ModBus protocol. • USB front serial port (local communication for ThyVisor). • Real time clock with super capacitor. The most significant constructive features are: • Galvanically insulated input and output circuits (communication and binary circuits included). • Optimum filtering of input signals through combined use of analog and digital filters. • Traditional electromechanical-type final output contacts with continuous monitoring of control coil continuity. • Auxiliary supply comprising a switching-type voltage stabilizing circuit having a very wide working range and a very small power dissipation • Nominal frequency: 50 or 60 Hz. The most significant operating features are: • Programming of operating modes and parameters by means of the front keys and alphanumeric display, with a programming procedure based on carrying out guided selections and on explicit and immediate signalling of the operations being performed, so that such procedure can be carried out without coding tables or mnemonic informations. • The feature modification operations do not interrupt the normal functions of the relay. • Impossibility of programming unacceptable parameter values, thanks to the automatic limitation of top and bottom scale values for the relative setting ranges. • Currents are sampled 24 times per period and measured in the effective value (RMS) of the funda- mental component using the DFT (Discrete Fourier Transform) algorithm and digital filters. • The fault recorder (SFR) runs continuously capturing in circular mode the last twenty events upon trigger of binary input/output and/or element pickup (start-trip). • The event recorder (SER) runs continuously capturing in circular mode the last three hundred events upon trigger of binary input/output. • Digital fault recorder (DFR) in COMTRADE format (oscillography).

3 T E C H N I C A L D ATA 3 T E C H N I C A L D ATA 3.1 GENERAL � Technical data Mounting: • Flush. • Projecting. • Rack. • Separated operator panel. External dimensions (Flush mounting) 177 x 107 x 235 (high x width x depth) Terminals screw connection Mass (Flush mounting) 2.0 kg Reference standards EN 60529, EN 60529/A1 Degrees of protection provided by enclosures (IP Code) • Front IP52 • Terminals IP20 � Insulation Reference standards EN 60255-5 IEC 60255-5 High voltage test (50 Hz 60 s) • Auxiliary power supply 2 kV • Input circuits 2 kV • Output circuits 2 kV • Output circuits (between open contacts) 1 kV • Comunication Circuits 500 V Impulse voltage withstand test (1.2/50 ms): • Auxiliary power supply 5 kV • Input circuits 5 kV • Output circuits 5 kV • Output circuits (between open contacts) 2.5 kV Insulation resistance >100 MW � EMC tests for interference immunity Reference standards • Product standard for measuring relays EN 50263 • Generic standards immunity for industrial environments EN 61000-6-2 • Electromagnetic compatibility requirements for measuring relays and protection equipment EN 60255-26 • Apparati di automazione e controllo per centrali e stazioni elettriche • Compatibilità elettromagnetica - Immunità ENEL REMC 02 • Normativa di compatibilità elettromeccanica per apparati e sistemi ENEL REMC 01 � Voltage dip and interruption Reference standards EN 61000-4-29 IEC 60255-22-11 Voltage dips, short interruptions and voltage variations on dc input power port immunity tests Auxiliary power supply in dc energizing quantity • Interruption (UT=40%) 100 ms • Interruption (UT=0%) 50 ms • Voltage variations (UT=80...120%) 10 s � EMC tests for interference immunity Reference standards EN 60255-22-1 IEC 60255-22-1 EN 61000-4-12 EN 61000-4-12 Damped oscillatory wave • 0.1 MHz and 1 MHz common mode 2.5 kV • 0.1 MHz and 1 MHz differential mode 1.0 kV • Ring wave common mode 2.0 kV • Ring wave differential mode 1.0 kV Reference standards EN 60255-22-2 IEC 60255-22-2 EN 61000-4-2 IEC 61000-4-2 Electrostatic discharge • Contact discharge 6 kV • Air discharge 8 kV

Reference standards EN 60255-22-3 IEC 60255-22-3 EN 61000-4-3 IEC 61000-4-3 Radiated radio-frequency fields • 80...1000 MHz AM 80% 10 V/m • 900 MHz Pulse modulated 10 V/m Reference standards EN 60255-22-4 IEC 60255-22-4 EN 61000-4-4 IEC 61000-4-4 Fast transient burst (5/50 ns) • Auxiliary power supply 2 kV • Input circuits 4 kV Reference standards EN 60255-22-5 IEC 60255-22-5 EN 61000-4-5 IEC 61000-4-5 High energy pulse • Uaux (line-to-ground 10 ohm, 9 mF) 2 kV • Uaux (line-to-line 0 ohm, 18 mF) 1 kV • I/O ports (line-to-ground 40 ohm, 0.5 mF) 2 kV • I/O ports (line-to-line 40 ohm, 0.5 mF) 1 kV Reference standards EN 60255-22-6 IEC 60255-22-6 EN 61000-4-6 IEC 61000-4-6 Conducted radio-frequency fields • 0.15...80 MHz AM 80% 1kHz 10 V Reference standards EN 60255-22-7 IEC 60255-22-7 EN 61000-4-16 IEC 61000-4-16 Power frequency immunity tests • Dc voltage 30 V • 50 Hz continuously 30 V • 50 Hz 1 s 300 V • 0.015...150 kHz 30 V Reference standards EN 61000-4-8 IEC 61000-4-8 Magnetic field 50 Hz • 50 Hz continuously 100 A/m • 50 Hz 1 s 1 kA/m Reference standards EN 61000-4-10 IEC 61000-4-10 Damped oscillatory magnetic field • Damped oscillatory wave 0.1 MHz 30 A/m • Damped oscillatory wave 1 MHz 30 A/m � Emission Reference standards EN 60255-25 IEC 60255-25 EN 61000-6-4 IEC 61000-6-4 EN 55011 CISPR 11 Electromagnetic emission tests • Conducted emission auxiliary power supply 0.15...0.5 MHz 79 dB mV • Conducted emission auxiliary power supply 0.5...30 MHz 73 dB mV • Radiated emission 30...230 MHz 40 dB mV/m • Radiated emission 230...1000 MHz 47 dB mV/m � Mechanical tests Reference standards EN 60255-21-1 EN 60255-21-2 RMEC01 Vibration, shock, bump and seismic tests on measuring relays and protection equipment • EN 60255-21-1 Vibration tests (sinusoidal) Class 1 • EN 60255-21-2 Shock and bump test Class 1 � Climatic tests Reference standards IEC 60068-x ENEL R CLI 01 CEI 50 Ambient temperature -25...+70 °C Storage temperature -40...+85 °C Relative humidity 10...95 % Atmospheric pressure 70...110 kPa � Safety Reference standards EN 61010-1 Safety requirements for electrical equipment for measurement, control and laboratory use Pollution degree 3 Reference voltage 250 V Overvoltage category III

� Certifications Reference standards Product standard for measuring relays EN 50263 CE Conformity • EMC Directive 2014/30/EC • Low Voltage Directive 2014/35/EC Type tests IEC 60255-6 3.2 INPUT CIRCUITS � Auxiliary power supply Uaux Voltage Nominal value (range) 24...48 V~/- 115...230 V~/110...220 V- Operative range (each one of the above nominal values) 19...60 V~/- 85...265 V~/75...300 V- Inrush current (max) • 24 V- 6 A, 5 ms • 48 V- 14 A, 5 ms • 110 V- 20 A, 1 ms • 230 V~ 50 A, 1 ms Frequency (for alternate voltage supply) 45...66 Hz Max distortion factor ( for alternating voltage supply) 15% Max alternating component (for dc voltage supply): • Full wave rectified sine wave 100 % • Sine wave 80 % Power consumption: • Maximum (energized relays, Ethernet TX) 10 W (20 VA) • Maximum (energized relays, Ethernet FX) 15 W (25 VA) � Phase current input circuits Relay nominal phase current In 1 A or 5 A selectable by dip-switch Permanent overload 25 A Thermal overload (1 s) 500 A Dynamic overload (half cycle) 1250 A Rated consumption (for any phase) ≤ 0.002 VA with In=1 A ≤ 0.04 VA with In=5 A � Residual current input circuit Relay nominal residual current IEn 1 A or 5 A selectable by dip-switch Permanent overload 25 A Thermal overload (1 s) 500 A Dynamic overload (half cycle) 1250 A Rated consumption ≤ 0.006 VA with IEn=1 A ≤ 0.12 VA with IEn=5 A � Residual voltage input circuit Relay residual nominal voltage UEn 50...130 V Permanent overload 130 V Thermal overload (1 s) 200 V Rated consumption ≤ 0.5 VA � Binary input circuits Quantity 5 Type optocoupler Operative range 24...265 V~/- Min activation voltage UDIGmin 18 V Max consumption, energized IDIG 3 mA � Block input (Logic selectivity) Quantity 1 Type polarized wet input (powered by internal isolated supply) Max consumption, energized 5 mA 3.3 OUTPUT CIRCUITS � Relays Quantity 6 Type of contacts K1, K2 changeover (SPDT, type C) Type of contacts K3, K4, K5 make (SPST-NO, type A) Type of contacts K6 break (SPST-NC, type B)

Nominal current 8 A Nominal voltage/max switching voltage 250 V~/400 V~ Breaking capacity: • Direct current (L/R = 40 ms) 50 W • Alternating current (l = 0,4) 1250 VA Make 1000 W/VA Short duration current (0,5 s) 30 A Minimum switching load 300 mW (5 V/ 5 mA) Life: • Mechanical 106 operations • Electrical 105 operations � Block output (Logic selectivity) Quantity 1 Type optocoupler 3.4 MMI Display LCD alfanumerico 16x4 LEDs Quantity 8 • ON/fail (green) 1 • Start (yellow) 1 • Trip (red) 1 • Freely allocatable (red) 5 Keyboard 8 keys 3.5 COMMUNICATION INTERFACES � Local port Connection USB Type B Protocol Modbus RTU® � Remote ports RS485 • Connection screw terminals • Baud rate 1200...57600 bps • Protocol ModBus®RTU IEC 60870-5-103 DNP3 Ethernet 100BaseT • Connection Optical fiber 1300 nm, ST 100 Base TX, RJ45 • Baud rate 100 Mbps • Protocol ModBus®TCP/IP

3.6 GENERAL SETTINGS Relay nominal frequency (fn) 50, 60 Hz Relay phase nominal current (In) 1 A or 5 A [1] Phase CT primary nominal current (Inp) 1 A...10 kA 1...499 A (step 1 A) 500...4990 A (step 10 A) 5000...10000 A (step 100 A) Relay residual nominal current (IEn) 1 A o 5 A [1] Residual CT primary nominal current (IEnp) 1 A...10 kA 1...499 A (step 1 A) 500...4990 A (step 10 A) 5000...10000 A (step 100 A) Relay residual nominal voltage (UEn) 50...130 V (step 1 V) Residual primary nominal voltage (phase-to-phase) ∙√3 (UEnp) 50 V...500 kV 50...499 V (step 1 V) 500...4990 V (step 10 V) 5000...49900 V (step 100 V) 50000...500000 V (step 1000 V) 3.7 PROTECTIVE FUNCTIONS � Base current - IB[2] Base current (IB) 0.10...2.50 In (step 0.01 In) � Thermal protection with Pt100 probes - 26[3] ThAL1...8 Alarm: Alarm threshold 26 PT1...PT8 (ThAL1...8) 0...200 °C Operating time ThAL1...8 (tThAL1...8) 0....100 s Th>1...8 Trip: Trip threshold 26 PT1...PT8 (Th>1...8) 0...200 °C Operating time ThAL1...8 (tTh>1...8) 0....100 s � Thermal image - 49 Common configuration: Initial thermal image DqIN (DthIN) 0.0...1.0 DqB (step 0.1 DqB)[4] Reduction factor at inrush (KINR) 1.0...3.0 (step 0.1) Thermal time constant t (T) 1...200 min (step 1 min) DthCLP activation time (tDthCLP) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) DthAL1 Element 49 First alarm threshold (DthAL1) 0.3...1.0 DqB (step 0.1 DqB) DthAL2 Element 49 Second alarm threshold (DthAL2) 0.5...1.2 DqB (step 0.1 DqB) Dth> Element 49 Trip threshold (Dth>) 1.100...1.300 DqB (step 0.001 DqB) Pickup accuracy ± 1% with 0.1 In, ± 1% with 1 In Operate time accuracy 5% or ± 10 ms � Phase overcurrent - 50/51 I> Element I> Curve type (I>Curve) DEFINITE IEC/BS A, B, C ANSI/IEEE MI, VI, EI RECTIFIER, I2t or EM I CLP> Activation time (tCLP>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) I> Reset time delay (t>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) Note 1 The nominal current settings doesn’t concern the protection elements; they must agree with hardware setting (dip-switch 1 A or 5 A) . Note 2 The basic current IB represents the nominal current of the line or transformer, referred to the nominal current of the CT’s for thermal image protection. If the secondary rated current of the line CT’s equals the rated current of the NA30 relay, as usually happens, the IB value is the ratio between the rated current of the protected element and the primary rated current of the CT’s Note 3 The 26 element is available when the MPT module is connect on Thybus and enabled Note 4 Dq is the thermal image (p.u. of the basic over temperature corresponding to the basic current IB). Assuming that the secondary rated current of the line CT’s equals the rated current of the NA30 relay, as usually happens, the IB value is the ratio between the rated current of the protected element and the primary rated current of the CT’s

Definite time 50/51 First threshold definite time (I>def) 0.100...40.0 In 0.100...0.999 In (step 0.001 In) 1.00...9.99 In (step 0.01 In) 10.0...40.0 In (step 0.1 In) I>def within CLP (ICLP>def) 0.100...40.0 In 0.100...0.999 In (step 0.001 In) 1.00...9.99 In (step 0.01 In) 10.0...40.0 In (step 0.1 In) I>def Operating time (t>def) 0.04...200.00 s 0.04...9.99 s (step 0.01 s) 10.0...99.9 s (step 0.1 s) 100...200 s (step 1 s) Inverse time[1] 50/51 First threshold inverse time (I>inv) 0.100...20.00 In 0.100...0.999 In (step 0.001 In) 1.00...20.00 In (step 0.01 In) I>inv within CLP (ICLP>inv) 0.100...20.00 In 0.100...0.999 In (step 0.001 In) 1.00...20.00 In (step 0.01 In) I>inv Operating time (t>inv) 0.02...60.0 s 0.02...9.99 s (step 0.01 s) 10.0...60.0 s (step 0.1 s) I>> Element I>> Curve type (I>>Curve) DEFINITE or I2t I CLP>> Activation time (tCLP>>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) I>> Reset time delay (t>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) Definite time 50/51 Second threshold definite time (I>>def) 0.100...40.00 In 0.100...0.999 In (step 0.001 In) 1.00...9.99 In (step 0.01 In) 10.0...40.0 In (step 0.1 In) I>>def within CLP (ICLP>>def) 0.100...40.00 In 0.100...0.999 In (step 0.001 In) 1.00...9.99 In (step 0.01 In) 10.0...40.0 In (step 0.1 In) I>>def Operating time (t>>def) 0.03...10.00 s (step 0.01 s) Inverse time 50/51 Second threshold inverse time (I>>inv) 0.100...20.00 In 0.100...0.999 In (step 0.001 In) 1.00...20.00 In (step 0.01 In) I>>inv within CLP (ICLP>>inv) 0.100...20.00 In 0.100...0.999 In (step 0.001 In) 1.00...20.00 In (step 0.01 In) I>>inv Operating time (t>>inv) 0.03...10.00 s (step 0.01 s) I>>> Element I CLP>>> Activation time (tCLP>>>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) I>>> Reset time delay (t>>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) Definite time 50/51 Third threshold definite time (I>>>def) 0.100...40.00 In 0.100...0.999 In (step 0.001 In) 1.00...9.99 In (step 0.01 In) 10.0...40.0 In (step 0.1 In) Note 1 Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · t>inv / [(I/I>inv)0.02 - 1] Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · t>inv / [(I/I>inv) - 1] Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · t>inv / [(I/I>inv)2 - 1] Moderately Inverse (ANSI/IEEE type MI): t = t>inv · {0.01 / [(I/I>inv)0.02 - 1] + 0.023} Very Inverse (ANSI/IEEE type VI): t = t>inv · {3.922 / [(I/I>inv)2 - 1] + 0.098} Extremely Inverse (ANSI/IEEE type EI): t = t>inv · {5.64 / [(I/I>inv)2 - 1] + 0.024} I-squared-t (I 2t = K): t = 16 · t>inv / (I/I>inv)2 Electromechanical (EM): t = 0.28 · t>inv / [-0.236 · (I/I>inv)-1+ 0.339] RECTIFIER (RI): t = 2351 · t>inv / [(I/I>inv)5.6- 1] t: operate time I>inv: pickup value t>inv: operate time setting Asymptotic reference value: 1.1 I>nv Minimum operate time: 0.1 s Equation is valid for 1.1 ≤ I/I>inv ≤ 20, with I>inv pickup ≥ 2.5 In, the upper limit is 50 In

I>>>def within CLP (ICLP>>>def) 0.100...40.00 In 0.100...0.999 In (step 0.001 In) 1.00...9.99 In (step 0.01 In) 10.0...40.0 In (step 0.1 In) I>>>def Operating time (t>>>def) 0.03...10.00 s (step 0.01 s) Pickup time ≤ 0.03 s Dropout ratio 0.95...0.98 Dropout time ≤ 0.05 s Overshoot time 0.03 s Pickup accuracy ± 0.5% with 0.1 In, ± 0.2% with 1 In Operate time accuracy 5% or ± 10 ms � Residual overcurrent - 50N/51N IE> Element IE> Curve type (IE>Curve) DEFINITE IEC/BS A, B, C ANSI/IEEE MI, VI, EI - EM IECLP> Activation time (tECLP>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) IE> Reset time delay (tE>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) Definite time 50N/51N First threshold definite time (IE>def) 0.002...10.00 IEn 0.002...0.999 IEn (step 0.001 IEn) 1.00...10.00 IEn (step 0.01 IEn) IE>def within CLP (IECLP>def) 0.002...10.00 IEn 0.002...0.999 IEn (step 0.001 IEn) 1.00...10.00 In (step 0.01 IEn) IE>def Operating time (tE>def) 0.04...200 s 0.04...9.99 s (step 0.01 s) 10.0...99.9 s (step 0.1 s) 100...200 s (step 1 s) Inverse time[1] 50N/51N First threshold inverse time (IE>inv) 0.010...2.00 IEn 0.010...0.999 IEn (step 0.001 IEn) 1.00...2.00 IEn (step 0.01 IEn) IE>inv within CLP (IECLP>inv) 0.010...2.00 IEn 0.010...0.999 IEn (step 0.001 IEn) 1.00...2.00 IEn (step 0.01 IEn) IE>inv Operating time (tE>inv) 0.02...60.0 s 0.02...9.99 s (step 0.01 s) 10.0...60.0 s (step 0.1 s) IE>> Element IECLP>> Activation time (tECLP>>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) IE>> Reset time delay (tE>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) Definite time 50N/51N Second threshold definite time (IE>>def 0.002...10.00 IEn 0.002...0.999 IEn (step 0.001 IEn) 1.00...10.00 IEn (step 0.01 IEn) IE>>def within CLP (IECLP>>def) 0.002...10.00 IEn 0.002...0.999 IEn (step 0.001 IEn) 1.00...10.00 IEn (step 0.01 IEn) IE>>def Operating time (tE>>def) 0.03...10.00 s (step 0.01 s) Note 1 Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · tE>inv / [(IE/ IE>inv)0.02 - 1] Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · tE>inv / [(IE/IE>inv) - 1] Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · tE>inv / [(IE/IE>inv)2 - 1] Moderately Inverse (ANSI/IEEE type MI): t = tE>inv · {0.01 / [(IE/IE>inv)0.02 - 1] + 0.023} Very Inverse (ANSI/IEEE type VI): t = tE>inv · {3.922 / [(IE/IE>inv)2 - 1] + 0.098} Extremely Inverse (ANSI/IEEE type EI): t = tE>inv · {5.64 / [(IE/IE>inv)2 - 1] + 0.024} Electromechanical (EM): t = 0.28 · tE>inv / [-0.236 · (IE/IE>inv)-1+ 0.339] IE: residual current input t: operate time IE>inv: pickup value tE>inv: operate time setting Asymptotic reference value: 1.1 IE> Minimum operate time: 0.1 s Equation is valid for 1.1 ≤ IE/ IE>inv ≤ 20 With IE>inv pickup ≥ 0.5 IEn, the upper limit is 10 IEn

IE>>> Element IECLP>>> Activation time (tECLP>>>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) IE>>> Reset time delay (tE>>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) Definite time 50N/51N Third threshold definite time (IE>>>def) 0.002...10.00 IEn 0.002...0.999 IEn (step 0.001 IEn) 1.00...10.00 IEn (step 0.01 IEn) IE>>>def within CLP (IECLP>>>def) 0.002...10.00 IEn 0.002...0.999 IEn (step 0.001 IEn) 1.00...10.00 IEn (step 0.01 IEn) IE>>>def Operating time (tE>>>def) 0.03...10.00 s (step 0.01 s) Pickup time ≤ 0.03 s Dropout ratio 0.95...0.98 Dropout time ≤ 0.05 s Overshoot time 0.03 s Pickup accuracy ± 0.5% with 0.01 IEn, ± 0.2% with 1 IEn Operate time accuracy 5% or ± 10 ms � Residual overvoltage - 59N Common configuration: 59N Operation from 74VT external (74VText59N) ON/OFF UE> Element U> Curve type (U>Curve) DEFINITE/INVERSE[1] UE> Reset time delay (tUE>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) Definite time 59N First threshold definite time (UE>def) 0.01...0.70 UEn (step 0.01 UEn) UE>def Operating time (tUE>def) 0.07...100.0 s 0.07...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) Inverse time 59N First threshold inverse time (UE>inv) 0.01...0.50 UEn (step 0.01 UEn) UE>inv Operating time (tUE>inv) 0.10...100.0 s 0.10...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) UE>> Element UE>> Reset time delay (tUE>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) Definite time 59N Second threshold definite time (UE>>def) 0.01...0.70 UEn (step 0.01 UEn) UE>>def Operating time (tUE>>def) 0.07...100.0 s 0.07...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) Pickup time ≤ 0.03 s Dropout ratio 0.95...0.98 Dropout time ≤ 0.04 s Overshoot time 0.03 s Pickup accuracy ± 4% ± 1% UEn Operate time accuracy 5% or ± 10 ms � Directional earth fault overcurrent - 67N Common configuration: 67N Operating mode (Mode67N) I/I∙cos 67N Multiplier of threshold for insensitive zone (M) 1.5...10.0 (step 0.1) 67N Operation from 74VT external (74VText67N) OFF/Block/Not directional IED> Element IED> Curve type (IED>Curve) DEFINITE IEC/BS A, B, C, ANSI/IEEE MI, VI, EI, EM Note 1 The mathematical formula for INVERSE curve is t= (0.5 ∙ tUE>inv) / [(UE/UE>inv) - 1] t: operating time (in seconds) tUE>inv: operating time setting (referred to UE/UE>inv = 1.5 ) UE: residual input voltage (direct or calculated) UE>inv: threshold setting Asymptotic reference value: 1.1UE>inv Minimum operate time: 0.1 s Equation is valid for 1.1 ≤ UE/UE>inv ≤ 4

IEDCLP> Activation time (tEDCLP>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) IED> Reset time delay (tED>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) Definite time 67N First threshold definite time (IED>def - UED>def) Residual current pickup value 0.002...10.00 IEn 0.002...0.999 IEn (step 0.001 IEn) 1.00...10.00 IEn (step 0.01 IEn) Residual voltage pickup value 0.004...0.500 UEn (step 0.001 UEn) Characteristic angle 0...359° (step 1°) Half operating sector 1...180° (step 1°) IED>def within CLP (IEDCLP>def) 0.002...10.00 IEn 0.002...0.999 IEn (step 0.001 IEn) 1.00...10.00 IEn (step 0.01 IEn) IED>def Operating time (tED>def) 0.05...200 s 0.05...9.99 s (step 0.01 s) 10.0...99.9 s (step 0.1 s) 100...200 s (step 1 s) Inverse time[1] 67N First threshold inverse time (IED>inv - UED>inv) Residual current pickup value 0.002...2.00 IEn 0.002...0.999 IEn (step 0.001 IEn) 1.00...2.00 IEn (step 0.01 IEn) Residual voltage pickup value 0.004...0.500 UEn (step 0.001 UEn) Characteristic angle 0...359° (step 1°) Half operating sector 1...180° (step 1°) IED>inv within CLP (IEDCLP>inv) 0.002...2.00 IEn 0.002...0.999 IEn (step 0.001 IEn) 1.00...2.00 IEn (step 0.01 IEn) IED>inv Operating time (tED>inv) 0.02...60.0 s 0.02...9.99 s (step 0.01 s) 10.0...60.0 s (step 0.1 s) IED>> Element IED>> Curve type (IED>>Curve) DEFINITE IEC/BS A, B, C ANSI/IEEE MI, VI, EI, EM IEDCLP>> Activation time (tEDCLP>>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) IED>> Reset time delay (tED>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) Definite time 67N Second threshold definite time (IED>>def - UED>>def) Residual current pickup value 0.002...10.00 IEn 0.002...0.999 IEn (step 0.001 IEn) 1.00...10.00 IEn (step 0.01 IEn) Residual voltage pickup value 0.004...0.500 UEn (step 0.001 UEn) Characteristic angle 0...359° (step 1°) Half operating sector 1...180° (step 1°) IED>>def within CLP (IEDCLP>>def) 0.002...10.00 IEn 0.002...0.999 IEn (step 0.001 IEn) 1.00...10.00 IEn (step 0.01 IEn) IED>>def Operating time (tED>>def) 0.05...10.00 s (step 0.01 s) Note 1 Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · tED>inv / [(IE/IED>inv)0.02 - 1] Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · tED> inv / [(IE/IED>inv) - 1] Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · tED>inv / [(IE/IED>inv)2 - 1] Moderately Inverse (ANSI/IEEE type MI): t = tED>inv · {0.01 / [(IE/IED>inv)0.02 - 1] + 0.023} Very Inverse (ANSI/IEEE type VI): t = tED>inv · {3.922 / [(IE/IED>inv)2 - 1] + 0.098} Extremely Inverse (ANSI/IEEE type EI): t = tED>inv · {5.64 / [(IE/IED>inv)2 - 1] + 0.024} Electromechanical (EM): t = 0.28 · tED>inv / [-0.236 · (IE/IED>inv)-1+ 0.339] t: operate time IED>inv: pickup value tED>inv: operate time setting Asymptotic reference value: 1.1 IED>inv Minimum operate time: 0.1 s Equation is valid for 1.1 ≤ IE/IED>inv ≤ 20 With IED>inv pickup ≥ 0.5 In, the upper limit is 10 IEn

Inverse time[1] 67N Second threshold inverse time (IED>>inv - UED>>inv) Residual current pickup value 0.002...2.00 IEn 0.002...0.999 IEn (step 0.001 IEn) 1.00...2.00 IEn (step 0.01 IEn) Residual voltage pickup value 0.004...0.500 UEn (step 0.001 UEn) Characteristic angle 0...359° (step 1°) Half operating sector 1...180° (step 1°) IED>inv within CLP (IEDCLP>>inv) 0.002...2.00 IEn 0.002...0.999 IEn (step 0.001 IEn) 1.00...2.00 IEn (step 0.01 IEn) IED>>inv Operating time (tED>>inv) 0.02...10.00 s (step 0.01 s) IED>>> Element IEDCLP>>> Activation time (tEDCLP>>>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) IED>>> Reset time delay (tED>>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) Definite time 67N Third threshold definite time (IED>>>def - UED>>>def) Residual current pickup value 0.002...10.00 IEn 0.002...0.999 IEn (step 0.001 IEn) 1.00...10.00 IEn (step 0.01 IEn) Residual voltage pickup value 0.004...0.500 UEn (step 0.001 UEn) Characteristic angle 0...359° (step 1°) Half operating sector 1...180° (step 1°) IED>>>def within CLP (IEDCLP>>>def) 0.002...10.00 IEn 0.002...0.999 IEn (step 0.001 IEn) 1.00...10.00 IEn (step 0.01 IEn) IED>>>def Operating time (tED>>>def) 0.05...10.00 s (step 0.01 s) IED>>>> Element IEDCLP>>>> Activation time (tEDCLP>>>>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) IED>>>> Reset time delay (tED>>>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) Definite time 67N Fourth threshold definite time (IED>>>>def - UED>>>>def) Residual current pickup value 0.002...10.00 IEn 0.002...0.999 IEn (step 0.001 IEn) 1.00...10.00 IEn (step 0.01 IEn) Residual voltage pickup value 0.004...0.500 UEn (step 0.001 UEn) Characteristic angle 0...359° (step 1°) Half operating sector 1...180° (step 1°) IED>>>>def within CLP (IEDCLP>>>>def) 0.002...10.00 IEn 0.002...0.999 IEn (step 0.001 IEn) 1.00...10.00 IEn (step 0.01 IEn) IED>>>>def Operating time (tED>>>>def) 0.05...10.00 s (step 0.01 s) Pickup time ≤ 0.03 s Dropout ratio 0.95...0.98 Dropout time ≤ 0.05 s Overshoot time 0.03 s Pickup accuracy (current thresholds) ± 1% with 0.1 In, ± 0.5% with 1 In Pickup accuracy (voltage thresholds) ± 0.3% with 0.1Un, ± 0.1% with 1Un Pickup accuracy (displacements) ± 2° with 0.1 In - 0.1Un ± 0.5° with 1In - 1 Un Operate time accuracy 5% or ± 10 ms Note 1 Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · tED>inv / [(IE/IED>inv)0.02 - 1] Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · tED> inv / [(IE/IED>inv) - 1] Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · tED>inv / [(IE/IED>inv)2 - 1] Moderately Inverse (ANSI/IEEE type MI): t = tED>inv · {0.01 / [(IE/IED>inv)0.02 - 1] + 0.023} Very Inverse (ANSI/IEEE type VI): t = tED>inv · {3.922 / [(IE/IED>inv)2 - 1] + 0.098} Extremely Inverse (ANSI/IEEE type EI): t = tED>inv · {5.64 / [(IE/IED>inv)2 - 1] + 0.024} Electromechanical (EM): t = 0.28 · tED>inv / [-0.236 · (IE/IED>inv)-1+ 0.339] t: operate time IED>inv: pickup value tED>inv: operate time setting Asymptotic reference value: 1.1 IED>inv Minimum operate time: 0.1 s Equation is valid for 1.1 ≤ IE/IED>inv ≤ 20 With IED>inv pickup ≥ 0.5 In, the upper limit is 10 IEn

� Breaker failure - BF BF Phase current threshold (IBF>) 0.05...1.00 In (step 0.01 In) BF Residual current threshold (IEBF>) 0.01...2.00 In (step 0.01 IEn) BF Time delay(tBF) 0.06...10.00 s (step 0.01 s) Dropout ratio 0.95...0.98 Dropout time ≤ 0.05 s IBF>Pickup accuracy ± 0.5% con 0.1 InL ± 0.2% con 1 InL IEBF>Pickup accuracy ± 0.5% con 0.01 IEn ± 0.2% con 1 IEn Operate time accuracy 5% or ± 10 ms

3.8 CONTROL AND MONITORING � Second harmonic restraint - 2ndh-REST Second harmonic restraint threshold (I2ndh>) 10...50 % (step 1 %) I2ndh> reset time delay (t2ndh>RES) 0...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s) Pickup accuracy I2ndh> ± 4% ± 1% In Operate time accuracy 5% or ± 10 ms � Trip Circuit Supervision - 74TCS Operate time: • One binary input supervision 40 s • Two binary inputs supervision 2 s Reset time delay: • One binary input supervision 6 s • Two binary inputs supervision 0.6 s � Selective block - BLOCK2 Selective block IN: • BLIN1 Selective block operating mode (ModeBLIN1) OFF-ON IPh/IE-ON IPh-ON IE • BLIN maximum activation time for phase protections (tB-IPh) 0.10...10.00 s (step 0.01 s) • BLIN maximum activation time for ground protections (tB-IE) 0.10...10.00 s (step 0.01 s) Selective block OUT: • BLOUT1 Selective block operating mode (ModeBLOUT1) OFF-ON IPh/IE-ON IPh-ON IE • BLOUT Dropout time for phase protections (tF-IPh) 0.00...1.00 s (step 0.01 s) • BLOUT Dropout time for ground protections (tF-IE) 0.00...1.00 s (step 0.01 s) • BLOUT Dropout time for ground and phase protections (tF-IPh/IE) 0.00...1.00 s (step 0.01 s) � Internal selective block - BLOCK4 Output internal selective block dropout time for phase protections (tFI-IPh) 0.00...10.00 s (step 0.01 s) Output internal selective block dropout time for ground protections (tFI-IE) 0.00...10.00 s (step 0.01 s) � Circuit Breaker supervision Circuit breaker diagnostic Number of CB trips threshold (N.Open) 0...10000 (step 1) Cumulative CB tripping currents threshold (SumI) 0....5000 In (step 1 In) Cumulative CB tripping I2t threshold (SumI^2t) 0....5000 (In)2∙s (step 1 In2∙s) Circuit Breaker opening time for I^2t calculation (tbreak) 0.05...1.00 s (step 0.01 s) Circuit Breaker maximum allowed opening time (tbreak>) 0.05...1.00 s (step 0.01 s) � CT supervision - 74CT 74CT Threshold (S<) 0.10...0.95 (step 0.01) 74CT Overcurrent threshold (I*) 0.10...1.00 In (step 0.01 In) S< Operating time delay (tS<) 0.03...200 s 0.03...9.99 s (step 0.01 s) 10.0...99.9 s (step 0.1 s) 100...200 s (step 1 s) Dropout ratio for the I* pickup 0.95...0.98 Dropout time ≤ 0.05 s Pickup accuracy S< ± 1% with 0.1 In , ± 0.5% with 1 In Pickup accuracy I* ± 0.5% with 0.1 In , ± 0.2% with 1 In Operate time accuracy 5% or ± 10 ms � Pilot wire diagnostic • BLOUT1 Diagnostic pulse period (PulseBLOUT1) OFF-0.1-1-5-10-60-120 s • BLIN1 Diagnostic pulse control time interval (PulseBLIN1) OFF-0.1-1-5-10-60-120 s � Demand measures • Fix on demand period (tFIX) 1...60 min (step 1 min) • Rolling on demand period (tROL) 1...60 min (step 1 min) • Number of cycles for rolling on demand (N.ROL) 1...24 (step 1)

� Oscillography (DFR))[1] Format COMTRADE Recording mode circular Sampling rate 24 samples / cycle Trigger setup: • Pre-trigger time 0.05...1.00 s (step 0.01 s) • Post-trigger time 0.05...60.00 s (step 0.05 s) Set sample channels: iL1, iL2, iL3, iE, uE Set analog channels: Analog 1...Analog 12 Frequency,IL1, IL2, IL3, IE, PhiE, IL1-2nd, IL2-2nd, IL3-2nd, I-2nd /IL T1...T8[2] Set digital channels: Digital 1...Digital 12 K1... K6, K7...K10, IN1, IN2, IN3...IN42[3] � PLC (Programmable Logic Controller)[4] Reference standard IEC 61131-3 Language[5] IL (Instruction List) Inputs: Binary inputs IN1, IN2 on board IN8...IN10 with MRI module IN11...IN26 with one MID16 module IN27...IN42 with two MID16 modules Delayed binary inputsi[6] IN1, IN2 on board IN8...IN10 with MRI module IN11...IN26 with one MID16 module IN27...IN42 with two MID16 modules Start (all elements) Start I>, Start I>>,...etc Trip (all elements) Trip I>, Trip I>>,...etc Measures IL1, IL2,...ecc Temperature Pt100 Block inputs BLK2IN-Iph, BLK2IN-IE,...etc Outputs: Relays K11...K6 on board K7...K10 with MRI module LEDs START, TRIP, L1...L6 on board L7...L10 with MRI module Block outputs BLK2OUT-Iph, BLK2OUT-IE,...etc Current converter DAC Note 1 For the DFR function a licence is required; call Thytronic for purchasing. Note 2 The measures of temperature are available only when the MPT module on Thybus is enabled (eigth Pt100 inputs) Note 3 Output relay K7...K10 and binary input IN3...IN42 states are available only when the concerning I/O circuits are implemented (MRI and MID16 modules on Thybus) Note 4 For the PLC function a licence is required; call Thytronic for purchasing. Note5 With ThyVisor V3.4.3 release and compiler IEC 61131-3 V1.2.7 only the IL language is implemented (Instruction List); other languages, according with IEC 61131 standard (ST (Structured Text)), LD (Ladder Diagram), FBD (Function Block Diagram), SFC (Sequential Functional Chart), will be available soon Note 6 The input state is acquired downstream the tON and tOFF timers

3.9 METERING More data are available inside Section 5 - MEASURES, LOGIC STATES AND COUNTERS � Accuracy (type tests) MEASURE Reference values Accuracy Reference values Accuracy Phase current 0.1 In 0.2% 1 In 0.03% Measured residual current 0.01 IEn 0.3% 1 IEn 0.02% Measured residual voltage 0.01 UEn 0.02% 0.1 UEn 0.02% Frequency 0.02 Un 3 mHz 1 Un 2 mHz Phase 0.002 IEn - 0.004 UEn 1.5° 0.005 IEn - 0.01 UEn - 0.1 IEn - 0.5 UEn 0.2° Positive/Negative sequence current I1 = 0.5 In 0.5% I1 = 1 In 0.5% Pickup and operate time 1.5 x setting for fist element 5% ± 10 ms 2.5 x setting for other elements 5% ± 10 ms � Measures Direct Frequency (f ) RMS value of fundamental component for phase currents (IL1, IL2, IL3) RMS value of fundamental component for residual current (IE) RMS value of fundamental component for residual voltage (UE) Calculated Thermal image (DTheta) Maximum current between IL1-IL2-IL3 (ILmax) Minimum current between IL1-IL2-IL3 (ILmin) Average current between IL1-IL2-IL3 (IL) Sequence Positive sequence current (I1) Negative sequence current (I2) Negative sequence current/positive sequence current ratio (I2/I1) 2nd harmonic Second harmonic phase currents (IL1-2nd, IL2-2nd, IL3-2nd) Maximum of the second harmonic phase currents/ fundamental component percentage ratio I-2nd /IL (I-2nd /IL) 3rd harmonic Third harmonic phase currents (IL1-3rd, IL2-3rd, IL3-3rd) Third harmonic of residual current (IE-3rd) Third harmonic of residual voltage (UE-3rd) 4th harmonic Fourth harmonic phase currents (IL1-4th, IL2-4th, IL3-4th) 5th harmonic Fifth harmonic phase currents (IL1-5th, IL2-5th, IL3-5th) Demand phase Phase fixed currents demand (IL1FIX, IL2FIX, IL3FIX) Phase rolling currents demand (IL1ROL, IL2ROL, IL3ROL) Phase peak currents demand (IL1MAX, IL2MAX, IL3MAX) Phase minimum currents demand (IL1MIN, IL2MIN, IL3MIN) PT100 [1] Temperature PT1 (T1) Temperature PT2 (T2) Temperature PT3 (T3) Temperature PT4 (T4) Temperature PT5 (T5) Temperature PT6 (T6) Temperature PT7 (T7) Temperature PT8 (T8) Note 1 The measures of temperature are available only when the MPT module on Thybus is enabled (eigth Pt100 inputs)

4 F U N C T I O N C H A R A C T E R I S T I C S 4 F U N C T I O N C H A R A C T E R I S T I C S 4.1 HARDWARE DESCRIPTION The following figure illustrates the basic structure of the relay hw.ai RTC EEprom Flash SRam SRam SPI CPU ETHERNET CPU BOARD POWER SUPPLY BOARD INPUT MODULE DSP DUAL PORT 1A/5A ≈ ≈ ≈ ≈ EEprom Thybus RS485 RELAYS K1...K6 Output contacts USB MMI LCD LEDs BINARY INPUTS IN1 Input IN2 IN3 IN4 IN4 BLOCK I/O BLKIN Input BLKOUT POWER SUPPLY +5 V +10 V 0 V +24 V -10 V POWER FAIL RESET Uaux

Printed boards hold the circuit components arranged according to a modular allocation of the main functions. Power supply board All the components necessary for conversion and stabilization functions are present. Two versions are envisaged suited to the input ranges 24...48 V and 115...230 V. The circuit provides stabilized voltages of +10 V and -10 V, required for the analogue measurement, +24 V for relays and +5 V for supplying the digital circuits. The circuit board additionally comprises: INPUT CIRCUITS: • Five binary input circuits, • One block input circuit (BLIN1). The logical input circuits and the block circuits include photo-couplers which provide for galvanic separation. OUTPUT CIRCUITS: • One block output circuit (BLOUT 1), • Six output relays (k1...K6). CPU board This circuit board contains all the circuits necessary for performing the analogue and digital pro- cessing of the signals. Analog processing The following are envisaged: • Anti aliasing filter circuits, • Amplifier circuits for conditioning the input signals, • Reference voltage adjustment circuits for the measurement A/D converter. The Pro-n relays use a DSP processor operating at 40 MHz; it performs all the processing on the analogue signals and furthermore coordinates management of the TX-RX signals to the CPU. The input currents are sampled at a frequency of 24 samples per period by means of a dual conver- sion system which allows the attainment of information pertaining to polarity and amplitude with high resolution. The measurement criterion allows precise measurement of even those signals having a unidirectional component, such as transient currents with overlapping exponential, which typically appear during faults. The circuit board also houses the output relays with the corresponding command and control cir- cuits, communication circuits, buttons, LCD display, LEDs and the key switch. CPU A 32 bit CPU is provided. The following are envisaged: • Real Time Clock circuits with oscillator and super capacitor, • USB communication port, • RS485 communication port, • Thybus communication circuits for external modules and MMI board, • Network communication circuits (optional Ethernet). Memories: • SRam: high speed static memory, used for data and cache, • Flash memory: used for fw storage and upgrade, • EEprom memory: used for calibration data storage, • Dual port Ram for data transfer between CPU and DSP. Input board • Three CTs committed for phase currents acquisition, • One CT committed for residual current acquisition. The input circuits are suitable for 1 A or 5 A external CTs.[1] • Three VTs committed for phase voltages acquisition, • One VT committed for residual voltage acquisition. MMI (keyboard, LED and display) The MMI module (Man Machine Interface) includes: • An eight keys 8 keyboard, • a backlight LCD display, • Eight signalling LEDs, The removable plug allows separation of the MMI module for free access to the CPU board when DIP-switch setting is required. Note 1 The phase and residual nominal currents must be adjusted by means dip-switch.

4.2 SOFTWARE DESCRIPTION The program which handles operation of the Pro-N relays is made up of three fundamental elements shown in the following block diagram. Base software Single modules are application independent with modular and scalable structure. The system can be assimilated to the PC BIOS (Basic Input-Output System); three main function are provided: • Start-up test execution; • RAM loading of the operating system; • Provide a suitable interface to access the relay hardware. Real-time operating system An embedded operative system is employed suitable for real-time applications (RTOS). A multithread preemptive structure is able to menage several task with multiple priority levels . The kernel represents the nucleus of the system: it includes the processing functions closest to the electronic circuits. In addition, the kernel manages a service communication protocol known as Basic Protocol (BP). Task The task (process e thread) are the base components. Example are: • Keyboard management • RTC (Real Time Clock) updating • RAM/EEPROM updating • Diagnostic • Input acquisition • Output relay management • MMI • I/O updating • DSP data processing sw.ai KEYS PC com Sync Binary inputs Output relays LEDs Fast devices EEPROM Slow devices RTC refresh EEPROM update Diagnostic DSP MMI task Oscillography Measures Drivers sampling RTOS timer SIMBOLOGIA Processo (task) Libreria funzionale (Drivers) Timer del sistema operativo Interrupt RTOS timer I/O I/O boards KEYS RTOS timer RAM/EPROM memory check RTOS timer RTOS timer DATA BASE TIMER Ethernet USB RS485 Counters Events Data Base Messages Thybus +

DSP Firmware By means of Discrete Fourier Transform calculation, based on 24 samples/period, information is de- duced in relation to the amplitude and phase of all the current measurements; these are constantly updated and at the disposal of all the protection and control application algorithms. Drivers Inside the driver library, all the specialized module for protection and control function are provided. They are the link from kernel and application layer. Examples are: • Data base management • PC messages management • TCP/IP messages management • Basic Protocol management • Counter management • Event and fault management • Measuring management • Oscillography management Application Software The software acts the specialization of the base system; all protective and control elements are inside it. The main modules ate: • Diagnostic function for application layer, • Input management (binary inputs), • Protective functions, • Event recording, • Output management (LEDs and relays) Each element (Kernel, Drivers and Application) may, in turn, be split into modules: Base protocol (kernel) The module known as the Basic Protocol (BP) manages the service communication between the kernel and the other modules through the communication buses with the following services: • Data and information exchange, • Calibration, • Upgrade fw DSP, • Upgrade application sw Communication (drivers) The ModBus TCP/IP protocol, with ethernet interface, the ModBus RTU, IEC 60870-5-103 and DNP3 protocol over RS485 interface and the ModBus RTU USB for ThyVisor are provided. MMI (drivers) The drivers deal with the menu management (MMi and/or communication messages). Data Base The data base is split into three main sections: • RAM for volatile data, • REE and PAR for non volatile data. Self test (Application) The main hw and sw function are permanently verified in background; no additional delay are intro- duced. In particular the following function are tested: • Reference voltages; • Output relays; • Sw flow with execution time monitoring; • REE and PAR data congruence. Development tools (Builder) For the development of the project, a CASE instrument has been developed, responsible for the opti- mized production of software code for the management of collaboration, the database and the MMI data and the Xml files used for communication. The automatic code generation criteria ensures the quality of the result in terms of the reusability, verifiability and maintainability of the software life cycle.

4.3 I/O DESCRIPTION Metering inputs The following input are provided: • Three phase current inputs. • One residual current input. • The nominal currents are independently adjustable at 1 A or 5 A through DIP-switches. • One residual voltage input, with programmable nominal voltage within range 50...130 V (UER=100 V). The input circuits are appropriately dimensioned in order to withstand the currents which arise when a fault occurs, both in transient and steady state condition. Signal processing Various processing levels are involved: • Acquisition (base level). • Direct measures of physical channels (first level). • Calculated measures (second level). • Derived (third level). The measures concerning a level are based on data worked out in the previous level. For each level the required resources concerning the priority for tasks (conditioning circuits, DSP and CPU) are on hand. ACQUISITION (base level) The input signals are sampled 24 times per period: - iL1...iL3 Phase current instantaneous values - iE Residual current instantaneous value - uE Residual voltage instantaneous value From the sampled quantities, several measures are computed for protection, monitoring and meter- ing purposes. sensori.ai NA30 3 ingressi correnti di fase 1 ingresso di corrente residua 1 ingresso di tensione residua acquisizione.ai ACQUISITION INSTANTANEOUS MEASURES ≈

• Direct • Calculated • Phase • Sequence • Harmonic • Demand Direct • Frequency. The measure of period is taken on the input phase currents. Samples are processed by means DFT (Discrete Fourier Transform) algorithm and the phase and amplitude of fundamental are computed: • Phase currents IL1, IL2, IL3 • Residual current IE • Residual voltage UE Calculated By means vector addition of direct measures the following are calculated (RMS value of fundamen- tal components): • Thermal image ∆θ F.ai (Hz) ACQUISITION IL1 IL2 CT IL3 iL1 iL2 ≈ ≈ iL3 ≈ f T IL1.ai (In) ACQUISITION iL1, iL2, iL3 DFT CT ≈ IL1, IL2, IL3 IE.ai (IEn) ACQUISITION iE DFT CT ≈ IE UE.ai (UEn) (UEn) ACQUISITION uE DFT (fundamental) VT ≈ UE DFT (3rd harmonic) UE3H Theta.ai IL1 I2 I2 = (IL1+ e-j120°IL2+ e+j120°IL3) I1 = (IL1+ e+j120°IL2+ e-j120°IL3) IL3 IL2 I1 Ith = √(I12+ K22∙I22) ∆θ (∆θB) 2 d∆θ dt IB Ith ∆θ T+ T+ ( ) + =

Phase • Displacement angle of the residual current respect the corresponding measured residual voltage (positive with current in lagging direction in respect to voltage): PhiE, Sequence • Fundamental RMS positive sequence current: I1 • Fundamental RMS negative sequence current: I2 Demand • Fixed demand (IL1FIX, IL2FIX, IL3FIX, ±PFIX, ±QFIX) Inside an adjustable time interval tFIX, an average magnitude is calculated for phase currents IL1, IL2, IL3, active power ±P and reactive power ±Q of measures taken every second. The average values are stored at the end of the same time interval. • Rolling demand (IL1ROL, IL2ROL, IL3ROL, ±PROL, ±QROL) Inside an adjustable time interval NROL∙tROL , an average magnitude is calculated for phase currents IL1, IL2, IL3, active power ±P and reactive power ±Q of measures taken every second, where tROL is the length of any time subinterval and NROL is the number of the time intervals. The average values are stored at the end of the same time subinterval. • Peak (IL1MAX, IL2MAX, IL3MAX, ±PMAX, ±QMAX) Inside an adjustable time interval tROL, the maximum magnitude is calculated for phase currents IL1, IL2, IL3, active power ±P and reactive power ±Q of measures taken every second. The average values are stored at the end of the same time interval tROL (Rolling demand common parameter). Fase.ai PhiE (° ) ϕE = ∠IE - ∠UE UE IE I1-I2.ai IL1 I2 I2 = (IL1+ e-j120°IL2+ e+j120°IL3) / 3 I1 = (IL1+ e+j120°IL2+ e-j120°IL3) / 3 IL3 IL2 (In) I1 (In) e-j120°= - j √3 1 2 2 - e+j120°= - j √3 1 2 2 + Fix-Demand.ai 1s IL1FIX, IL2FIX,IL3FIX tFIX (In) IL2 IL1 IL3 ILxFIX ILxn tFIX ∙ 60 tFIX ∙ 60 n=1 ∑ 1 tFIX tFIX tFIX Rol-Demand.ai Rolling demand example with NROL=4 IL1ROL IL2ROL IL3ROL (In) IL2 IL1 IL3 0 1 2 3 4 5 1s tROL tROL NROL tROL tROL tROL 6 tROL Average inside subinterval tROL ILxROL= ILxk tROL∙60 tR OL∙60 k=1 ∑ NR OL n=1 n ∑ 1 NROL 1 Max-Demand.ai Maximum value of averages inside time interval tROL Average inside time interval tROL IL1MA X IL2MA X IL3MA X (In) IL2 IL1 IL3 1s tROL tROL tROL tROL tROL tROL ILxMA X= MAX ILxn tROL∙60 tR OL∙60 n=1 ∑ 1

• Minimum (IL1MIN, IL2MIN, IL3MIN, ±PMIN, ±QMIN) Inside an adjustable time interval tROL, the minimum magnitude is calculated for phase currents IL1, IL2, IL3, active power ±P and reactive power ±Q of measures taken every second. The average values are stored at the end of the same time interval tROL (Rolling demand common parameter). Use of over-described measures is shown in the following tables. Conventions Phase rotation direction The conventional rotation direction for the current phasors is counter-clockwise. Cyclic phase sequence order For three phase rotating currents, a direct cyclic sequence is defined when the three phases are L1, L2, L3 ordered, while an inverse cyclic sequence is defined when the three phases are L1, L3, L2 ordered. Min-Demand.ai Minimum value of averaged inside time intervaltROL Average inside time intervaltROL Reset IL1MIN IL2MIN IL3MIN (In) IL2 IL1 IL3 1s tROL tROL tROL tROL tROL tROL ILxMIN= MIN ILxn tROL∙60 tR OL∙60 n=1 ∑ 1 fasori.ai fasori1.ai UL1 UL3 UL2 UL1 UL2 UL3 Direct sequence cyclic order Inverse sequence cyclic order

Use of measured values Usage of measured values for protection, control and monitoring f iL1, iL2, iL3 IL1, IL2, IL3 IL1-2nd, IL2-2nd, IL3-2nd iE IE I1 I2 uE UE Temperature (PT1....PT8) Binary input INx START Relay K1...K6 TRIP) Relay K1...K6 START LEDs L1...L5 TRIP LEDs L1...L5 Selective block input BLIN1 Selective block output BLOUT1 Cold Load Pickup (CLP) Seconda harmonic restraint Logic block (Block1) Logic selectivity (Block2) Internal logic selectivity (Block4) PROTECTIONS Thermometric probes - 26  Thermal image - 49               Phase overcurrent - 50/51             Residual overcurrent - 50N/51N             Residual overvoltage - 59N           Directional earth fault overcurrent - 67N             Breaker failure - BF         CONTROL & MONITORING CT Monitoring (74CT)   Trip Circuit Supervision TCS)  Second harminic restraint - 2NDH-REST  Logic block (Block1)  Selective block (Block2)    Internal Selective block (Block4)  Self-test       Functions state        Counters Inputs state  Selective block state       Outputs state            MEASURES Frequency  Phase currents  Residual current  Inverse sequence current  Direct sequence current  Thermal image  Residual voltage  UE - IE Displacement   Temperature (Pt100 with MPT module)  EVENT RECORDER Event 0      Event 1      Event ...      Event 299      FAULT RECORDER Fault 0         Fault 1         Fault ...         Fault 19         OSCILLOGRAPY Record 1              Record 2              Record ...             

Binary inputs Two binary inputs are available. The dry inputs must be powered with an external voltage, (usually the auxiliary power supply). The connections are shown in the schematic diagrams. The following settings can be used to configure each input: • Logic Active-ON (activated when powered), or Active-OFF (activated when power is turned off). • ON Timer (OFF-to-ON time delay) and OFF Timer (ON-to-OFF time delay). • Binary input allocation. Adjustable debounce timer allows any transient to decay avoiding false activation of the input; the positive transition is acquired if the input is permanently high for a time interval longer than the tON setting delay; similarly for the negative transitions, the negative transition is acquired if the input is permanently high for a time interval longer than the tOFF setting delay. In the above shown diagram, INTERNAL STATE represents the logical state of the binary input used in the following processing. Each binary input may be matched to one of the following default functions. FUNZIONI Binary inputs IN1 IN2 IN3 IN4 IN5 Reset LEDs      Set profile (switching setting A and B)      Fault trigger (fault recording)      Block2 IPh/IE (selective block from phase and/or ground elements)      Block2 IPh (selective block from phase elements)      Block2 IE (selective block from ground elements)      Block1 (logic block)      TCS1 (Trip Circuit Supervision)      TCS2 (Trip Circuit Supervision)      Trip ProtExt (trip from external protection relays)      Reset counters      Reset CB Monitor (clear CB monitoring data)      52a (CB auxiliary contact)      52b (CB auxiliary contact)      Open CB      Close CB      Preset DTheta (thermal image preset)      Remote trip      Reset on demand measures      74VT ext. (74VT from external protection relays)      BINARY INPUT INTERNAL STATE tON tON tOFF tOFF t binary-timers.ai

Reset LEDs If the element tripped have gone back to rest condition, the latched LEDs and/or relays may be reset. Set profile Inside Pro-N devices, two independent setting profiles (A and B) are available. Whereas different settings are required, they are made in the setting profiles and stored in the non volatile memory of relay. Applicable setting profile is activated usually via a binary input; when the programmed input is activated, the profile B becomes operative as a replacement for the default profile A.[1] Fault trigger When the programmed input is activated, a trigger is issued for fault record SFR). Data storing takes place with the same procedure resulting from a trip of any protective elements Note 1 To enable the profile switching the “Input-selected” parameter must be set inside the “Profile selection” submenu. If multiple setting groups are not required, Group A is the default selection Reset-led.ai TRIPPING MATRIX (LED+RELAYS) ≥ ≥ & & Set (ON≡turn on LED/relay) S Set-Reset latch R Reset (ON≡turn off LED/relay) Reset LEDs Binary input allocation for reset signalling (LEDs) T 0 INx t ON T 0 n.o. n.c. INx tON Logic INx tOFF INx t OFF Binary input INx (x=1,...5) Switch-profile.ai (A, B, from binary input) OFF≡Profile A, ON≡Profile B Binary input allocation for switching of setting profiles Profile A Profile B Profile A Profile selection Profile B Set profile T 0 INx t ON T 0 n.o. n.c. INx tON Logic INx tOFF INx t OFF Binary input INx (x=1,... 5) Trigger-faults.ai Binary input allocation for fault recorder trigger Fault trigger T 0 INx t ON T 0 n.o. n.c. INx tON Logic INx tOFF INx t OFF Binary input INx (x=1,...5) Fault recording Protection element IL1->IL1r IL2->IL2r ..... DTheta->DTheta-r Inputs Outputs Fault cause info ≥1

Block2 IPh/IE A change in status of a binary input effects a block[1] common for the following phase and ground protective elements: • I>, I>> and I>>> (50/51), • DthAL1, DthAL2 and Dth (49), • IPD>, IPD>>, IPD>>> and IPD>>>> (67), and ground fault: • IE>, IE>> and IE>>> (50N/51N), • IED>, IED>>, IED>>> and IE>>>> (67N), The application of the IN1 and IN2 binary inputs for the acquisition of Block2 (selective block) com- ing from external protection relays is shown in the following figure (one phase overcurrent and one phase and residual overcurrent protection). Block2 IPh A change in status of a binary input effects a block[2] for the following phase protective elements: • I>, I>> and I>>> (50/51), DthAL1, DthAL2 and Dth> (49), IPD>, IPD >>, IPD >>> and IPD >>>> (67) Block2 IE A change in status of a binary input effects a block[1] for the following earth protective elements: • IE>, IE>> and IE>>> (50N/51N), IED>, IED>>, IED>>> and IED>>>> (67N). Block1 A change in status of a binary input effects a block for a length of time equal to the activation of the input[3]; the element pickup that wish be blocked must be enabled (the Block1 parameter must be set to ON in the concerning menu).[4] The application of the IN1 binary input for the acquisition of the Block1 (logic block) coming from external signal is shown in the following figure; in the example the block signal is ORed with Block2 (selective block) to block the generic (xxx) element. Note 1 The exhaustive treatment of the Block 2 function is described in the “Logic selectivity” paragraph. Note 2 The exhaustive treatment of the Block 2 function is described in the “Logic selectivity” paragraph. The application of the inputs for the acquisition of Block2 (selective block) for Phase (Block2 Iph) and earth protective functions (Block2 IE) is similar to that illustrated in the scheme concerning the Block2 IphIIE Note 3 Unlike the Block2 (selective block), that houses a safety logic founded on programmable timers, the Block1 (logic block) keeps block of the protection for the whole time when the input is active. Note 4 The activation of one binary input produces indiscriminately a block of all protective elements programmed for being blocked from Block1 ≥1 ≥1 ≥1 Block2IPh/IE T 0 tB-Iph BlockIph-Ie.ai Binary input allocation for logic selectivity (Block2) tB-Iph tB-IE xxxxx Trip Block2 Block2 input enable (ON≡Enable) & Block2 IN towards reset timer IPh Block2 input IE Block2 input Block2 IN diagnostic Block2 input FROM ANY PROTECTIONS FROM OVERCURRENT PROTECTIONS T 0 tB-IE IPh/IE Block2 Binary input INx (x=1,... 5) T 0 Logic IN2 t ON INx t ON IN2 t OFF T 0 n.o. n.c. INx t OFF FROM EARTH FAULT PROTECTIONS Block1.ai xxxx Block1 Enable (ON≡Enable) Block1 input (ON≡Block) Block1 from Block2 (ON≡Block) & Block1 Block1 Binary input INx (x=1,... 5) Binary input allocation for logic block (Block1) Blocking T 0 IN1 t ON T 0 n.o. n.c. IN1 tON Logic IN1 tOFF IN1 t OFF ≥1

TCS1 and TCS2 Trip Circuit Supervision. Supervision with one or two binary input can be performed. The exhaustive treatment of the TCS function is described in the concerning paragraph. Trip ProtExt The binary input detects a trip coming from an external protective relay: the information is available for the breaker failure function (BF). Reset counters A change in status of a binary input effects a reset of all start/trip partial counters.[1] Reset CB Monitor A change in status of a binary input effects a reset of all counters concerning the circuit breaker diagnostic: • Breaking Sum phase IL1, IL2, IL3 • Breaking SumI2t phase IL1, IL2, IL3 • CB Open counter 52a-52b The CB position can be acquired by means of binary inputs connected to the auxiliary contacts: the information is used in the following functions: • CB position (open-closed) • CB diagnostic (N. of operations, trip time) • Breaker Failure (BF) Note 1 The reset of the total counters is practicable by means ThyVisor command with Session Level 1 (available with password) TCS2.ai TRIP +UAUX Trip Circuit Supervision - 74TCS with two binary inputs -UAUX 52a 52b 52 TCS1 TCS2 74TCS logic 74TCS logic Binary input INx (x=1,... 5) T 0 IN1 t ON 0 n.o. n.c. IN1 tON Logic IN1 tOFF IN1 t OFF Binary input INx (x=1,... 5) T 0 IN1 t ON 0 n.o. n.c. IN1 tON Logic IN1 tOFF IN1 t OFF ExtProt.ai Breaker failure (BF) +UAUX -UAUX IN- IN+ Trip ProtExt Binary input INx (x=1,... 5) T 0 IN1 t ON T 0 n.o. n.c. IN1 tON Logic IN1 tOFF IN1 t OFF Binary input allocation for trip acquisition from external protection device CB-pos.ai CB position CB diagnostic Breaker failure (BF) 74VT 52a 52 52b +UAUX -UAUX IN- IN+ 52a IN- IN+ 52b Binary input INx (x=1,... 5) T 0 IN1 t ON T 0 n.o. n.c. IN1 tON Logic IN1 tOFF IN1 t OFF Binary input INx (x=1,... 5) T 0 IN2 t ON T 0 n.o. n.c. IN2 tON Logic IN2 tOFF IN2 t OFF Binary input allocation for CB state acquisition

Open CB Close CB The external acquisition of remote commands allows to drive CB remotely. Preset DTheta The input activation presets the thermal image (49). The preset value can be adjusted by means the DθIN setting. The thermal image is initialized at the DθIN value when the device is powered or when the binary input become active. Remote trip The input activation drives an expressly programmed output relay. Reset demand measures The input activation make a reset of all demand measures. 74TV ext The external acquisition of 74TV allows to block or to change the operating mode of protective el- ements where the residual voltage is employed; the information is available for residual voltage protective elements (59N and 67N protections) that may operate inadvertently when an event cause a loss of one or more voltages. CB-com.ai OPEN Command CLOSE Command +UAUX +UAUX -UAUX IN- IN+ IN- IN+ Binary input INx (x=1,... 5) T 0 IN1 t ON T 0 n.o. n.c. IN1 tON Logic Open CB Close CB IN1 tOFF IN1 t OFF Binary input INx (x=1,... 5) T 0 IN2 t ON T 0 n.o. n.c. IN2 tON Logic IN2 tOFF IN2 t OFF Binary input allocation for CB remote command TRIPPING MATRIX (LED+RELAYS) -UAUX -UAUX 52 52a O I 52b inhit-theta.ai t = T+·ln{[(Ith/IB)2-DθP/DθB]/[(Ith/IB)2-1.2] DθP = DθIN Binary input allocationfor thernal image preset (49) +UAUX -UAUX IN+ IN- PresetDTheta PresetDTheta Binary input IN1, IN2 T 0 Logic IN1 t ON IN1 t ON IN1 t OFF 0 n.o. n.c. IN1 t OFF Remote-trip.ai Remote trip +UAUX -UAUX Remote trip Binary input IN1, IN2 T 0 IN1 t ON T 0 n.o. n.c. IN1 tON Logic IN1 tOFF IN1 t OFF TRIPPING MATRIX (LED+RELAYS) Binary input allocation for remote trip

Output relays Six output relays are available (K1...K6):[1] • K1 and K2 have two changeover contacts (SPDT, type C). • K3, K4 and K5 have one make contact (SPST-NO, type A).[2] • K6 has one break contact (SPST-NC, type B).[3] Each output relay may be programmed with following operating mode: • Operation MODE (No latched, Pulse, Latched). • Logic (Energized/De-energized). To each output relay a programmable timer is matched (Minimum pulse width parameter). All parameters are available inside the Set\Relays menu. Any change to the settings can be affected at any time, also with the relay on duty, separately for each relay. Notes: • When de-energized operating mode is set, the relay remains in rest condition if no trip command is in progress. • When energized operating mode is set, the relay remains in operating condition if no trip command is in progress and the auxiliary supply is powered on. • When no-latched operating mode is set (Operation MODE No latched), the output relay reset at the end of the trip condition. To each output relay a programmable timer is matched (minimum pulse width operation). • When latched operating mode is set (Operation MODE Latched), the output relay doesn’t reset at the end of the trip condition; it stays ON until a reset command is issued (RESET key, ThyVisor or communication command). • When pulse operating mode is set (Operation MODE Pulse), the output relay reset after a tTR programmable delay regardless of the trip condition. • It is advisable to make sure that the output contact technical data are suitable for load (Nominal current, breaking capacity, make current, switching voltage,...). Matching every output relay to any protective element is freely programmable inside the Setpoints submenus according a tripping matrix structure.[4][5] Note 1 Schematic diagram are shown inside APPENDIX B1. Note 2 K3 and K4 have a common terminal (A10) Note 3 K5 and K6 have a common terminal (A13) Note 4 Matching of the output relay to the protective and control functions can be defined so that any collision from other function is avoided. All output relay are unassigned in the default setting. Note 5 Self test relay: it is advisable to plan the following settings: - Energized operating mode, - No-latched , in order that it stays ON for normal conditions and the other way round it goes OFF if any fault is detected and/or the auxiliary supply turns OFF. Input No-latched operation Latched operation Pulse operation Output relay operation Minimum pulse width Relay-operation-timers.ai t Minimum pulse width tTR tTR

FUNCTIONS RELAYS K1 K2 K3 K4 K5 K6 Self-test relay       DthAL1 Alarm relays (DthAL1-K)       DthAL2 Alarm relays (DthAL2-K)       Dth> Trip relays (Dth>-K)       I> Start relays (I>ST-K)       I> Trip relays (I>TR-K)       I>> Start relays (I>>ST-K)       I>> Trip relays (I>>TR-K)       I>>> Start relays (I>>>ST-K)       I>>> Trip relays (I>>>TR-K)       IE> Start relays (IE>ST-K)       IE> Trip relays (IE>TR-K)       IE>> Start relays (IE>>ST-K)       IE>> Trip relays (IE>>TR-K)       IE>>> Start relays (IE>>>ST-K)       IE>>> Trip relays (IE>>>TR-K)       UE> Start relays (UE> ST-K)       UE> Trip relays (UE> TR-K)       UE>> Start relays (UE>> ST-K)       UE>> Trip relays (UE>>TR-K)       IED> Start relays (IED>ST-K)       IED> Trip relays (IED>TR-K)       IED>> Start relays (IED>>ST-K)       IED>> Trip relays (IED>>TR-K)       IED>>> Start relays (IED>>>ST-K)       IED>>> Trip relays (IED>>>TR-K)       IED>>>> Start relays (IED>>>>ST-K)       IED>>>> Trip relays (IED>>>>TR-K)       I2ndh> Start relays (I2ndh>ST-K)       I2ndh> Trip relays (I2ndh>TR-K)       S< Trip relays (S

LED indicators Eight LEDs are available. • One green LED “ON”: if turned on it means that the device is properly working, if flashing the inter- nal self-test function has detected an anomaly. • One yellow LED “START” tagged for START of one or more protective elements.[1] • One red LED “TRIP” tagged for TRIP of one or more protective elements.[1] • Five red LEDs “1...5” for highlight the activation of one or more user defined function. Each output relay may be programmed with following operating mode: • No-latched: the LED reset at the end of the trip condition. • Latched: the LED doesn’t reset at the end of the trip condition; it stays ON until a manual reset command is issued (RESET key, ThyVisor or communication command). Any change to the settings can be affected at any time, also with the relay on duty, separately for each LED. Free allocation of each LED may be set according to the matrix structure shown in the following page.[2] Note 1 The START and the TRIP LED are user assignable to any function; other than starting and tripping information can be assigned to them too, just the same for L1...L5 Note 2 All LEDs are unassigned in the default setting. Led CB Open CB Close

FUNCTIONS LEDs START TRIP L1 L2 L3 L4 L5 DthAL1 Alarm LEDs (DthAL1-L)        DthAL2 Alarm LEDs (DthAL2-L)        Dth> Trip LEDs (Dth>-L)        I> Start LEDs (I>ST-L)        I> Trip LEDs (I>TR-L)        I>> Start LEDs (I>>ST-L)        I>> Trip LEDs (I>>TR-L)        I>>> Start LEDs (I>>>ST-L)        I>>> Trip LEDs (I>>>TR-L)        IE> Start LEDs (IE>ST-L)        IE> Trip LEDs (IE>TR-L)        IE>> Start LEDs (IE>>ST-L)        IE>> Trip LEDs (IE>>TR-L)        IE>>> Start LEDs (IE>>>ST-L)        IE>>> Trip LEDs (IE>>>TR-L)        UE> Start LEDs (UE> ST-L)        UE> Trip LEDs (UE> TR-L)        UE>> Start LEDs (UE>> ST-L)        UE>> Trip LEDs (UE>>TR-L)        IED> Start LEDs (IED>ST-L)        IED> Trip LEDs (IED>TR-L)        IED>> Start LEDs (IED>>ST-L)        IED>> Trip LEDs (IED>>TR-L)        IED>>> Start LEDs (IED>>>ST-L)        IED>>> Trip LEDs (IED>>>TR-L)        IED>>>> Start LEDs (IED>>>>ST-L)        IED>>>> Trip LEDs (IED>>>>TR-L)        I2ndh> Start LEDs (I2ndh>ST-L)        I2ndh> Trip LEDs (I2ndh>TR-L)        S< Trip LEDs (S

Communication interfaces Several communication ports are provided: • USB port on the front side for local communication (ThyVisor). • RS485 port on the rear side for bus communication. • Ethernet port on the rear side for bus communication. USB To connect the local port you need to use a cable USB Type B - Type A; the Thytronic cable code L10042 can be supplied. The serial port is the simplest access for setting by means the ThyVisor software. RS485 Several protocol are implemented[1]: • ModBus RTU. Modbus is a serial communications protocol. It is a de facto standard communica- tions protocol in industry, and is now the most commonly available means of connecting industrial electronic devices also inside electric utilities and substation. • IEC 60870-5. The IEC 60870-5 suite of protocol is used for communications from master station to substation, as well within the substation; the IEC 60870-5-103 (Protection equipment) is available together the Modbus protocol on some version of Pro-n devices (code NAxx#xxxxC x). Ethernet It is provided (optionally) a communication board useful for Ethernet communication with ModBus TCP/IP protocol.[2] Modbus/TCP basically embeds a Modbus frame into a TCP frame in a simple manner. This is a con- nection-oriented transaction which means every query expects a response. This query/response technique fits well with the master/slave nature of ModBus, adding to the de- terministic advantage that Switched Ethernet offers industrial users. In the same way as the RS485 base Modbus, every device is identified by a personal address and the communication goes in “client-server” mode with answering request from the recipient. The protective relay can be directly connect to the Ethernet network (no gateway, protocol converter are needed). Two port can be implemented: • 100BASE-TX with RJ45 connector (copper). • 100BASE-FX with FX connector (optical fiber)[2] For both modules no hw preset are required. Two LEDs are on board (RJ45): • LINK - (green): The LED lights up if the connection is active. • TX - (yellow): The LED lights up when data transmission is active. Note 1 The RS485 port is not implemented on the Pro-N devices endowed with Ethernet FX port Note 2 Information about the ModBus map may be find inside the “Remote programming manual” ethernet-sch.ai RX FX Ethernet (no RS485 port) TX 1 TX+ 2 TX- 3 RX+ 4 5 6 RX- 7 8 RJ45 Ethernet+RS485 ports RS485 F1 F2 F3 F4 F5 A+ B-

4.4 PROTECTIVE ELEMENTS Rated values Inside the Base menu the following parameters can be set: • Relay reference name. • Relay nominal currents (phase and residual), to which the regulation are related. • Primary nominal values, employed for measures relative to primary values. • Measurements reading mode. Information for settings: • Relay reference name. Alphanumeric mnemonic string (max 16 characters) useful for identification of protected plant. • Relay nominal frequency fn This nominal value must be set same as the frequency of the grid. Example: grid frequency fn = 50 Hz Relay nominal frequency fn = 50 Hz • Relay phase nominal current In This nominal value must be set by means dip-switch to 1 A or 5 A, same as the secondary CTs nominal current. Dip-switches are located on board of the CPU module; the exhaustive treatment of Dip setup is described in the “6.5 SETTING NOMINAL CURRENTS In AND IEn” paragraph. • Relay residual nominal current IEn This nominal value must be set by means dip-switch to 1 A or 5 A, same as the secondary CT nomi- nal current. Dip-switch is located on board of the CPU module; the exhaustive treatment of Dip setup is de- scribed in the “6.5 SETTING NOMINAL CURRENTS In AND IEn” paragraph. • Phase CT primary current Inp This parameter affects the measure of the phase currents when the primary measurement read- ing mode is selected. It must be programmed to the same value of the phase CT primary nominal current. Example The phase CT primary current Inp must be set as: Inp = 500 A • Residual CT primary current IEnp This parameter affects the measure of the residual current when the primary measurement reading mode is selected. It must be programmed to the same value of the residual CT(s) primary nominal current. Example 1 The residual CT primary current IEnp must be set as: IEnp = 100 A Es-In.ai KCT = 500A/5A=100 52 In NA30 Es1-IEn.ai 1x KCT = 100 A /1 A 52 IEn= 1 A NA30

Example 2 The residual CT primary current IEnp must be set as: IEnp = 100 A • Relay residual nominal voltage UEn The residual nominal voltage UEn may be estimated by means of the following general formula (ef- fective for insulated neutral or impedance-ground connected grids): If open delta VT with primary nominal voltage balances to the grid voltage divided by √3, the follow- ing streamlined calculus may be used: UEn = 3 · VT open delta secondary nominal voltage [V] for insulated or impedance-ground neutral grids. Example A1 The relay residual nominal voltage UEn must be estimated by means of the following general for- mula: UEn = √3 · Ung /KVT = √3 · 6900 / (√3 · 100) = 69 V Example A2 The relay residual nominal voltage UEn must be indifferently estimated by means of the following general formula: UEn = √3 · Ung /KVT = √3 · 6000 / (√3 · 60) = 100 V or by means the following streamlined formula: UEn = 3 · Uns = 3 · 100 / 3 = 100 V The Unp setting must be adjusted to: Unp = Ung = 6.9 kV • Measurement reading mode Measures may be displayed according the following operating modes: - With RELATIVE setting all measures are related to the nominal value, - With PRIMARY setting all measures are related to the primary value. Es2-IEn.ai 3x KCT = 100A / 5A 52 IEn= 5 A NA30 VT ratio KVT UEn = Grid nominal voltage Ung where the VTs [V] x √3 are connected / Es1-UEn.ai KVT = / / V V 10000 3 100 3 3 = 100 · = 100 · 3 / / V V 10000 3 100 3 Grid nominal voltage Ung = 6.9 kV VT ratio: KVT = Insulated or impedance-ground neutral / Ung = 6.9 kV UEn 52 NA30 Es2-UEn.ai KVT = / V V 6000 3 100 / 3 3 = 60 · Insulated or impedance-ground neutral Unp = 6 kV UEn 52 NA30 = 60 · 3 / / V V 6000 3 100 3 Grid nominal voltage Ung = 6 kV VT ratio: KVT = /

Thermal protection with RTD thermometric probes - 26 Preface The measure of temperature is acquired by means of Pt100 (RTD Resistive Temperature sensing Devices) probed, connected to the MPT module.[1] A direct thermal protection element with eight PT100 thermometric probes (RTD Resistive Thermal Device) provides protection against premature ageing or breakdown of the insulating materials through overheating. Thermal protection using thermometric probes offers greater reliability than Thermal overload-based indirect protection, since it is not influenced by inaccuracies in the time constant for the thermal model of the machinery and by variations in the surrounding temperature. For each thermometric probe an alarm (ThALx, where x=1...8 points one of the eight probes) and one trip adjustable threshold is provided (Th>x), with adjustable operating time (tThALx and tTh>x>);if the measured temperature overcomes the threshold, the relative alarm and/or trip is issued when the timer expires. The adjustments are operable in °C. The probes should be placed in strategic points around the machinery susceptible to the greatest overheating, such as for example: - near the generator stator windings, near the step-up transformer windings and/or in the oil, with the aim of detecting overheating produced by the overload currents, - near the generator bearings, with the aim of detecting localised overheating due to worn or non- lubricated bearings. The Pt100 probes detect the temperature in the range -50 °C...+250 °C (at 0 °C its resistance is 100 ohm); an alarm indicates any interruption or short-circuiting of the probe or related connections to the MPT module; the information is available inside the Read \ PT100 menu: • Ptx probe ON to point a measure inside the range • Ptx probe LOW to point a measure lower the range (short circuit of probe and/or wires) • Ptx probe HIGH ao point a measure higher the range (breaking of probe and/or wires). Self reset is performed when faults are cleared. The measure of each probe is updated at 2 s time intervals. Note 1 The 26 menu is available when the MPT module is enabled t-int-F26.ai T (°C) t General operation time characteristic for thermal protection with RTD thermometric probes (26) Th>x tTh>x tThALx TRIP all-F26.ai General logic diagram of the thermal elements - (26) Pt100 Thybus MPT AL ARM TRIP Trip Element Alarm Element ThALx enable Th>x enable ThALx Th>x t ThALx t Th>x Th>xBF Trip Th>x & Th>xBF t-refresh-F26.ai t Pt1...8 update Pt1 Pt2 Pt3 Pt4 Pt5 Pt6 Pt7 Pt8 Pt1 0.25s 0.25s 0.25s 0.25s 0.25s 0.25s 0.25s 0.25s 2.0s

All alarm and/or trip elements can be enabled or disabled by setting ON or OFF the ThALx Enable e Th>x Enable parameters inside the Set \ Profile A(or B) \ Thermal protection with RTD thermo- metric probes - 26 \ PTx Probe \ ThALx Alarm (ThALx Trip) where x = 1...8. Each trip threshold (Th>x) may be associated with the breaker failure (BF) function by setting ON the Th>xBF parameters inside the Set \ Profile A(or B) \ Thermal protection with RTD thermometric probes - 26 \ PTx Probe \ ThALx Trip where x = 1...8.[1] Note 1 The common settings concerning the Breaker failure protection are adjustable inside the Breaker Failure - BF menu. Fun-F26.ai Logic diagram for thermal protection with RTD thermometric probes (26) T° ≤ +245.0°C T° > Pt x> Ptx Pt1 Pt2 Pt3 Pt4 Pt5 Pt6 Pt7 Pt8 0 T TRIPPING MATRIX (LED+RELAYS) T° > ThALx Pt100-x Trip Pt100-xAlarm t Th>x t ThALx BF Enable (ON≡Enable) Pt100 OK Pt100 FAULT Th>xBF TOWARDS BF LOGIC Th>x BF_OUT TOWARDS DIAGNOSTIC Pt x> Diagnostic TRIP & & & T° ≥ -49.0°C 0 T ThALx-K ThALx-L Th>x-K Th>x-L ThALx Th>x t ThALx t Th>x Pro_N E1 THYBUS THYBU I S NPUT HYBU S OUTPUT T MPT 8 T1 PT1 PT8 MPT1 MPT8 PT7 MPT7 PT6 MPT6 PT5 MPT5 PT2 MPT2 PT3 MPT3 PT4 MPT4 T8 7 6 T7 T6 T5 11 T2 12 13 15 T3 16 17 20 T4 21 22 49 48 47 44 43 42 40 39 38 35 34 33 Pt100 probes (Pt1...Pt8)

Thermal image - 49 Preface It is a overload protection with memory capability and three setpoints, used to protect lines and transformers against thermal overload. The phase currents are used into an algorithm reproducing a thermal replica according the IEC 60255-8 standard taking into account the Joule losses and the cooling effect due to the load reduc- tion; in this way the previous history and the overload are taken into account. The thermal protection can be adapted to the different features of motors by setting the thermal heating t+ and cooling t- constants ( the t+ constant refers to motor running condition, while the t- constant, always higher than t+, refers to stop condition). The trip element has an adjustable threshold; with 1.2 DθB setting (ie 1.2 times the overtemperature corresponding to the nominal operation condition) the corresponding tripping current IB is 1.1 since the temperature rise is proportional to the square of the current. The 49 element is provided with two further thresholds DθAL1 and DθAL2, lower than the previous one. These thresholds, both adjustable, provide an alarm signal to draw attention in the event of anoma- lous heating, without disconnect the protected device. One of the above thresholds can be used to prevent refeeding of the system when heating approaches the trip conditions since the additional heating brought on by the inrush currents would cause the protection to operate. Operation and settings The thermal current used for thermal image calculation is: Ith = max (IL1, IL2, IL3) If the second harmonic restraint is enabled, the thermal current used for thermal image calculation becomes: Ith = ILMAX/KINR = max (IL1, IL2, IL3) / KINR where KINR is an adjustable parameter (1.0...3.0), useful to reduce the thermal current during the transformer energization (inrush). According to a single-body thermal model, the thermal image is based on the differential equation: dDθ/dt+Dθ/T=(Ith/IB)2/T where Dθ is the system thermal state as a percentage of base thermal capacity DθB corresponding to the base current IB[1] and T is the thermal time constant (the same for heating and cooling). When the thermal image Dθ overcomes the threshold a trip is issued. The operating characteristic (IEC 60255-8) is: t=T*ln{[(Ith/IB)2-Dθp/DθB)]/[(Ith/IB)2-1.2]}=T*ln{[(Ith/IB)2-(Ip/IB)2]/[(Ith/IB)2-1.2]= T*ln{[(Ith/IB)2-p2]/[(Ith/IB)2-1.2]} [1] where: • t: operating time, • ln: natural logarithm, • Dθp and Ip are the thermal image and the corresponding equivalent thermal current before the overload occurs. • p=Ip/IB=√(Dθp/DθB: prior load. Following data applies: • Range where the equation is valid: 1.1IB ≤ Ith ≤ 10IB • If 10IB ≤ Ith ≤ 20IB, the operating time is fixed to a value corresponding to the 10IB • The upper limit is 20IB. Note 1 Assuming that the secondary rated current of the line CT’s equals the rated current of the NA20 relay, as usually happens, the IB value is the ratio between the rated current of the protected component (line, transformer,...) and the primary rated current of the CT’s. t-int-F49.ai Ith/IB p=0 p=1 Dth> t TRIP General operation time characteristic for the thermal image elements - 49

If the CLP function (Cold Load Pick-up) is enabled for blocking 49, the thermal image is blocked for an adjustable time interval, starting from the circuit breaker closure.[1] The operating mode parameter may be select by setting ON-Element blocking the DThCLP Mode parameter inside the Set\Pro- file A(or B)\Thermal image-49\ Common configuration menu. If the CLP function (Cold Load Pick-up) is enabled for threshold change, the equivalent ther- mal current may be decreased by means a KINR factor for an adjustable time interval, starting from the circuit breaker closure.[2] The operating mode parameter may be select by setting ON- Change setting the DThCLP Mode parameter inside the Set\Profile A(or B)\Thermal image-49\ Common configuration menu. For the Dth> threshold, a block from the second harmonic restraint may be set by set- ting ON the DTh>2ndh-REST parameter inside the Set\Profile A(or B)\Thermal image-49\ Common configuration menu. All elements can be enabled or disabled by setting ON or OFF the DThetaAL1 Enable, DTheta- AL2 Enable and/or DTheta> Enable parameters inside the Set\Profile A(or B)\Thermal image-49\ DthAL1 Element (DthAL2 Element, Dth> Element) menus. The trip element (Dth>) may be inhibited when a start of at least one of the overcurrent element (50/51) is active, if the Dth>disby50-51 parameter is set ON inside the Set\Profile A(or B)\Thermal image-49\ Dth> Element menu. The DθIN parameter sets a minimum level of previous thermal image Dθp when the protection relay is powered or when a remote (binary input) or local (keyboard or ThyVisor) command is issued. The DthIN parameter may be adjusted inside the Set \ Profile A(or B) \ Thermal image-49\ Common configuration menu. To active the DθIN preset value remotely, a binary input must be programmed as Init DTheta func- tion inside the Set \ Inputs \ Binary input IN1, Binary input IN2 menu. The trip element can produce the Breaker Failure output if the Dth> BF parameters is set to ON. The parameter is available inside the Set\Profile A(or B)\Thermal image-49 \ Dth> Element menu.[3] The IB setting is adjustable inside the Set\Profile A(or B)\Base current IB menu. Note 1 The CLP function (Cold Load Pick-up) with blocking of the 49 element has priority compared with the second harmonic restraint function, so, if the equivalent thermal current is enabled, the latter is not reduced when a second harmonic restraint is active. Note 2 The CLP function (Cold Load Pick-up) with threshold change of the 49 element has priority compared with the second harmonic restraint func- tion, so, if the equivalent thermal current is enabled, the latter is not reduced when a second harmonic restraint is active. Note 3 The common settings concerning the Breaker failure protection are adjustable inside the Breaker Failure - BF menu. all-F49.ai KINR T DthIN DthCLP Mode Dth2ndh REST tDthCLP Common configuration Ith Dth> Element Trip DTh> DTh> Enable DTh> Trip DTh> Dth>BF & Dth>BF BLK4OUT Dth>BLK4 Start I> & BLK2OUT Dth>BLK2OUT & Trip Dth> Trip Dth> BLK2INDth> Block2 & Dth>BLK2IN & DthAL1 Element DThAL1 DThAL1 DThAL1 DThAL1 Enable Ith BLK4OUT DthAL1BLK4 & BLK2OUT DthAL1BLK2OUT & Trip Dth> Block1 BLK1DthAL1 & DthAL1BLK1 & Dth>AL1 DthAL1 BLK2INDthAL1 Block2 & DthAL1BLK2IN & DthAL2 BLK2INDthAL2 Block2 & DthAL2BLK2IN & DthAL2 Element DThAL2 DThAL2 DThAL2 Enable Ith BLK4OUT DthAL2BLK4 & BLK2OUT DthAL2BLK2OUT & Block1 BLK1DthAL2 & DthAL2BLK1 & Dth>AL2 Dth>AL2 Dth>AL2 Block1 BLK1Dth> & Dth>BLK1 Trip Dth> & & 50-51 inhibition Dth>disby50-51 General logic diagram of the thermal image elements - 49

For every threshold the following block criteria are available: Logical block (Block1) If the DthAL1BLK1, DthAL2BLK1 and/or Dth>BLK1 enabling parameters are set to ON and a bi- nary input is designed for logical block (Block1), the concerning element is blocked off whenever the given input is active.[1] The enabling parameters are available inside the Set\Profile A(or B)\Thermal image-49\ DthAL1 Element (DthAL2 Element, Dth> Element) menus, while the Block1 function must be assigned to the selected binary input inside the Set\Inputs\Binary input IN1(2) menus. Selective block (Block2) All along the protective elements the selective block may be set. The logic selectivity function may be performed by means any combination of the following I/O: • One committed pilot wire input (BLIN1). • One or more binary inputs designed for input selective block. • One committed pilot wire output (BLOUT1). • One or more output relays designed for output selective block. Only when the committed pilot wire are used the continuity check of the pilot wire link is active. Use of committed pilot wire input BLIN1: • The protection is blocked off according the selectivity block criteria when the input BLIN1 is active. The information about phase or phase+earth block may be select programming the ModeBLIN1 parameter inside the Set\Profile A(or B)\Selective block-BLOCK2 \ Selective block IN menus. Use of binary inputs: • If the DthAL1BLK2IN, DthAL2BLK2IN and/or Dth>BLK2IN parameter are are set to ON and a binary input is designed for selective block (Block2), the protection is blocked off by phase ele- ments (Block2 Iph) or by any protection element (Block2 Iph/IE) according the selectivity block criteria.[2] The enable DthAL1BLK2IN, DthAL2BLK2IN and/or Dth>BLK2IN parameters are available inside the Set\Profile A(or B)\Thermal image-49\ DthAL1 Element, DthAL2 Element, Dth> Element menus, while the Block2 Iph and Block2 Iph/IE functions must be assigned to the selected binary inputs inside the Set \ Inputs \ Binary input IN1(2) menus (IN1 or IN2 matching). Use of committed pilot wire output BLOUT1: • The information about phase or phase+earth block may be select programming the ModeBLOUT1 parameter inside Set\Profile A(or B)\Selective block-BLOCK2\ Selective block OUT menus. Use of output relay (K1...K6): • If the DthAL1BLK2OUT, DthAL2BLK2OUT and/o Dth>BLK2OUT enable parameters are set to ON and a output relay is designed for selective block (Block2), the protection issues a block output by phase elements (BLK2OUT-Iph) or by any protection element (BLK2OUT-Iph/IE), when- ever the given element (DthAL1, DthAL2 e/o Dth>) becomes active. The enable DthAL1BLK2OUT, DthAL2BLK2OUT and/or Dth>BLK2OUT parameters are available inside the Set\Profile A(or B)\Thermal image-49\ DthAL1 Element (DthAL2 Element, Dth> Element) menus, while the BLK- 2OUT-Iph-K, BLK2OUT-Iph/IE-K and/or BLK2OUT-IE-K output relays must be set inside the Set\Profile A(or B)\Selective block-BLOCK2 \ Selective block OUT menus. Internal selective block (Block4) As well as to send or transmit a selective block toward other protective relays, each protective element may be enabled for receive or transmit a selective block from/to other internal protective elements.[3] The internal selective block of one or more element concerning the thermal image function may be enabled/disabled by means the DthAL1BLK4, DthAL2BLK4, and/or Dth>BLK4 parameters (virtual input and output common to all protective thresholds); the following operating modes are available: • IN - the element is enabled to receive the selective block from an internal input. • OUT - the element is enabled to send the selective block to an internal output. • OFF - the element is disabled to send/receive the internal selective block. Transmission and reception for the same element is not allowed, so any stall situation due to wrong setting is avoided. The internal selective block can work together with an external selective block from other protective relays (Block2). Note 1 The exhaustive treatment of the logical block (Block 1) function may be found in the “Logic Block” paragraph inside CONTROL AND MONITOR- ING section Note 2 The exhaustive treatment of the selective block (Block 2) function may be found in the “Selective Block” paragraph inside CONTROL AND MONITORING section Nota 3 The exhaustive treatment of the internal selective block (Block 4) function may be found in the “Internal selective block” paragraph inside CONTROL AND MONITORING section.

Fun_49_AL1.ai Common configuration & dDθ/dt + Dθ/T = (Ith/IB)2/T Init DTheta Dθ ≥ DthAL1 DthAL1 Binary input INx (x=1...8-16) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Ith ≥1 KINR DthAL1 CB-State Start I2ndh> ON≡Enable element (Pickup within CLP) (Pickup outside CLP) Pickup - CLP setting change Block1, Block2, Block4 T 0 tDthCLP & 2nd harmonic restraint enable (ON≡Enable) Dth2ndh-REST DthCLPMode t DthCLP Ith ∙ KINR TRIPPING MATRIX (LED+RELAYS) A B C A =“1” A =“0 or OFF” Output tDthCLP DthAL1 Enable DThhAL1 thermal image (49) block diagram tDthCLP CB State CB OPEN CB CLOSED CB OPEN Output tDthCLP t 0.1 s HIGH THRESHOLD/ BLOCK LOW THRESHOLD/ UNBLOCK HIGH THRESHOLD/ BLOCK A = ON - Change setting B = OFF C = ON - Element blocking DthAL1-L DthAL1-K ≥1 CLP Dth T DthIN Thermal image (49) - Logic diagram of the first alarm threshold

Pilot wire output TRIPPING MATRIX (LED+RELAYS) ModeBLOUT1 A B C D BLOUT1 Block2 output ≥1 tF-IPh tF-IPh/IE tF-IE ST-Iph BLK2 ST-IE BLK2 & Block2 output (ON≡Enable) DthAL1BLK2OUT ≥1 T 0 tF-IPh/IE T 0 tF-IPh T 0 tF-IE I> Block2 OUT BLK2OUT-Iph BLK2OUT-Iph/IE BLK2OUT-IE A = OFF B = ON IPh C = ON IPh/IE D = ON IE BLK2OUT-IPh-K BLK2OUT-IPh-L BLK2OUT-IPh/IE-K BLK2OUT-IPh/IE-L BLK2OUT-IE-K BLK2OUT-IE-L Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Block2 IPh Block2 IPh/IE ModeBLIN1 T 0 tB-Iph 49AL1_BL-diagram.ai ≥1 ≥1 ≥1 ≥1 tB-Iph tFI-Iph tB-IE BLK1DthAL1 BLK4INDthAL1 & & BLK2IN DthAL1 & & Enable (ON≡Enable) DthAL1BLK1 Block2 input enable (ON≡Enable) Pilot wire input & DThAL1BLK2IN Block1 BLK2IN-Iph DthAL1 ST-IE BLK4 ST-Iph BLK4 Iph Block2 IE Block2 Block4 enable BLK2IN-IE tB timeout Block2 input tB-K tB-L Block1 FROM EARTH FAULT PROTECTIONS FROM ANY PROTECTIONS OFF ON IPh ON IPh/IE ON IE BLIN1 ≥1 ≥1 tFI-IE Block4 OUT ≥1 T 0 tFI-Iph T 0 tFI-IE I>> Block4 I/O I> Block4 I/O DthAL1 Block4 OUT Block4 Block4 I>>> Block4 I/O DthAL1 Block4 I/O DthAL2 Block4 I/O Dth Block4 I/O IPD>Block4 I/O IPD>>Block4 I/O IPD>>>Block4 I/O IPD>>>>Block4 I/O I>> Block2 OUT I>>> Block2 OUT DthAL1 Block2 OUT DthAL2 Block2 OUT Dth Block2 OUT IPD>Block2 OUT IPD>>Block2 OUT IPD>>>Block2 OUT IPD>>>>Block2 OUT IE>> Block4 I/O IE> Block4 I/O IE>>> Block4 I/O IED>> Block4 I/O IED> Block4 I/O IED>>> Block4 I/O IED>>>> Block4 I/O ≥1 IE>> Block2 OUT IE> Block2 OUT IE>>> Block2 OUT IED>> Block2 OUT IED> Block2 OUT IED>>> Block2 OUT IED>>>> Block2 OUT Block4 Block1 T 0 tB-IE Block2 IE ≥1 Block1, Block2, Block4 TRIPPING MATRIX (LED+RELAYS) ≥1 ≥1 A = IN B = OFF C = OUT A = IN B = OFF C = OUT DthAL1BLK4 C B A “0” “0” B “0” C “0” DthAL1BLK4 A DthAL1 DthAL1 Thermal image (49) - Logic diagram of the blocking signals concerning the first alarm element

Fun_49_AL2.ai Common configuration & dDθ/dt + Dθ/T = (Ith/IB)2/T Init DTheta Dθ ≥ DthAL2 DthAL2 Binary input INx (x=1...8-16) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Ith ≥1 KINR DthAL2 CB-State Start I2ndh> ON≡Enable element (Pickup within CLP) (Pickup outside CLP) Pickup - CLP setting change Block1, Block2, Block4 T 0 tDthCLP & 2nd harmonic restraint enable (ON≡Enable) Dth2ndh-REST DthCLPMode t DthCLP Ith ∙ KINR TRIPPING MATRIX (LED+RELAYS) A B C A =“1” A =“0 or OFF” Output tDthCLP DthAL2 Enable DThhAL1 thermal image (49) block diagram tDthCLP CB State CB OPEN CB CLOSED CB OPEN Output tDthCLP t 0.1 s HIGH THRESHOLD/ BLOCK LOW THRESHOLD/ UNBLOCK HIGH THRESHOLD/ BLOCK A = ON - Change setting B = OFF C = ON - Element blocking DthAL2-L DthAL2-K ≥1 CLP Dth T DthIN Thermal image (49) - Logic diagram of the second alarm threshold

Pilot wire output TRIPPING MATRIX (LED+RELAYS) ModeBLOUT1 A B C D BLOUT1 Block2 output ≥1 tF-IPh tF-IPh/IE tF-IE ST-Iph BLK2 ST-IE BLK2 & Block2 output (ON≡Enable) DthAL2BLK2OUT ≥1 T 0 tF-IPh/IE T 0 tF-IPh T 0 tF-IE I> Block2 OUT BLK2OUT-Iph BLK2OUT-Iph/IE BLK2OUT-IE A = OFF B = ON IPh C = ON IPh/IE D = ON IE BLK2OUT-IPh-K BLK2OUT-IPh-L BLK2OUT-IPh/IE-K BLK2OUT-IPh/IE-L BLK2OUT-IE-K BLK2OUT-IE-L Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Block2 IPh Block2 IPh/IE ModeBLIN1 T 0 tB-Iph 49AL2_BL-diagram.ai ≥1 ≥1 ≥1 ≥1 tB-Iph tFI-Iph tB-IE BLK1DthAL2 BLK4INDthAL2 & & BLK2IN DthAL2 & & Enable (ON≡Enable) DthAL2BLK1 Block2 input enable (ON≡Enable) Pilot wire input & DThAL2BLK2IN Block1 BLK2IN-Iph DthAL2 ST-IE BLK4 ST-Iph BLK4 Iph Block2 IE Block2 Block4 enable BLK2IN-IE tB timeout Block2 input tB-K tB-L Block1 FROM EARTH FAULT PROTECTIONS FROM ANY PROTECTIONS OFF ON IPh ON IPh/IE ON IE BLIN1 ≥1 ≥1 tFI-IE Block4 OUT ≥1 T 0 tFI-Iph T 0 tFI-IE I>> Block4 I/O I> Block4 I/O DthAL2 Block4 OUT Block4 Block4 I>>> Block4 I/O DthAL1 Block4 I/O DthAL2 Block4 I/O Dth Block4 I/O IPD>Block4 I/O IPD>>Block4 I/O IPD>>>Block4 I/O IPD>>>>Block4 I/O I>> Block2 OUT I>>> Block2 OUT DthAL1 Block2 OUT DthAL2 Block2 OUT Dth Block2 OUT IPD>Block2 OUT IPD>>Block2 OUT IPD>>>Block2 OUT IPD>>>>Block2 OUT IE>> Block4 I/O IE> Block4 I/O IE>>> Block4 I/O IED>> Block4 I/O IED> Block4 I/O IED>>> Block4 I/O IED>>>> Block4 I/O ≥1 IE>> Block2 OUT IE> Block2 OUT IE>>> Block2 OUT IED>> Block2 OUT IED> Block2 OUT IED>>> Block2 OUT IED>>>> Block2 OUT Block4 Block1 T 0 tB-IE Block2 IE ≥1 Block1, Block2, Block4 TRIPPING MATRIX (LED+RELAYS) ≥1 ≥1 A = IN B = OFF C = OUT A = IN B = OFF C = OUT DthAL2BLK4 C B A “0” “0” B “0” C “0” DthAL2BLK4 A DthAL2 DthAL2 Thermal image (49) - Logic diagram of the blocking signals concerning the second alarm element

Fun_49_Dth.ai Common configuration & dDθ/dt + Dθ/T = (Ith/IB)2/T Init DTheta Dθ ≥ Dth> Dth> Binary input INx (x=1...8-16) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Ith ≥1 KINR Dth> CB-State Start I2ndh> ON≡Enable element (Pickup within CLP) (Pickup outside CLP) Pickup - CLP setting change Block1, Block2, Block4 T 0 tDthCLP & 2nd harmonic restraint enable (ON≡Enable) Dth2ndh-REST DthCLPMode t DthCLP Ith ∙ KINR BF Enable (ON≡Enable) Dth>BF towards BF logic Dth> BF & Trip Dth> TRIPPING MATRIX (LED+RELAYS) A B C A =“1” A =“0 or OFF” Output tDthCLP Dth> Enable DTh> thermal image (49) block diagram tDthCLP CB State CB OPEN CB CLOSED CB OPEN Output tDthCLP t 0.1 s HIGH THRESHOLD/ BLOCK LOW THRESHOLD/ UNBLOCK HIGH THRESHOLD/ BLOCK A = ON - Change setting B = OFF C = ON - Element blocking Dth>-L Dth>-K ≥1 CLP Dth from 50/51 element (ON≡Inhibit) 50/51 inhibition & 50/51block enable (ON≡Enable) Dth>disby50-51 T DthIN Thermal image (49) - Logic diagram of the trip threshold

Pilot wire output TRIPPING MATRIX (LED+RELAYS) ModeBLOUT1 A B C D BLOUT1 Block2 output ≥1 tF-IPh tF-IPh/IE tF-IE ST-Iph BLK2 ST-IE BLK2 & Block2 output (ON≡Enable) Dth>BLK2OUT ≥1 T 0 tF-IPh/IE T 0 tF-IPh T 0 tF-IE I> Block2 OUT BLK2OUT-Iph BLK2OUT-Iph/IE BLK2OUT-IE A = OFF B = ON IPh C = ON IPh/IE D = ON IE BLK2OUT-IPh-K BLK2OUT-IPh-L BLK2OUT-IPh/IE-K BLK2OUT-IPh/IE-L BLK2OUT-IE-K BLK2OUT-IE-L Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Block2 IPh Block2 IPh/IE ModeBLIN1 T 0 tB-Iph 49_BL-diagram.ai ≥1 ≥1 ≥1 ≥1 tB-Iph tFI-Iph tB-IE BLK1Dth> BLK4INDth> & & BLK2IN Dth> & & Enable (ON≡Enable) Dth>BLK1 Block2 input enable (ON≡Enable) Pilot wire input & DTh>BLK2IN Block1 BLK2IN-Iph Dth> ST-IE BLK4 ST-Iph BLK4 Iph Block2 IE Block2 Block4 enable BLK2IN-IE tB timeout Block2 input tB-K tB-L Block1 FROM EARTH FAULT PROTECTIONS FROM ANY PROTECTIONS OFF ON IPh ON IPh/IE ON IE BLIN1 ≥1 ≥1 tFI-IE Block4 OUT ≥1 T 0 tFI-Iph T 0 tFI-IE I>> Block4 I/O I> Block4 I/O Dth> Block4 OUT Block4 Block4 I>>> Block4 I/O DthAL1 Block4 I/O DthAL2 Block4 I/O Dth Block4 I/O IPD>Block4 I/O IPD>>Block4 I/O IPD>>>Block4 I/O IPD>>>>Block4 I/O I>> Block2 OUT I>>> Block2 OUT DthAL1 Block2 OUT DthAL2 Block2 OUT Dth Block2 OUT IPD>Block2 OUT IPD>>Block2 OUT IPD>>>Block2 OUT IPD>>>>Block2 OUT IE>> Block4 I/O IE> Block4 I/O IE>>> Block4 I/O IED>> Block4 I/O IED> Block4 I/O IED>>> Block4 I/O IED>>>> Block4 I/O ≥1 IE>> Block2 OUT IE> Block2 OUT IE>>> Block2 OUT IED>> Block2 OUT IED> Block2 OUT IED>>> Block2 OUT IED>>>> Block2 OUT Block4 Block1 T 0 tB-IE Block2 IE ≥1 Block1, Block2, Block4 TRIPPING MATRIX (LED+RELAYS) ≥1 ≥1 A = IN B = OFF C = OUT A = IN B = OFF C = OUT Dth>BLK4 C B A “0” “0” B “0” C “0” Dth>BLK4 A Dth> Dth> Thermal image (49) - Logic diagram of the blocking signals concerning the trip element

F_49-1min-Char.ai Operating characteristic concerning the thermal image element (49) - T=1 min 1 1.1 2 3 4 5 6 7 8 9 10 20 Ith /IB 0.01 0.1 1 10 100 1000 10000 1.0 p = 0.0 0.8 0.6 t [s]

F_49-200min-Char.ai Operating characteristic concerning the thermal image element (49) - T = 200 min 1 1.1 2 3 4 5 6 7 8 9 10 20 Ith /IB t [s] 0.1 1 10 100 1000 10000 100000 1.0 p = 0.0 0.8 0.6

Phase overcurrent - 50/51 Preface Three operation thresholds, independently adjustable (I>, I>>, I>>>) with adjustable delay (t>, t>>, t>>>). The first one may be programmed with definite or inverse time according the IEC and ANSI/IEEE standard, as well as with rectifier, I2t or EM curve. The second threshold may be programmable with independent or dependent time according to the I2t curve and the third threshold with independent time. For each threshold a reset time can be set (t>RES, t>>RES, t>>>RES) useful to reduce the clearing time for intermittent faults. The first threshold trip may be inhibited by start of the second and/or third threshold (I>>, I>>>). Similarly the second threshold trip may be inhibited by start of the third threshold (I>>>). Operation and settings Each phase fundamental frequency current is compared with the setting value. Currents above the associated pickup value are detected and a start is issued. After expiry of the associated operate time a trip command is issued; if instead the current drops below the threshold, the element is re- stored. The first threshold (I>) may be programmed with definite or inverse time according the following characteristic curves: • Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · t>inv / [(I/I>inv)0.02 - 1] • Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · t>inv / [(I/I>inv) - 1] • Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · t>inv / [(I/I>inv)2 - 1] • Moderately Inverse (ANSI/IEEE type MI): t = t>inv · {0.01 / [(I/I>inv)0.02 - 1] + 0.023} • Very Inverse (ANSI/IEEE type VI): t = t>inv · {3.922 / [(I/I>inv)2 - 1] + 0.098} • Extremely Inverse (ANSI/IEEE type EI): t = t>inv · {5.64 / [(I/I>inv)2 - 1] + 0.024} • Rectifier (RI): t = 2351 · t>inv / [(I/I>inv)5.6 - 1] • I-squared-t (I 2t = K): t = 16 · t>inv / (I/I>inv)2 • Electromechanical (EM): t = t>inv · {0.28 / [-0236 · (I/I>inv)-1 + 0.339]} Where: t: operate time I>inv: threshold setting t>inv: operate time setting The second threshold (I>>) may be programmable with definite or inverse time according to the I2t curve: t = 16 · t>inv / (I/I>inv)2 The third threshold (I>>>) with definite time. For all inverse time characteristics, following data applies: • Asymptotic reference value (minimum pickup value): 1.1 I>inv • Minimum operate time: 0.1 s • Range where the equation is valid:[1] 1.1 ≤ I/I>inv ≤ 20 • If I>inv pickup ≥ 2.5 In, the upper limit is 50 In For all definite time elements the upper limit for measuring is 50 In. All overcurrent elements can be enabled or disabled by setting ON or OFF the I> Enable, I>> Enable and/or I>>> Enable parameters inside the Set \ Profile A(or B) \ Phase overcurrent-50/51 \ I> Element (I>> Element, I>>> Element) \ Setpoints menus. The first overcurrent element can be programmed with definite or inverse time characteristic by setting the I>Curve parameter (DEFINITE, IEC/BS A, IEC/BS B, IEC/BS C, ANSI/IEE MI, ANSI/IEE VI, ANSI/IEE EI, RECTIFIER, I2t, EM) available inside the Set \ Profile A(or B) \ Phase overcurrent-50/51 \ I> Element \ Setpoints menu. Note 1 When the input value is more than 20 times the set point , the operate time is limited to the value corresponding to 20 times the set point t-int-F50-51.ai I I>> I>>> t> t>> t>>> I> t TRIP General operation time characteristic for the phase overcurrent elements - 50/51

The second overcurrent element can be programmed with definite or inverse time characteristic by setting the I> Time characteristic (I>>Curve) parameter (DEFINITE, I2t) available inside the Set \Profile A(or B) \ Phase overcurrent-50/51 \ I>> Element \ Setpoints menu. The trip of I> element may be inhibited by the start of the second and/or third element (I>>, I>>>) by set- ting ON the Disable I> by start I>>, Disable I>> by start I>>> (I>disbyI>>, I>disbyI>>>) parameters available inside the Set \ Profile A(or B) \ Phase overcurrent-50/51 \ I>> Element (I>>> Element) \ Setpoints menus. Similarly the trip of the I>> element may be inhibited by start of the third element (I>>>) by setting ON the Disable I>> by start I>>> (I>>disbyI>>>) parameter available inside the Set \ Profile A(or B) \ Phase overcurrent-50/51 \ I>>> Element \ Setpoints menu. All the named parameters can be set separately for Profile A and Profile B (Set \ Profile A(or B)\ Phase overcurrent-50/51 \ I> Element (I>> Element, I>>> Element) \ Setpoints menus). An adjustable reset time delay is provided for every threshold (t>RES, t>>RES, t>>>RES). Each overcurrent element can produce the Breaker Failure output if the I> BF, I>> BF and/or I>>> BF parameters are set to ON. The parameters are available inside the Set \ Profile A(or B) \Phase overcurrent-50/51 \ I> Element (I>> Element, I>>> Element) \ Setpoints menus.[1] For all overcurrent elements, a block from the second harmonic restraint may be set by setting ON the I>2ndh-REST, I>>2ndh-REST, I>>>2ndh-REST parameters inside the Set \ Profile A(or B) \ Phase overcurrent-50/51 \ I> Element (I>> Element, I>>> Element) \ Setpoints menus. If the CLP function (Cold Load Pick-up) is enabled for element blocking, the selected threshold may be blocked for an adjustable time interval, starting from the circuit breaker closure. This operating mode may be select by setting ON-Element blocking the ICLP> Mode, ICLP>> Mode and/or ICLP>>> Mode parameters. If the CLP function (Cold Load Pick-up) is enabled for threshold change, the selected threshold may be changed for an adjustable time interval, starting from the circuit breaker closure. This operating mode may be select by setting ON-Change setting the ICLP> Mode, ICLP>> Mode and/or ICLP>>> Mode parameters, whereas the operating thresholds within the CLP may be adjusted inside the Set \ Profile A(or B) \ Phase overcurrent-50/51 \ I> Element,(I>> Element, I>>> Element) \ Definite time (Inverse time) menus. For both operating modes the CLP Activation time parameters (tCLP>, tCLP>>, tCLP>>>) may be adjusted inside the Set \ Profile A(or B) \ Phase overcurrent-50/51 \ I> Element (I>> Element, I>>> Element) \ Setpoints menus. Note 1 The common settings concerning the Breaker failure protection are adjustable inside the Breaker Failure - BF menu. Timers-F50-51.ai I> Start I> Trip t> t> RESET INPUT t>RES t>RES t>RES t I> element phase overcurrent timers - 50/51

all-F50-51.ai General logic diagram of the phase overcurrent elements - 50/51 IL1 IL2 IL3 IL1 IL2 IL3 IL1 IL2 IL3 ≥ I>> inhibition BLK1I>>> I>>>BF I>>> Element Start I>>> Start I>>> Start I>>> Trip I>>> Trip I>>> & I>> disbyI>>> & I>>>BLK2IN & I> disbyI>>> t>>> def ICLP>>> def I>>> def ICLP>>>Mode tCLP>>> t>>>RES BLK1I>> I>> Element BLK2OUT Start I>> Start I>> Trip I>> & I> disbyI>> & I>>BLK1 & I>>BLK2IN t>> def ICLP>> def I>> def t>> inv ICLP>> inv I>> inv I>>Curve ICLP>>Mode tCLP>> t>>RES I>> Enable I>>> Enable I> inhibition Block1 BLK1I> CLPI> CLPI>> CLPI>>> I> Element BLK2OUT BLK4OUT BLK4OUT BLK2INI> BLK2INI>> Start I> Trip I> & I>BLK1 Block2 & I>BLK2IN Start I2ndh> & I>2ndh-REST I>BLK2OUT Start I2ndh> & I>>2ndh-REST Start I2ndh> & I>>>2ndh-REST & I>>>BF I>>BF I>> Trip & I>>BF I>BF Trip I> & I>BF Start I> & I>>BLK2OUT Start I>> & BLK2OUT I>>>BLK2OUT Start I>>> & I>BLK4 Start I> & I>>BLK4 Start I>> & BLK4OUT I>>>BLK4 Start I>>> & Block1 Block2 & I>>>BLK1 Block1 Block2 t> def ICLP> def I> def t> inv ICLP> inv I> inv I>Curve ICLP>Mode tCLP> t>RES I> Enable Start I> & Start I>> & Start I>>> & Start I>> & BLK2INI>>> Start I>>> & Start I> &

For every of the three thresholds the following block criteria are available: Logical block (Block1) If the I>BLK1, I>>BLK1 and/or I>>>BLK1 enabling parameters are set to ON and a binary in- put is designed for logical block (Block1), the concerning element is blocked off whenever the given input is active.[1] The enabling parameters are available inside the Set\Profile A(or B)\Phase over- current-50/51\ I> Element (I>> Element, I>>> Element) \Setpoints menus, while the Block1 function must be assigned to the selected binary input inside the Set\Inputs\Binary input IN1(2) menus. Selective block (Block2) All along the protective elements the selective block may be set. The logic selectivity function may be performed by means any combination of the following I/O: • One committed pilot wire input (BLIN1). • One or more binary inputs designed for input selective block. • One committed pilot wire output (BLOUT1). • One or more output relays designed for output selective block. Only when the committed pilot wire are used the continuity check of the pilot wire link is active. Use of committed pilot wire input BLIN1: • The protection is blocked off according the selectivity block criteria when the input BLIN1 is active. The information about phase or phase+earth block may be select programming the ModeBLIN1 parameter inside the Set \ Profile A(or B) \ Selective block-BLOCK2 \ Selective block IN menus. Use of binary inputs: • If the I>BLK2IN, I>>BLK2IN and/or I>>>BLK2IN parameters are set to ON and a binary input is designed for selective block (Block2), the protection is blocked off by phase elements (Block2 Iph) or by any protection element (Block2 Iph/IE) according the selectivity block criteria.[2] The enable I>BLK2IN, I>>BLK2IN and/or I>>>BLK2IN parameters are available inside the Set \ Profile A(or B) \ Phase overcurrent-50/51 \ I> Element (I>> Element, I>>> Element) \ Setpoints menus, while the Block2 Iph and Block2 Iph/IE functions must be assigned to the selected binary inputs inside the Set \ Inputs \ Binary input IN1(x) menus (IN1 or IN2 matching). Use of committed pilot wire output BLOUT1: • The information about phase or phase+earth block may be select programming the ModeBLOUT1 parameter (OFF - ON IPh - ON IPh/IE - ON IE) inside Set \Profile A(or B) \ Selective block- BLOCK2 \ Selective block OUT menus. Use of output relay (K1...K6): • If the I>BLK2OUT, I>>BLK2OUT and/or I>>>BLK2OUT enable parameters are set to ON and a output relay is designed for selective block (Block2), the protection issues a block output by phase elements (BLK2OUT-Iph) or by any protection element (BLK2OUT-Iph/IE), whenever the given element (Start I>, Start I>> e/o Start I>>>) becomes active. The enable I>BLK2OUT, I>>BLK2OUT and/or I>>>BLK2OUT parameters (ON or OFF) are available inside the Set \ Profile A(or B) \ Phase overcurrent-50/51 \ I> Element (I>> Element, I>>> Element) \ Setpoints menus, while the BLK2OUT-Iph-K, BLK2OUT-Iph/IE-K and/or BLK2OUT-IE-K output relays and LEDs (BLK2OUT-Iph-L, BLK2OUT-Iph/IE-L e/o BLK2OUT-IE-L) must be select inside the Set \ Profile A(or B) \ Selective block-BLOCK2 \ Selective block OUT menu. Internal selective block (Block4) As well as to send or transmit a selective block toward other protective relays, each protective element may be enabled for receive or transmit a selective block from/to other internal protective elements.[3] The internal selective block of one or more element concerning the phase overcurrent function may be enabled/disabled by means the I>BLK4, I>>BLK4, and/or I>>>BLK4 parameters (virtual input and output common to all protective thresholds); the following operating modes are available: • IN - the element is enabled to receive the selective block from an internal input. • OUT - the element is enabled to send the selective block to an internal output. • OFF - the element is disabled to send/receive the internal selective block. Transmission and reception for the same element is not allowed, so any stall situation due to wrong setting is avoided. The internal selective block can work together with an external selective block from other protective relays (Block2). Note 1 The exhaustive treatment of the logical block (Block 1) function may be found in the “Logic Block” paragraph inside CONTROL AND MONITOR- ING section Note 2 The exhaustive treatment of the selective block (Block 2) function may be found in the “Selective Block” paragraph inside CONTROL AND MONITORING section Nota 3 The exhaustive treatment of the internal selective block (Block 4) function may be found in the “Internal selective block” paragraph inside CONTROL AND MONITORING section.

Fun_50-51S1.ai IL1 IL2 t >RES T 0 RESET t > 0 T ≥1 ≥1 ≥1 t >def t >inv t >RES Start I> Trip I> CB-State Start I2ndh> ON≡Inhibit (from I>> and/or I>>> overcurrent element) ON≡Enable I> overcurrent element (Pickup within CLP) (Pickup outside CLP) I> inhibition Block1, Block2, Block4 & T 0 tCLP> & 2nd harmonic restraint enable (ON≡Enable) I>2ndh-REST ICLP>Mode ICLP>def t CLP> ICLP>inv IL1 ≥ I> BF Enable (ON≡Enable) I>BF towards BF logic I> BF & Trip I> TRIPPING MATRIX (LED+RELAYS) I> Curve 0 T A B C A =“1” A =“0 or OFF” Output tCLP> IL3 I> Enable I> overcurrent element (50/51) block diagram tCLP> CB State CB OPEN CB CLOSED CB OPEN Output tCLP> t 0.1 s HIGH THRESHOLD/ BLOCK LOW THRESHOLD/ UNBLOCK HIGH THRESHOLD/ BLOCK A = ON - Change setting B = OFF C = ON - Element blocking I>TR-K I>TR-L I>ST-L I>ST-K ≥1 CLP I> & State I>inv IL1 ≥ I>def IL1 ≥ I>inv I>def & State Phase overcurrent (50/51) - First element logic diagram (I>)

Phase overcurrent (50/51) - Logic diagram of the blocking signals concerning the first element (I>) Pilot wire output TRIPPING MATRIX (LED+RELAYS) ModeBLOUT1 A B C D BLOUT1 Block2 output ≥1 tF-IPh tF-IPh/IE tF-IE ST-Iph BLK2 ST-IE BLK2 & Block2 output (ON≡Enable) I>BLK2OUT Start I> ≥1 T 0 tF-IPh/IE T 0 tF-IPh T 0 tF-IE I> Block2 OUT BLK2OUT-Iph BLK2OUT-Iph/IE BLK2OUT-IE A = OFF B = ON IPh C = ON IPh/IE D = ON IE BLK2OUT-IPh-K BLK2OUT-IPh-L BLK2OUT-IPh/IE-K BLK2OUT-IPh/IE-L BLK2OUT-IE-K BLK2OUT-IE-L Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Block2 IPh Block2 IPh/IE ModeBLIN1 T 0 tB-Iph 50-51S1_BL-diagram.ai ≥1 ≥1 ≥1 ≥1 tB-Iph tFI-Iph tB-IE BLK1I> BLK4IN I> & & & BLK2IN I> & & Enable (ON≡Enable) I>BLK1 Block2 input enable (ON≡Enable) Pilot wire input & I>BLK2IN Block1 BLK2IN-Iph Start I> Trip I> ST-IE BLK4 ST-Iph BLK4 Iph Block2 IE Block2 Block4 enable BLK2IN-IE tB timeout Block2 input tB-K tB-L Block1 FROM EARTH FAULT PROTECTIONS FROM ANY PROTECTIONS OFF ON IPh ON IPh/IE ON IE BLIN1 ≥1 ≥1 tFI-IE Block4 OUT ≥1 T 0 tFI-Iph T 0 tFI-IE I>> Block4 I/O I> Block4 I/O I> Block4 OUT Block4 Block4 I>>> Block4 I/O DthAL1 Block4 I/O DthAL2 Block4 I/O Dth Block4 I/O I>> Block2 OUT I>>> Block2 OUT DthAL1 Block2 OUT DthAL2 Block2 OUT Dth Block2 OUT IE>> Block4 I/O IE> Block4 I/O IE>>> Block4 I/O IED>> Block4 I/O IED> Block4 I/O IED>>> Block4 I/O IED>>>> Block4 I/O ≥1 IE>> Block2 OUT IE> Block2 OUT IE>>> Block2 OUT IED>> Block2 OUT IED> Block2 OUT IED>>> Block2 OUT IED>>>> Block2 OUT Block4 Block1 T 0 tB-IE Block2 IE ≥1 Block1, Block2, Block4 TRIPPING MATRIX (LED+RELAYS) ≥1 ≥1 A = IN B = OFF C = OUT A = IN B = OFF C = OUT I>BLK4 Start I> C B A “0” “0” B “0” C “0” I>BLK4 A

Fun_50-51S2.ai t >>RES T 0 RESET t >> 0 T ≥1 t >>def t >>inv t >>RES Start I>> Trip I>> CB-State Start I2ndh> ON≡Inhibit (from I>>> overcurrent element) ON≡Enable I>> overcurrent element I>> inhibition Block1, Block2, Block4 I>>TR-K I>>TR-L I>>ST-L I>>ST-K T 0 tCLP>> & & 2nd harmonic restraint enable (ON≡Enable) I>>2ndh-REST ICLP>>Mode t CLP>> BF Enable (ON≡Enable) I>>BF towards BF logic I>> BF & Trip I>> TRIPPING MATRIX (LED+RELAYS) I>> Curve 0 T A B C Output tCLP>> I>> Enable I>> overcurrent element (50/51) Block diagram tCLP>> CB State CB OPEN CB CLOSED CB OPEN Output tCLP>> t 0.1 s HIGH THRESHOLD/ BLOCK LOW THRESHOLD/ UNBLOCK HIGH THRESHOLD/ BLOCK A = ON - Change setting B = OFF C = ON - Element blocking & (ON≡Inhibit) Start I>> I> inhibition I> disbyl>> ≥1 CLP I>> IL1 IL2 ≥1 ≥1 (Pickup within CLP) (Pickup outside CLP) ICLP>>def ICLP>>inv IL1 ≥ I>> A =“1” A =“0 or OFF” IL3 & State I>>inv IL1 ≥ I>>def IL1 ≥ I>>inv I>>def & State Phase overcurrent (50/51) - Second element logic diagram (I>>)

Phase overcurrent (50/51) - Logic diagram of the blocking signals concerning the second element (I>>) Pilot wire output TRIPPING MATRIX (LED+RELAYS) ModeBLOUT1 A B C D BLOUT1 Block2 output ≥1 tF-IPh tF-IPh/IE tF-IE ST-Iph BLK2 ST-IE BLK2 & Block2 output (ON≡Enable) I>>BLK2OUT Start I>> ≥1 T 0 tF-IPh/IE T 0 tF-IPh T 0 tF-IE I> Block2 OUT BLK2OUT-Iph BLK2OUT-Iph/IE BLK2OUT-IE A = OFF B = ON IPh C = ON IPh/IE D = ON IE BLK2OUT-IPh-K BLK2OUT-IPh-L BLK2OUT-IPh/IE-K BLK2OUT-IPh/IE-L BLK2OUT-IE-K BLK2OUT-IE-L Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Block2 IPh Block2 IPh/IE ModeBLIN1 T 0 tB-Iph 50-51S2_BL-diagram.ai ≥1 ≥1 ≥1 ≥1 tB-Iph tFI-Iph tB-IE BLK1I>> BLK4IN I>> & & & BLK2IN I>> & & Enable (ON≡Enable) I>>BLK1 Block2 input enable (ON≡Enable) Pilot wire input & I>>BLK2IN Block1 BLK2IN-Iph Start I>> Trip I>> ST-IE BLK4 ST-Iph BLK4 Iph Block2 IE Block2 Block4 enable BLK2IN-IE tB timeout Block2 input tB-K tB-L Block1 FROM EARTH FAULT PROTECTIONS FROM ANY PROTECTIONS OFF ON IPh ON IPh/IE ON IE BLIN1 ≥1 ≥1 tFI-IE Block4 OUT ≥1 T 0 tFI-Iph T 0 tFI-IE I>> Block4 I/O I> Block4 I/O I>> Block4 OUT Block4 Block4 I>>> Block4 I/O DthAL1 Block4 I/O DthAL2 Block4 I/O Dth Block4 I/O I>> Block2 OUT I>>> Block2 OUT DthAL1 Block2 OUT DthAL2 Block2 OUT Dth Block2 OUT IE>> Block4 I/O IE> Block4 I/O IE>>> Block4 I/O IED>> Block4 I/O IED> Block4 I/O IED>>> Block4 I/O IED>>>> Block4 I/O ≥1 IE>> Block2 OUT IE> Block2 OUT IE>>> Block2 OUT IED>> Block2 OUT IED> Block2 OUT IED>>> Block2 OUT IED>>>> Block2 OUT Block4 Block1 T 0 tB-IE Block2 IE ≥1 Block1, Block2, Block4 TRIPPING MATRIX (LED+RELAYS) ≥1 ≥1 A = IN B = OFF C = OUT A = IN B = OFF C = OUT I>>BLK4 Start I>> C B A “0” “0” B “0” C “0” I>>BLK4 A

Fun_50-51S3.ai t >>>RES T 0 RESET t >>>def 0 T ≥1 t >>>def t >>>RES Start I>>> Trip I>>> CB-State Start I2ndh> ON≡Enable 3rd overcurrent element Block1, Block2, Block4 & I>>>TR-K I>>>TR-L I>>>ST-L I>>>ST-K T 0 tCLP>>> & 2nd harmonic restraint enable (ON≡Enable) I>>>2ndh-REST ICLP>>>Mode t CLP>>> BF Enable (ON≡Enable) I>>>BF towards BF logic I>>> BF & Trip I>>> TRIPPING MATRIX (LED+RELAYS) A B C Output tCLP>>> I>>> Enable I>>> overcurrent element (50/51) Block diagram tCLP>>> Output tCLP>>> CB State CB OPEN CB CLOSED CB OPEN t 0.1 s HIGH THRESHOLD/ BLOCK LOW THRESHOLD/ UNBLOCK HIGH THRESHOLD/ BLOCK A = ON - Change setting B = OFF C = ON - Element blocking & (ON≡Inhibit) Start I>>> Start I>>> Start I>>> (ON≡Inhibit) I> inhibition I> disbyl>>> & I>> inhibition I>> disbyl>>> ≥1 CLP I>>> IL1 IL2 ≥1 (Pickup within CLP) (Pickup outside CLP) ICLP>>def ICLP>>inv IL1 ≥ I>>> A =“1” A =“0 or OFF” IL3 & State IL1 ≥ I>>>def I>>>def Phase overcurrent (50/51) - Third element logic diagram (I>>>)

Phase overcurrent (50/51) - Logic diagram of the blocking signals concerning the third element (I>>>) Pilot wire output TRIPPING MATRIX (LED+RELAYS) ModeBLOUT1 A B C D BLOUT1 Block2 output ≥1 tF-IPh tF-IPh/IE tF-IE ST-Iph BLK2 ST-IE BLK2 & Block2 output (ON≡Enable) I>>>BLK2OUT Start I>>> ≥1 T 0 tF-IPh/IE T 0 tF-IPh T 0 tF-IE I> Block2 OUT BLK2OUT-Iph BLK2OUT-Iph/IE BLK2OUT-IE A = OFF B = ON IPh C = ON IPh/IE D = ON IE BLK2OUT-IPh-K BLK2OUT-IPh-L BLK2OUT-IPh/IE-K BLK2OUT-IPh/IE-L BLK2OUT-IE-K BLK2OUT-IE-L Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Block2 IPh Block2 IPh/IE ModeBLIN1 T 0 tB-Iph 50-51S3_BL-diagram.ai ≥1 ≥1 ≥1 ≥1 tB-Iph tFI-Iph tB-IE BLK1I>>> BLK4IN I>>> & & & BLK2IN I>>> & & Enable (ON≡Enable) I>>>BLK1 Block2 input enable (ON≡Enable) Pilot wire input & I>>>BLK2IN Block1 BLK2IN-Iph Start I>>> Trip I>>> ST-IE BLK4 ST-Iph BLK4 Iph Block2 IE Block2 Block4 enable BLK2IN-IE tB timeout Block2 input tB-K tB-L Block1 FROM EARTH FAULT PROTECTIONS FROM ANY PROTECTIONS OFF ON IPh ON IPh/IE ON IE BLIN1 ≥1 ≥1 tFI-IE Block4 OUT ≥1 T 0 tFI-Iph T 0 tFI-IE I>> Block4 I/O I> Block4 I/O I>>> Block4 OUT Block4 Block4 I>>> Block4 I/O DthAL1 Block4 I/O DthAL2 Block4 I/O Dth Block4 I/O I>> Block2 OUT I>>> Block2 OUT DthAL1 Block2 OUT DthAL2 Block2 OUT Dth Block2 OUT IE>> Block4 I/O IE> Block4 I/O IE>>> Block4 I/O IED>> Block4 I/O IED> Block4 I/O IED>>> Block4 I/O IED>>>> Block4 I/O ≥1 IE>> Block2 OUT IE> Block2 OUT IE>>> Block2 OUT IED>> Block2 OUT IED> Block2 OUT IED>>> Block2 OUT IED>>>> Block2 OUT Block4 Block1 T 0 tB-IE Block2 IE ≥1 Block1, Block2, Block4 TRIPPING MATRIX (LED+RELAYS) ≥1 ≥1 A = IN B = OFF C = OUT A = IN B = OFF C = OUT I>>>BLK4 Start I>>> C B A “0” “0” B “0” C “0” I>>>BLK4 A

Residual overcurrent - 50N/51N Preface Three operation thresholds, independently adjustable (IE>, IE>>, IE>>>) with adjustable delay (tE>, tE>>, tE>>>). The first one (IE>) may be programmed with definite or inverse time according the IEC and ANSI/IEEE standard, as well as with EM curve. The second and third thresholds (IE>>, IE>>>) with independent time. For each threshold a reset time can be set (tE>RES, tE>>RES, tE>>>RES) useful to reduce the clearing time for intermittent faults. The first threshold trip may be inhibited by start of the second and/or third threshold (IE>>, IE>>>). Similarly the second threshold trip may be inhibited by start of the third threshold (IE>>>). Operation and settings The residual fundamental frequency current is compared with the setting value. Current above the associated pickup value is detected and a start is issued. After expiry of the associated operate time a trip command is issued; if instead the current drops below the threshold, the element is restored. The first threshold (IE>) may be programmed with definite or inverse time according the following characteristic curves: • Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · tE>inv / [(IE/IE>inv)0.02 - 1] • Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · tE>inv / [(IE/IE>inv) - 1] • Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · tE>inv / [(IE/IE>inv)2 - 1] • Moderately Inverse (ANSI/IEEE type MI): t = tE>inv · {0.01 / [(IE/IE>inv)0.02 - 1] + 0.023} • Very Inverse (ANSI/IEEE type VI): t = tE>inv · {3.922 / [(IE/IE>inv)2 - 1] + 0.098} • Extremely Inverse (ANSI/IEEE type EI): t = tE>inv · {5.64 / [(IE/IE>inv)2 - 1] + 0.024} • Electromechanical (EM): t = tE>inv · {0.28 / [-0236 · (IE/IE>inv)-1 + 0.339]} Where: t: operate time IE >: pickup value tE >inv: operate time setting For all inverse time characteristics, following data applies: • Asymptotic reference value (minimum pickup value): 1.1 IE> • Minimum operate time: 0.1 s • Range where the equation is valid:[1] 1.1 ≤ IE/IE>inv ≤ 20 • If IE>inv pickup ≥ 2.5 IEn, the upper limit is 10 IEn For all definite time elements the upper limit for measuring is 10 IEn. All residual overcurrent elements can be enabled or disabled by setting ON or OFF the IE> En- able, IE>> Enable and/or IE>>> Enable parameters inside the Set \ Profile A(or B)\ Residual overcurrent-50N/51N \ IE> Element (IE>> Element, IE>>> Element) \ Setpoints menus. The first overcurrent element can be programmed with definite or inverse time characteristic by setting the IE>Curve parameter (DEFINITE, IEC/BS A, IEC/BS B, IEC/BS C, ANSI/IEE MI, ANSI/IEE VI, ANSI/IEE EI, EM) available inside the Set \ Profile A(or B) \ Residual overcurrent- 50N/51N \ IE> Element \ Setpoints menu. Note 1 When the input value is more than 20 times the set point , the operate time is limited to the value corresponding to 20 times the set point t-int-F50N-51N.ai IE IE>> IE>>> tE> tE>> tE>>> IE> t TRIP General operation time characteristic for the residual overcurrent elements - 50N/51N

The trip of IE> element may be inhibited by the start of the second and/or third el- ement (IE>>, IE>>>) by setting ON the Disable IE> by start IE>>, Disable IE> by start IE>>> (IE>disbyIE>>, IE>disbyIE>>>) parameters available inside the Set \ Profile A(or B) \ Residual overcurrent-50N/51N \ IE>> Element (IE>>> Element) \ Setpoints menus. Similarly the trip of the IE>> element may be inhibited by start of the third element (IE>>>) by setting ON the Disable IE>> by start IE>>> (IE>>disbyIE>>>) parameter available inside the Set \ Profile A(or B) \ Residual overcurrent-50N/51N \ IE>>> Element \Setpoints menu. All the named parameters can be set separately for Profile A and Profile B (Set \ Profile A(or B) \ Residual overcurrent-50N/51N \ IE> Element (IE>> Element, IE>>> Element) \ Setpoints menus). An adjustable reset time delay is provided for every threshold tE>RES, tE>>RES, tE>>>RES). Each residual overcurrent element can produce the Breaker Failure output if the IE> BF, IE>> BF and/or IE>>> BF parameters are set to ON. The parameters are available inside the Se \ Profile A(or B) \ Residual overcurrent-50N/51N \ IE> Element (IE>> Element, IE>>> Element) \ Setpoints menus.[1] For all overcurrent elements, a block from the second harmonic restraint may be set by setting ON the IE>2ndh-REST, IE>>2ndh-REST, IE>>>2ndh-REST parameters inside the Set \ Profile A(or B) \ Residual overcurrent-50N/51N \ IE> Element (IE>> Element, IE>>> Element) \ Setpoints menus. If the CLP function (Cold Load Pick-up) is enabled for element blocking, the selected threshold may be blocked for an adjustable time interval, starting from the circuit breaker closure. This operating mode may be select by setting ON-Element blocking the IECLP> Mode, IECLP>> Mode, IECLP>>> Mode parameters. If the CLP function (Cold Load Pick-up) is enabled for threshold change, the selected threshold may be changed for an adjustable time interval, starting from the circuit breaker closure. This operating mode (ON-Change setting = IECLP> Mode, IECLP>> Mode, IECLP>>> Mode) and the concerning operating time within the CLP (tECLP>, tECLP>>, tECLP>>>) may be adjusted inside the Set \ Profile A(or B) \ Residual overcurrent-50N/51N \ IE> Element (IE>> Element, IE>>> Element) \ Setpoints menus, whereas the operating thresholds within the CLP ( IECLP>def, IECLP>inv,....) may be adjusted inside the Set \ Profile A(or B)\ Residual overcurrent-50N/51N \ IE> Element (IE>> Element, IE>>> Element) \ Definite time (Inverse time) menus. For every of the four thresholds the following block criteria are available: Logical block (Block1) If the IE>BLK1, IE>>BLK1 and/or IE>>>BLK1 enabling parameters are set to ON and a bi- nary input is designed for logical block (Block1), the concerning element is blocked off whenever the given input is active.[2] The enabling parameters are available inside the Set \ Profile A(or B)\ Residual overcurrent-50N/51N \ IE> Element (IE>> Element, IE>>> Element) \ Setpoints menus, while the Block1 function must be assigned to the selected binary input inside the Set \ Inputs \ Binary input IN1(x) menus. Selective block (Block2) All along the protective elements the selective block may be set. The logic selectivity function may be performed by means any combination of the following I/O: • One committed pilot wire input (BLIN1). • One or more binary inputs designed for input selective block. • One committed pilot wire output (BLOUT1). • One or more output relays designed for output selective block. Note 1 The common settings concerning the Breaker failure protection are adjustable inside the Breaker Failure - BF menu. Note 2 The exhaustive treatment of the logical block (Block 1) function may be found in the “Logic Block” paragraph inside CONTROL AND MONITOR- ING section Timers-F50N-51N.ai IE> element residual overcurrent (50N/51N) - Timers IE> Start IE> Trip tE> tE> RESET INPUT tE>RES tE>RES tE>RES t

IE IE IE tE>> def IECLP>> def IE>> def IECLP>>Mode tECLP>> tE>>RES IE>> Enable tE>>> def IECLP>>> def IE>>> def IECLP>>>Mode tECLP>>> tE>>>RES IE>>> Enable tE> def IECLP> def IE> def tE> inv IECLP> inv IE> inv IE>Curve IECLP>Mode tECLP> tE>RES IE> Enable all-F50N-51N.ai General logic diagram of the residual overcurrent elements - 50N/51N ≥ IE>> inhibition BLK1IE>>> IE>>>BF IE>>> Element Start IE>>> Start IE>>> Start IE>>> Trip IE>>> Trip IE>>> & IE>> disbyIE>>> & IE>>>BLK2IN & IE> disbyIE>>> BLK1IE>> IE>> Element BLK2OUT Start IE>> Start IE>> Trip IE>> & IE> disbyIE>> & IE>>BLK1 & IE>>BLK2IN IE> inhibition Block1 BLK1IE> CLPIE> CLPIE>> CLPIE>>> IE> Element BLK2OUT BLK4OUT BLK4OUT BLK2INIE> BLK2INIE>> Start IE> Trip IE> & IE>BLK1 Block2 & IE>BLK2IN Start I2ndh> & IE>2ndh-REST IE>BLK2OUT Start I2ndh> & IE>>2ndh-REST Start I2ndh> & IE>>>2ndh-REST & IE>>>BF IE>>BF IE>> Trip & IE>>BF IE>BF Trip I> & IE>BF Start IE> & IE>>BLK2OUT Start IE>> & BLK2OUT IE>>>BLK2OUT Start IE>>> & IE>BLK4 Start IE> & IE>>BLK4 Start IE>> & BLK4OUT IE>>>BLK4 Start IE>>> & Block1 Block2 & IE>>>BLK1 Block1 Block2 Start I> & Start IE>> & Start IE>>> & Start IE>> & BLK2INIE>>> Start IE>>> & Start I> &

Only when the committed pilot wire are used the continuity check of the pilot wire link is active. Use of committed pilot wire input BLIN1: • The protection is blocked off according the selectivity block criteria when the input BLIN1 is active. The information about phase or phase+earth block may be select programming the ModeBLIN1 parameter inside the Set \ Profile A(or B) \ Selective block-BLOCK2 \ Selective block IN menus. Use of binary inputs: • If the IE>BLK2IN, IE>>BLK2IN and/or IE>>>BLK2IN parameters are set to ON and a binary input is designed for selective block (Block2), the protection is blocked off by phase ele- ments (Block2 Iph) or by any protection element (Block2 Iph/IE) according the selectivity block criteria.[1] The enable IE>BLK2IN, IE>>BLK2IN and/or IE>>>BLK2IN parameters are avail- able inside the Set \ Profile A(or B) \ Residual overcurrent-50N/51N \ IE> Element (IE>> Element, IE>>> Element) \ Setpoints menus, while the Block2 Iph and Block2 Iph/IE functions must be assigned to the selected binary inputs inside the Set \ Inputs \ Binary input IN1(x) menus (IN1 or IN2 matching). Use of committed pilot wire output BLOUT1: • The information about phase or phase+earth block may be select programming the ModeBLOUT1 parameter (OFF - ON IPh - ON IPh/IE - ON IE) inside Set \ Profile A(or B) \ Selective block- BLOCK2 \ Selective block OUT menus. Use of output relay (K1...K6): • If the IE>BLK2OUT, IE>>BLK2OUT and/or IE>>>BLK2OUT enable parameters are set to ON and a output relay is designed for selective block (Block2), the protection issues a block output by phase elements (BLK2OUT-Iph) or by any protection element (BLK2OUT-Iph/IE), whenever the given element (Start IED>, Start IED>>, Start IED>>> and/or Start IED>>>>) becomes active. The enable IED>BLK2OUT, IED>>BLK2OUT, IED>>>BLK2OUT and/or IED>>>>BLK2OUT parameters (ON or OFF) are available inside the Set \ Profile A(or B) \ Residual overcurrent- 50N/51N \ IE> Element (IE>> Element, IE>>> Element) \ Setpoints menus, while the BLK2OUT- Iph-K, BLK2OUT-Iph/IE-K and/or BLK2OUT-IE-K output relays and LEDs (BLK2OUT-Iph-L, BLK2OUT-Iph/IE-L e/o BLK2OUT-IE-L) must be select inside the Set \ Profile A(or B) \ Selec- tive block-BLOCK2 \ Selective block OUT menu. Internal selective block (Block4) As well as to send or transmit a selective block toward other protective relays, each protective element may be enabled for receive or transmit a selective block from/to other internal protective elements.[2] The internal selective block of one or more element concerning the residual overcurrent function may be enabled/disabled by means the IE>BLK4, IE>>BLK4 and/or IE>>>BLK4 parameters (virtual input and output common to all protective thresholds); the following operating modes are available: • IN - the element is enabled to receive the selective block from an internal input. • OUT - the element is enabled to send the selective block to an internal output. • OFF - the element is disabled to send/receive the internal selective block. Transmission and reception for the same element is not allowed, so any stall situation due to wrong setting is avoided. The internal selective block can work together with an external selective block from other protective relays (Block2). Note 1 The exhaustive treatment of the selective block (Block 2) function may be found in the “Selective Block” paragraph inside CONTROL AND MONITORING section Nota 2 The exhaustive treatment of the internal selective block (Block 4) function may be found in the “Internal selective block” paragraph inside CONTROL AND MONITORING section.

0 T RESET tE> 0 T Fun_50N-51NS1.ai t >RES T 0 ≥1 tE>def tE>inv tE>RES Start IE> Trip IE> CB-State Start I2ndh> ON≡Inhibit (from IE>> and/or IE>>> residual overcurrent element) ON≡Enable IE> residual overcurrent element IE> inhibition Block1, Block2, Block4 & T 0 tECLP> & 2nd harmonic restraint enable (ON≡Enable) IE>2ndh-REST IECLP>Mode tECLP> BF Enable (ON≡Enable) IE>BF towards BF logic IE> BF & Trip IE> TRIPPING MATRIX (LED+RELAYS) IE> Curve A B C A =“1” A =“0 or OFF” Output tECLP> IE> Enable IE> residual overcurrent element (50N/51N) Block diagram tECLP> CB State CB OPEN CB CLOSED CB OPEN Output tECLP> t 0.1 s HIGH THRESHOLD/ BLOCK LOW THRESHOLD/ UNBLOCK HIGH THRESHOLD/ BLOCK A = ON - Change setting B = OFF C = ON - Element blocking IE>TR-K IE>TR-L IE>ST-L IE>ST-K ≥1 CLP IE> IE ≥1 (Pickup within CLP) (Pickup outside CLP) IECLP>def IECLP>inv IE ≥ IECLP> & State IE>inv IE ≥ IE>def IE ≥ IE>inv IE>def & State Residual overcurrent (50N/51N) - First element logic diagram (IE>)

Residual overcurrent (50N/51N) - Logic diagram of the blocking signals concerning the first element (IE>) IE>BLK1 Start IE> Start IE> Start IE> Trip IE> Pilot wire output TRIPPING MATRIX (LED+RELAYS) ModeBLOUT1 A B C D BLOUT1 Block2 output ≥1 tF-IPh tF-IPh/IE tF-IE ST-Iph BLK2 ST-IE BLK2 & Block2 output (ON≡Enable) IE>BLK2OUT T 0 tF-IPh/IE T 0 tF-IPh T 0 tF-IE BLK2OUT-Iph BLK2OUT-Iph/IE BLK2OUT-IE A = OFF B = ON IPh C = ON IPh/IE D = ON IE BLK2OUT-IPh-K BLK2OUT-IPh-L BLK2OUT-IPh/IE-K BLK2OUT-IPh/IE-L BLK2OUT-IE-K BLK2OUT-IE-L Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Block2 IPh Block2 IPh/IE ModeBLIN1 T 0 tB-Iph 50N-51NS1_BL-diagram.ai ≥1 ≥1 ≥1 ≥1 tB-Iph tFI-Iph tB-IE BLK1IE> BLK4IN IE> & & & BLK2IN IE> & & Enable (ON≡Enable) Block2 input enable (ON≡Enable) Pilot wire input & IE>BLK2IN Block1 BLK2IN-Iph ST-IE BLK4 ST-Iph BLK4 Iph Block2 IE Block2 Block4 enable BLK2IN-IE tB timeout Block2 input tB-K tB-L Block1 FROM EARTH FAULT PROTECTIONS FROM ANY PROTECTIONS OFF ON IPh ON IPh/IE ON IE BLIN1 ≥1 ≥1 tFI-IE Block4 OUT ≥1 T 0 tFI-Iph T 0 tFI-IE I>> Block4 I/O I> Block4 I/O IE> Block4 OUT Block4 Block4 Phase elements ≥1 I>> Block4 I/O I> Block4 I/O Phase elements IE>> Block4 I/O IE> Block4 I/O IE>>> Block4 I/O IED>> Block4 I/O IED> Block4 I/O IED>>> Block4 I/O IED>>>> Block4 I/O ≥1 IE>> Block2 OUT IE> Block2 OUT IE>>> Block2 OUT IED>> Block2 OUT IED> Block2 OUT IED>>> Block2 OUT IED>>>> Block2 OUT Block4 Block1 T 0 tB-IE Block2 IE ≥1 Block1, Block2, Block4 TRIPPING MATRIX (LED+RELAYS) ≥1 ≥1 A = IN B = OFF C = OUT A = IN B = OFF C = OUT IE>BLK4 C B A “0” “0” B “0” C “0” IE>BLK4 A

Fun_50N-51NS2.ai tE>>RES T 0 RESET tE>>def 0 T ≥1 tE>>def tE>>RES Start IE>> Trip IE>> CB-State Start I2ndh> IE>> inhibition Block1, Block2, Block4 & IE>>TR-K IE>>TR-L IE>>ST-L IE>>ST-K T 0 tECLP>> & 2nd harmonic restraint enable (ON≡Enable) IE>>2ndh-REST IECLP>>Mode tECLP>> BF Enable (ON≡Enable) IE>>BF towards BF logic IE>> BF & Trip IE>> TRIPPING MATRIX (LED+RELAYS) A B C Output tECLP>> IE>> Enable IE>> residual overcurrent element (50N/51N) Block diagram tECLP>> CB State CB OPEN CB CLOSED CB OPEN Output tECLP>> t 0.1 s HIGH THRESHOLD/ BLOCK LOW THRESHOLD/ UNBLOCK HIGH THRESHOLD/ BLOCK A = ON - Change setting B = OFF C = ON - Element blocking & (ON≡Inhibit) Start IE>> Start IE>> IE> inhibition IE> disbylE>> ≥1 CLP IE>> ON≡Inhibit (from IE>>> residual overcurrent element) ON≡Enable IE>> residual overcurrent element IE>>def A =“1” A =“0 or OFF” IE (Pickup within CLP) (Pickup outside CLP) IECLP>>def IE ≥ IECLP>>def & State IE ≥ IE>>def Residual overcurrent (50N/51N) - Second element logic diagram (IE>>)

Residual overcurrent (50N/51N) - Logic diagram of the blocking signals concerning the second element (IE>>) IE>>BLK1 Start IE>> Start IE>> Start IE>> Trip IE>> Pilot wire output TRIPPING MATRIX (LED+RELAYS) ModeBLOUT1 A B C D BLOUT1 Block2 output ≥1 tF-IPh tF-IPh/IE tF-IE ST-Iph BLK2 ST-IE BLK2 & Block2 output (ON≡Enable) IE>>BLK2OUT T 0 tF-IPh/IE T 0 tF-IPh T 0 tF-IE BLK2OUT-Iph BLK2OUT-Iph/IE BLK2OUT-IE A = OFF B = ON IPh C = ON IPh/IE D = ON IE BLK2OUT-IPh-K BLK2OUT-IPh-L BLK2OUT-IPh/IE-K BLK2OUT-IPh/IE-L BLK2OUT-IE-K BLK2OUT-IE-L Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Block2 IPh Block2 IPh/IE ModeBLIN1 T 0 tB-Iph 50N-51NS2_BL-diagram.ai ≥1 ≥1 ≥1 ≥1 tB-Iph tFI-Iph tB-IE BLK1IE>> BLK4IN IE>> & & & BLK2IN IE>> & & Enable (ON≡Enable) Block2 input enable (ON≡Enable) Pilot wire input & IE>>BLK2IN Block1 BLK2IN-Iph ST-IE BLK4 ST-Iph BLK4 Iph Block2 IE Block2 Block4 enable BLK2IN-IE tB timeout Block2 input tB-K tB-L Block1 FROM EARTH FAULT PROTECTIONS FROM ANY PROTECTIONS OFF ON IPh ON IPh/IE ON IE BLIN1 ≥1 ≥1 tFI-IE Block4 OUT ≥1 T 0 tFI-Iph T 0 tFI-IE I>> Block4 I/O I> Block4 I/O IE>> Block4 OUT Block4 Block4 Phase elements ≥1 I>> Block4 I/O I> Block4 I/O Phase elements IE>> Block4 I/O IE> Block4 I/O IE>>> Block4 I/O IED>> Block4 I/O IED> Block4 I/O IED>>> Block4 I/O IED>>>> Block4 I/O ≥1 IE>> Block2 OUT IE> Block2 OUT IE>>> Block2 OUT IED>> Block2 OUT IED> Block2 OUT IED>>> Block2 OUT IED>>>> Block2 OUT Block4 Block1 T 0 tB-IE Block2 IE ≥1 Block1, Block2, Block4 TRIPPING MATRIX (LED+RELAYS) ≥1 ≥1 A = IN B = OFF C = OUT A = IN B = OFF C = OUT IE>>BLK4 C B A “0” “0” B “0” C “0” IE>>BLK4 A

Fun_50N-51NS3.ai tE>>>RES T 0 RESET tE>>>def 0 T ≥1 tE>>>def tE>>>RES Start IE>>> Trip IE>>> CB-State Start I2ndh> ON≡Enable IE>>> residual overcurrent element Block1, Block2, Block4 & IE>>>TR-K IE>>>TR-L IE>>>ST-L IE>>>ST-K T 0 tECLP>>> & 2nd harmonic restraint enable (ON≡Enable) IE>>>2ndh-REST IECLP>>>Mode tECLP>>> BF Enable (ON≡Enable) IE>>>BF towards BF logic IE>>> BF & Trip IE>>> TRIPPING MATRIX (LED+RELAYS) A B C A = ON - Change setting B = OFF C = ON - Element blocking Output tECLP>>> IE>>> Enable IE>>> residual overcurrent element (50N/51N) Block diagram tECLP>>> CB State CB OPEN CB CLOSED CB OPEN Output tECLP>>> t 0.1 s HIGH THRESHOLD/ BLOCK LOW THRESHOLD/ UNBLOCK HIGH THRESHOLD/ BLOCK & (ON≡Inhibit) Start IE>>> Start IE>>> Start IE>>> (ON≡Inhibit) IE> inhibition IE>disbylE>>> & IE>> inhibition IE>>disbylE>>> ≥1 CLP IE>>> IE>>>def A =“1” A =“0 or OFF” IE (Pickup within CLP) (Pickup outside CLP) IECLP>>>def IE ≥ IECLP>>>def & State IE ≥ IE>>>def Residual overcurrent (50N/51N) - Third element logic diagram (IE>>>)

Residual overcurrent (50N/51N) - Logic diagram of the blocking signals concerning the third element (IE>>>) IE>>>BLK1 Start IE>>> Start IE>>> Start IE>>> Trip IE>>> Pilot wire output TRIPPING MATRIX (LED+RELAYS) ModeBLOUT1 A B C D BLOUT1 Block2 output ≥1 tF-IPh tF-IPh/IE tF-IE ST-Iph BLK2 ST-IE BLK2 & Block2 output (ON≡Enable) IE>>>BLK2OUT T 0 tF-IPh/IE T 0 tF-IPh T 0 tF-IE BLK2OUT-Iph BLK2OUT-Iph/IE BLK2OUT-IE A = OFF B = ON IPh C = ON IPh/IE D = ON IE BLK2OUT-IPh-K BLK2OUT-IPh-L BLK2OUT-IPh/IE-K BLK2OUT-IPh/IE-L BLK2OUT-IE-K BLK2OUT-IE-L Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Block2 IPh Block2 IPh/IE ModeBLIN1 T 0 tB-Iph 50N-51NS3_BL-diagram.ai ≥1 ≥1 ≥1 ≥1 tB-Iph tFI-Iph tB-IE BLK1IE>>> BLK4IN IE>>> & & & BLK2IN IE>>> & & Enable (ON≡Enable) Block2 input enable (ON≡Enable) Pilot wire input & IE>>>BLK2IN Block1 BLK2IN-Iph ST-IE BLK4 ST-Iph BLK4 Iph Block2 IE Block2 Block4 enable BLK2IN-IE tB timeout Block2 input tB-K tB-L Block1 FROM EARTH FAULT PROTECTIONS FROM ANY PROTECTIONS OFF ON IPh ON IPh/IE ON IE BLIN1 ≥1 ≥1 tFI-IE Block4 OUT ≥1 T 0 tFI-Iph T 0 tFI-IE I>> Block4 I/O I> Block4 I/O IE>>> Block4 OUT Block4 Block4 Phase elements ≥1 I>> Block4 I/O I> Block4 I/O Phase elements IE>> Block4 I/O IE> Block4 I/O IE>>> Block4 I/O IED>> Block4 I/O IED> Block4 I/O IED>>> Block4 I/O IED>>>> Block4 I/O ≥1 IE>> Block2 OUT IE> Block2 OUT IE>>> Block2 OUT IED>> Block2 OUT IED> Block2 OUT IED>>> Block2 OUT IED>>>> Block2 OUT Block4 Block1 T 0 tB-IE Block2 IE ≥1 Block1, Block2, Block4 TRIPPING MATRIX (LED+RELAYS) ≥1 ≥1 A = IN B = OFF C = OUT A = IN B = OFF C = OUT IE>>>BLK4 C B A “0” “0” B “0” C “0” IE>>>BLK4 A

Residual overvoltage - 59N Preface Two operation thresholds, independently adjustable (UE>, UE>>) with adjustable delay (tUE>, tUE>>). The first one (UE>) may be programmed with definite or inverse time, while the second threshold operates with definite time characteristic. Each threshold may be separately enabled or disabled. The first threshold trip (UE>) may be inhibited by start of the second threshold (UE>>). Operation and settings The residual voltage (UE) is compared with the setting values (UE>, UE>>); a start is issued when the residual voltage overcomes the adjustable threshold (START); after expiry of the associated operate time (tUE>, tUE>>) a trip command is issued; if instead the voltage drops below the threshold, the element is restored. The first threshold (UE>) may be programmed with definite or inverse time according the following characteristic curve: t=0.5 tUE> / [(UE/UE>inv) - 1] or Where: UE: measured residual voltage t: operate time UE>inv: threshold setting tUE>inv: operate time setting For the inverse time characteristic, following data applies: • The operate time setting is referred to an input voltage equal to 1.5 of the pickup value. • Asymptotic reference value (minimum pickup value): 1.1 UE>inv • Minimum operate time: 0.1 s • Range where the equation is valid: 1.1 ≤ UE/UE>inv ≤ 4 • If UE>inv pickup ≥ 0.5 UEn, the upper limit is 2 UEn. The first residual overvoltage element can be programmed with definite or inverse time character- istic by setting the UE> Curve parameter (DEFINITE, INVERSE) available inside the Set \ Profile A(or B) \ Residual overvoltage-59N \ UE> Element \ Setpoints menu. Each element can be enabled or disabled by setting ON or OFF the UE> Enable parameter inside the Set \ Profile A(or B) \ Residual overvoltage-59N \ UE> Element \ Setpoints menu and/or the State parameter inside the Set \ Profile A(or B) \ Residual overvoltage-59N \ UE>> Element \ Definite time. For both elements, a block of the UE> and UE>> threshold may be select when the 74VT function is active (external). The blocking enabling parameters 74VText59N is available inside the Set \ Pro- file A(or B) \ Residual overvoltage-59N \ Common configuration menu.[1] The first threshold trip (UE>) may be inhibited by start of the second threshold (UE>>) by setting ON the UE> Disabling by UE>> start (UE>disbyUE>>) parameter available inside the Set \ Profile A(or B) \ Residual overvoltage-59N \ UE>> Element \ Setpoints menu. Note 1 The operating time must be adjusted to a greater value than the 74VT activation time (internal or binary input) t-int-F59N.ai UE UE>> tUE> tUE>> UE> t TRIP General operation time characteristic for the residual overvoltage elements - 59N

An adjustable reset time delay is provided for every threshold tUE>RES, tUE>>RES, tUE>>>RES). Both residual overvoltage elements (UE>, UE>>) can produce the Breaker Failure output if the UE>BF and UE>>BF parameters are set to ON. The parameters are available inside the Set \ Profile A(or B) \ Residual overvoltage - 59N \ UE> Element (UE>> Element) \ Setpoints menus.[1] For every of the two thresholds the following block criteria are available: Logical block (Block1) If the UE>BLK1 and/or UE>>BLK1 enabling parameters are set to ON and a binary input is de- signed for logical block (Block1), the protection is blocked off whenever the given input is active. The trip timer is held in reset condition, so the operate time counting starts when the input block goes down.[2] The enabling parameters are available inside the Set \ Profile A(or B) \ Residual over- voltage - 59N \ UE> Element (UE>> Element) \ Setpoints menus, while the Block1 function must be assigned to the selected binary input inside the Set \ Inputs \ Binary input IN1(x) menus (IN1 or INx matching). Note 1 The common settings concerning the Breaker failure protection are adjustable inside the Breaker Failure - BF menu. Note 2 The exhaustive treatment of the logical block (Block 1) function may be found in the “Logic Block” paragraph inside CONTROL AND MONITOR- ING section. Timers-F59N.ai UE> Start UE> Trip tUE> tUE> RESET INPUT tUE>RES tUE>RES tUE>RES t Teimers concerning the first element of residual overvoltage protection- 59N Logic diagram concerning the residual overvoltage element - 59N all-F59N.ai UE UE> Element UE>> Element Start U>> Start UE>> Start UE> Trip UE> Trip UE>> & UE> disbyUE>> U> inhibition tUE> def tUE> inv UE>def tUE>> def tUE>>RES tUE>RES UE>>def UE> inv UE> Curve UE> Enable State Block1 BLK1UE> & UE>BLK1 Start UE> & Block1 BLK1UE>> & UE>>BLK1 Start UE>> & UE>BF Trip UE> & UE>BF & UE & 74VText-Block 74VText-Block 74VText-Block & 74VText Common configuration 74VText59 N

Logic diagram concerning the first threshold (UE>) of the residual overvoltage element - 59N Fun-F59N_S1.ai ≥1 UE> Inhibition (ON≡Inhibit) Block 74VTExt59N (ON≡Inhibit) & UE> Curve 0 T RESET tUE> 0 T TRIPPING MATRIX (LED+RELAYS) tUE>def tUE>inv Start UE> UE>ST-K UE>ST-L Start UE> Trip UE> UE>TR-K UE>TR-L Trip UE> Block1 UE> 74VT ext. Trip UE> BF Enable (ON≡Enable) UE>BF towards BF logic & UE> BF & & & Enable (ON≡Enable) Block1 input (ON≡Block) Block1 Block1 Block1 Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF 74VText. Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF t UE>RES T 0 t UE>RES ON≡Enable UE> residual overvoltage element UE> Enable UE UE>def UE>inv ≥1 & State UE ≥ UE>def UE ≥ UE>inv & State Logic diagram concerning the second threshold (UE>>) of the residual overvoltage element - 59N Fun-F59N_S2.ai ≥1 & RESET tUE>> 0 T TRIPPING MATRIX (LED+RELAYS) tUE>>def Start UE>> UE>>ST-K UE>>ST-L Start UE>> Trip UE>> UE>>TR-K UE>>TR-L Trip UE>> Trip UE>> BF Enable (ON≡Enable) UE>>BF towards BF logic & Block1 UE>> 74VT ext. UE>> BF & & & Enable (ON≡Enable) Block1 input (ON≡Block) Block1 Block1 Block1 Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF 74VText. Binary input INx (x=1,...5) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF t UE>>RES T 0 t UE>>RES UE UE>>def & State UE ≥ UE>>def & (ON≡Inhibit) UE> Inhibition UE>disbyUE>> Block 74VTExt59N (ON≡Inhibit)

Inverse time operating characteristic concerning the first threshold (UE>) of the residual overvoltage element - 59N F_59N-Char.ai 1.1 2 3 4 t UE>= 100 s t UE>= 10 s t UE>= 1 s t UE>= 0.1 s 1.5 0.01 0.1 1 10 100 1000 10000 t [s] Note: match of operating and setting time takes place when UE /UE>inv = 1.5 t =tUE>inv · [(UE /UE>inv) - 1] 0.5 UE /UE>inv

Ground directional overcurrent - 67N Preface Four operation thresholds, independently adjustable (IED>, IED>>, IED>>> ,IED>>>>) with adjustable delay (tED>, tED>>, tED>>>, tED>>>>). Each element can be enabled or disabled. The first two may be programmed with definite or inverse time according the IEC and ANSI/IEEE standard, as well as with rectifier, EM curve. The third and fourth thresholds with independent time. Moreover several predefined blocking criteria are implemented (threshold trip may be inhibited by start of the other thresholds, logic selectivity with internal and/or external elements, etc.). Operation and settings The first and second threshold (IED>, IED>>) may be programmed with definite or inverse time ac- cording the following characteristic curves: • Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · tED>inv / [(IED/IED>inv)0.02 - 1] • Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · tED>inv / [(IPD/IED>inv) - 1] • Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · tPD>inv / [(IED/IED>inv)2 - 1] • Moderately Inverse (ANSI/IEEE type MI): t = tED>inv · {0.01 / [(IED/IED>inv)0.02 - 1] + 0.023} • Very Inverse (ANSI/IEEE type VI): t = tED>inv · {3.922 / [(IED/IED>inv)2 - 1] + 0.098} • Extremely Inverse (ANSI/IEEE type EI): t = tED>inv · {5.64 / [(IED/IED>inv)2 - 1] + 0.024} • Electromechanical (EM): t = tED>inv · {0.28 / [-0236 · (IED/IED>inv)-1 + 0.339]} Where: t: operate time IED>inv: first and second threshold setting (IED>inv, IED>>inv) tED>inv: first and second threshold operate time setting (tPD>inv, tPD>>inv) Third and fourth threshold (IED>>>def, IED>>>>def) with definite time. For all inverse time characteristics, following data applies: • Asymptotic reference value (minimum pickup value): 1.1 IED> or IED>> • Minimum operate time: 0.1 s • Range where the equation is valid:[1] 1.1 ≤ IED/IED>inv (or IED>>inv) ≤ 20 • If IED>inv (or IED>>inv) pickup ≥ 0.5 IEn, the upper limit is 10 IEn For all definite time elements the upper limit for measuring is 50 In. Two different criteria may be selected: • Residual current threshold overcoming (module) • Projection residual current threshold overcoming (projection) The operating mode may be selected by setting the Mode67N parameter, located inside the Set \ Profile A(or B) \ Directional earth fault overcurrent-67N \ Common configuration menu. The settable operating mode is I (module) or I*cos (projection). Note 1 When the input value is more than 20 times the set point , the operate time is limited to the value corresponding to 20 times the set point t-int-F67N.ai IED IED>> IED>>> IED>>>> tED> tED>> tED>>> tED>>>> IED> t TRIP General operation time characteristic for the ground directional overcurrent elements - 67N

For both the operating modes, the measured UE voltage is employed as polarizing reference for displacement measure of the residual current. The displacement of the residual current phasor IE and the residual voltage phasor (UE), positive for lagging current compared with voltage (ΦE=(∠IE - ∠UE). For each of the four thresholds (IED>, IED>>, IED>>>, IED>>>>) , the characteristic angle (ϑE>, ϑE>>, ϑE>>>, ϑE>>>>) may be adjusted (setting range 0…359° common for the three phases). The the characteristic angle setting (positive when clockwise compared the polarizing voltage) specifies the angular displacement of the characteristic axis standing for the trip bisector of the tripping zone. For isolated neutral systems with a 90° characteristic angle setting, faults towards the LINE are detected, while with a 270° characteristic angle setting, faults towards the BUS are detected. All the named parameters can be set separately for the four thresholds and for definite or inverse time settings menu For each of the four thresholds (IED>, IED>>, IED>>>, IED>>>>), the half operating sector may be ad- justed (setting range 0…180° simmetrically regarding the characteristic axis). All the named parameters can be set separately for the four thresholds and for definite or inverse time settings menu. For all the four thresholds (IED>, IED>>, IED>>>, IED>>>>), the operating mode when the 74VT function is active may be defined: • OFF: no action are issued by 74VT. • Block: all the four thresholds are blocked when the 74VT function is active. • Not directional: all the four thresholds are switched from directional to not directional criteria when the 74VT function is active. The 74VT information may be issued from an external signal acquired by means a binary input. If a binary input is designed for 74VText, for all the four thresholds, the operating mode when the 74VT function is active may be defined: char-F67N-mode.ai Operating characteristics of the earth fault overcurrent element - 67N with module operating mode (I) Operating characteristics of the earth fault overcurrent element - 67N with projection operating mode ( I∙cos) IE UE UEC Characteristic axis Characteristic axis ΦE o ΦEC Half operating sector (βE>, βE>>, βE>>>, βE>>>>) Half operating sector (βE>, βE>>, βE>>>, βE>>>>) Half operating sector (βE>, βE>>, βE>>>, βE>>>>) Half operating sector (βE>, βE>>, βE>>>, βE>>>>) Threshold (IED threshold): (IED>, IED>>, IED>>>, IED>>>>) (M∙IED>, M∙IED>>, M∙IED>>>, M∙IED>>>>) Threshold (IED threshold): (IED>, IED>>, IED>>>, IED>>>>) (M∙IED>, M∙IED>>, M∙IED>>>, M∙IED>>>>) IE ΦE o ΦEC Characteristic angle Characteristic angle (ΘE>, ΘE>>, ΘE>>>, ΘE>>>>) (ΘE>, ΘE>>, ΘE>>>, ΘE>>>>) UE UEC IE ≥ IED threshold IED threshold IE I I∙cos Mode67N IE∙COS(ϑE-ΦE) ≥ IED threshold IED threshold IE I I∙cos Mode67N ΦE o ΦEC UE UEC 3Votype67N NA60 BUSBAR IE UE RESIDUAL VOLTAGE INPUT B7 terminal C7 terminal RESIDUAL CURRENT INPUT Trip sector (toward line) Trip sector (toward line) No trip sector (toward busbar) No trip sector (toward busbar) Operating characteristics of the ground directional overcurrent elements - 67N LINE

• OFF: no action are issued by 74VT. • Block: all the four thresholds are blocked when the 74VT external signal is active. • Not directional: all the four thresholds are switched from directional to not directional criteria when the 74VT external signal is active. Malfunctioning of the directional overcurrent elements can be avoided when VTs secondary fault will arise (fuse or MCB tripping) by switching the overcurrent directional to non directional overcur- rent protection The 74VText67N parameter may be set as OFF, Block, Not directional inside the Set \ Profile A(or B) \ Directional earth fault overcurrent-67N \ Common configuration menu, while the 74VText function must be assigned to the selected binary inputs inside the Set \ Inputs \ Binary input IN1(...x) menus (IN1 or ...INx matching). For all the four thresholds (common for all thresholds) an insensibility zone may be enabled in the voltage-current plane. If enabled, the insensibility zone is user adjustable by means the M multiplier (common for all thresh- olds); the rectangle defined by the current and voltage thresholds and the same multiplied by M becomes a No trip zone. Such insensibility zone may be useful to avoid unwanted trip in the presence of some fixed residual current and/or voltage (e.g. CT and or VT errors in the residual measurements). The Insens-Zone (OFF, ON) and M parameters may be adjusted inside the Set \ Profile A(or B)\Di- rectional earth fault overcurrent-67N \ Common configuration menu. Module If the module principle and the operation mode is not switched to “not directional” (by the 74VT function), the start of any 67N threshold becomes active when the following A) and B) conditions are contemporaneously active: A) in the “Insens-Zone=OFF” operating mode: - The residual current (IE) fundamental component overcomes the threshold (IED>, IED>>, IED>>>, IED>>>>) AND - The residual voltage (UE or UEC) fundamental component overcomes the threshold (UED>, UED>>, UED>>>, UED>>>>), while in the “Insens-Zone=ON” operating mode: - The residual current (IE) fundamental component overcomes the threshold (IED>, IED>>, IED>>>, IED>>>>) AND - The residual current (IE) fundamental component overcomes the threshold (M∙UED>, M∙UED>>, M∙UED>>>, M∙UED>>>>) OR - The residual current (IE) fundamental component overcomes the threshold (M∙IED>, M∙IED>>, M∙IED>>>, M∙IED>>>>) char-F67N-IeUe.ai Voltage/current characteristic concerning the earth fault overcurrent element - 67N with insensibility zone disabled Voltage/current characteristic concerning the ground directional overcurrent - 67N with insensibility zone enabled IE IED>, IED>>, IED>>>, IED>>>> M∙IED>, M∙IED>>, M∙IED>>>, M∙IED>>>> M∙UED>, M∙UED>>, M∙UED>>>, M∙UED>>>> TRIP UE UEC IE IED>, IED>>, IED>>>, IED>>>> TRIP UE UEC UED>, UED>>, UED>>>, UED>>>> UED>, UED>>, UED>>>, UED>>>>

AND The residual voltage (UE) fundamental component overcomes the threshold (UED>, UED>>, UED>>>, UED>>>>). B) The residual current phasor (IE) is located inside the angular sector defined by own characteristic angle (βE>, βE>>, βE>>>, βE>>>>) and half operating sector (ΘE>, ΘE>>, ΘE>>>, ΘE>>>>), that is the -βE ≤ (ΘE-ΦE) ≤ +βE condition is fulfilled. If the operation mode is switched to “not directional” (by the 74VT function), the start of any 67N threshold becomes active when the following is complied: - The residual current (IE) fundamental component overcomes the threshold (IED>, IED>>, IED>>>, IED>>>>) The operating mode (Mode67N), the residual voltage measurement type (Type67N), the insensi- bility zone enabling (Insens-Zone), the threshold multiplier for the insensibility zone (M) and the operation from 74VT (74VText67N) may be selected by setting the concerning parameters, located inside the Set \ Profile A(or B) \ Directional earth fault overcurrent-67N \ Common configuration menu. The settable operating mode is I (module) or I*cos (projection). Projection If the projection principle and he operation mode is not switched to “not directional” (by the 74VT function), the start of any 67N threshold becomes active when the following C) condition is active: C) in the “Insens-Zone=OFF” operating mode: - Residual current projection on the characteristic axis IE∙cos(ΦE-ΘE) > 0 AND - The residual current projection on the characteristic axis IE∙cos(ΦE-ΘE) overcomes the threshold (IED>, IED>>, IED>>>, IED>>>>) AND - The residual voltage (UE) fundamental component overcomes the threshold (UED>, UED>>, UED>>>, UED>>>>). AND The residual current phasor (IE) is located inside the angular sector defined by own characteristic angle (βE>, βE>>, βE>>>, βE>>>>) and half operating sector (ΘE>, ΘE>>, ΘE>>>, ΘE>>>>), that is the -βE ≤ (ΘE-ΦE) ≤ +βE condition is fulfilled.[1] While in the “Insens-Zone=ON” operating mode: - Residual current projection on the characteristic axis IE∙cos(ΦE-ΘE) > 0 AND - The residual current projection on the characteristic axis IE∙cos(ΦE-ΘE) overcomes the threshold (IED>, IED>>, IED>>>, IED>>>>) AND - The residual voltage (UE) fundamental component overcomes the threshold (M∙UED>, M∙UED>>, M∙UED>>>, M∙UED>>>>) OR The residual current projection on the characteristic axis IE∙cos(ΦE-ΘE) overcomes the threshold (M∙IED>, M∙IED>>, M∙IED>>>, M∙IED>>>>) AND - The residual voltage (UE or UEC) fundamental component overcomes the threshold (UED>, UED>>, UED>>>, UED>>>>). AND The residual current phasor (IE) is located inside the angular sector defined by own characteristic angle (βE>, βE>>, βE>>>, βE>>>>) and half operating sector (ΘE>, ΘE>>, ΘE>>>, ΘE>>>>), that is the -βE ≤ (ΘE-ΦE) ≤ +βE condition is fulfilled.[2] If the operation mode is switched to “not directional” (by the 74VT function), the start of any 67N threshold becomes active when the following is complied: - The residual current (IE) fundamental component overcomes the threshold (IED>, IED>>, IED>>>, IED>>>>) For both the operating mode (module or projection), when the start signal goes ON a concerning counter starts; after expiry of the associated operate time (tED>, tED>>, tED>>>, tED>>>>) a trip command is issued, if instead the above conditions don’t remain valid, the element it is restored. All the parameters are located inside the menus concerning the four elements, separately for defi- nite and inverse time characteristics. Example: the operate time concerning the first threshold with definite time characteristic (IED>def) is available inside the Set \ Profile A(or B) \ Directional earth fault overcurrent-67N \ IED> Element \ Definite time menu. Note 1 For each threshold the projection of the residual current phasor on the characteristic axis is: IEcos(ΘE>-ΦE), IEcos(ΘE>>-ΦE), IEcos(ΘE>>>-ΦE), IEcos(ΘE>>>>-ΦE) when “direct” residual voltage is selected (UE), or IEcos(ΘE>-ΦEC), IEcos(ΘE>>-ΦEC), IEcos(ΘE>>>-ΦEC), IEcos(ΘE>>>>-ΦEC) when “calculated” residual voltage is selected (UEC). The ΘE , βE and ΦEC symbols are not used inside the ThyVisor and MMI menus. Note 2 For each threshold the projection of the residual current phasor on the characteristic axis is: IEcos(ΘE>-ΦE), IEcos(ΘE>>-ΦE), IEcos(ΘE>>>-ΦE), IEcos(ΘE>>>>-ΦE) when “direct” residual voltage is selected (UE), or IEcos(ΘE>-ΦEC), IEcos(ΘE>>-ΦEC), IEcos(ΘE>>>-ΦEC), IEcos(ΘE>>>>-ΦEC) when “calculated” residual voltage is selected (UEC). The ΘE , βE and ΦEC symbols are not used inside the ThyVisor and MMI menus.

All directional earth fault overcurrent elements can be enabled or disabled by setting ON or OFF the IED> Enable, IED>> Enable, , IED>>> Enable e/o IED>>>> Enable parameters inside the Set \ Profile A(or B) \ Directional earth fault overcurrent-67N \ IED> Element (IED>> Element, IED>>> Element, IED>>> Element) \ Setpoints menus. The first and second overcurrent element can be programmed with definite or inverse time charac- teristic by setting theIED>Curve and/or IED>>Curve (DEFINITE, IEC/BS A, IEC/BS B, IEC/ BS C, ANSI/IEE MI, ANSI/IEE VI, ANSI/IEE EI, EM) available inside the Set \ Profile A(or B) \ Directional earth fault overcurrent-67N \ IED> Element (IED>> Element) \ Setpoints menus. The trip of IED> element may be inhibited by the start of the second, third and/or fourth element (IED>>, IED>>>, IED>>>>) by setting ON the Disable IED> by start IED>>, Disable IED> by start IED>>>, Dis- able IED> by start IED>>>> (IED>disbyIED>>, IED>disbyIED>>>, IED>disbyIED>>>>) parameters available inside the Set \ Profile A(or B) \ Directional earth fault overcurrent-67N \ IED>> Element (IED>>> Element, IED>>>> Element) \ Setpoints menus. Similarly the trip of the: • IED>> element may be inhibited by start of the third and/or fourth element (IED>>> and/or IED>>>>) by setting ON the Disable IED>> by start IED>>>, start IED>>>> (IED>>disbyIED>>>, IED>>disbyIED>>>>) parameter available inside the Set \ Profile A(or B) \ Directional earth fault overcurrent-67N \ IED>>> Element (IED>>>> Element) \S etpoints menus. • IED>>> element may be inhibited by start of the fourth element (IED>>>>) by setting ON the Dis- able IED>>> by start IED>>>> (IED>>>disbyIED>>>>) parameter available inside the Set \ Profile A(or B) \ Directional earth fault overcurrent-67N \ IED>>>> Element \ Setpoints menu. All the named parameters can be set separately for Profile A and Profile B. An adjustable reset time delay is provided for every threshold (tED>RES, tED>>RES, tED>>>RES, tED>>>RES). Each directional earth fault element can produce the Breaker Failure output if the IED> BF, IED>> BF, IED>>> BF and/or IED>>>> BF parameters are set to ON. The parameters are available inside the Set \ Profile A(or B) \ Directional earth fault overcurrent-67N \ IED> Element (IED>> Ele- ment, IED>>> Element, IED>>> Element) \ Setpoints menus.[1] If the CLP function (Cold Load Pick-up) is enabled for element blocking, the selected threshold may be blocked for an adjustable time interval, starting from the circuit breaker closure. This operating mode may be select by setting ON-Element blocking the IEDCLP> Mode, IED- CLP>> Mode, IEDCLP>>> Mode, IEDCLP>>>> Mode parameters. If the CLP function (Cold Load Pick-up) is enabled for threshold change, the selected threshold may be changed for an adjustable time interval, starting from the circuit breaker closure. This operating mode (ON-Change setting = IEDCLP> Mode, IEDCLP>> Mode, IED- CLP>>> Mode, IEDCLP>>>> Mode) and the concerning operating time within the CLP (tED- CLP>, tEDCLP>>, tEDCLP>>>, tEDCLP>>>>) may be adjusted inside the Set \ Profile A(or B) \ Directional earth fault overcurrent-67N \ IED> Element (IED>> Element, IED>>> Element, IED>>> Element) \ Setpoints menus, whereas the operating thresholds within the CLP ( IEDCLP>def, IEDCLP>inv,....) may be adjusted inside the Set \ Profile A(or B) \ Directional earth fault overcur- rent-67N \ IED> Element (IED>> Element, IED>>> Element, IED>>> Element) \ Definite time (Inverse time) menus. For every of the four thresholds the following block criteria are available: Logical block (Block1) If the IED>BLK1, IED>>BLK1, IED>>>BLK1 and/or IED>>>>BLK1 enabling parameters are set to ON and a binary input is designed for logical block (Block1), the concerning element is blocked off whenever the given input is active.[2] The enabling parameters are available inside the Set \ Profile A(or B) \ Directional earth fault overcurrent-67N \ IED> Element (IED>> Element, IED>>> Element, IED>>> Element) \ Setpoints menus, while the Block1 function must be assigned to the selected binary input inside the Set \ Inputs \ Binary input IN1(x) menus. Note 1 The common settings concerning the Breaker failure protection are adjustable inside the Breaker Failure - BF menu. Note 2 The exhaustive treatment of the logical block (Block 1) function may be found in the “Logic Block” paragraph inside CONTROL AND MONITOR- ING section Timers-F67N.ai IED> Start IED> Trip tED> tED> RESET INPUT tED>RES tED>RES tED>RES t IED> element timers - 67N

General logic diagram of the ground directional overcurrent elements - 67N all-F67N.ai Start IED>> & IED> disbyIED>> tED>> def IEDCLP>>def IED>>def tED>> inv IEDCLP>>inv IED>>inv IED>>Curve IEDCLP>>Mode tEDCLP>> tED>>RES IED>> Enable CLPIED> CLPIED>> IED> Element IED>> Element Start IED> Trip IED> Start IED>> Trip IED>> IED>>BF & IED>>BF Trip IED>> IED>BF Trip IED> & IED>BF BLK2OUT IED>BLK2OUT Start IED> & BLK2OUT IED>>BLK2OUT Start IED>> & BLK4OUT IED>BLK4 Start IED> & BLK4OUT IED>>BLK4 Start IED>> & tED> def IEDCLP> def IED> def tED> inv IEDCLP> inv IED> inv IED>Curve IEDCLP>Mode tEDCLP> tED>RES IED> Enable ≥ IED> inhibition ≥ IED>> inhibition IED>>> inhibition Block1 BLK1IED> & IED>BLK1 Start IED> & & IED>>BLK2IN BLK2INIED>> Block2 Start IED>> & BLK2INIED> Block2 & IED>BLK2IN Start IED> & BLK1IED>> & IED>>BLK1 Block1 Start IED>> & IE UE UE UE UE tED>>> def IEDCLP>>>def IED>>>def IEDCLP>>>Mode tEDCLP>>> tED>>>RES IED>>> Enable Start IED>>> & IED> disbyIED>>> Start IED>>> & IED>> disbyIED>>> CLPIED>>> CLPIED>>>>, IED>>> Element Start IED>>> Trip IED>>> Start I2ndh> IED>>>BF IED>>>>BF, & IED>>>BF Trip IED>>> BLK2OUT BLK2OUT, BLK4OUT IED>>>BLK2OUT Start IED>>> & BLK4OUT IED>>>BLK4 Start IED>>> & & IED>>>BLK2IN BLK2INIED>>> BLK2INIED>>>>, Block2 Start IED>>> & BLK1IED>>> BLK1IED>>>>, & IED>>>BLK1 Block1 Block1 Block2 Start IED>>> & tED>>>>def IEDCLP>>>>def IED>>>>def IEDCLP>>>>Mode tEDCLP>>>> tED>>>>RES IED>>>> Enable Start IED>>>> & IED> disIED>>>> Start IED>>>> & IED>> disIED>>>> IED>>>> Element Start IED>>>> Trip IED>>>> Start IED>>>> & IED>>> disIED>>>> IE IE IE Common configurations Insens-Zone OFF ON IE I I∙cos Mode67N ≥ M∙threshold M

Selective block (Block2) All along the protective elements the selective block may be set. The logic selectivity function may be performed by means any combination of the following I/O: • One committed pilot wire input (BLIN1). • One or more binary inputs designed for input selective block. • One committed pilot wire output (BLOUT1). • One or more output relays designed for output selective block. Only when the committed pilot wire are used the continuity check of the pilot wire link is active. Use of committed pilot wire input BLIN1: • The protection is blocked off according the selectivity block criteria when the input BLIN1 is active. The information about phase or phase+earth block may be select programming the ModeBLIN1 parameter inside the Set\Profile A(or B)\Selective block-BLOCK2\ Selective block IN menus. Use of binary inputs: • If the IED>BLK2IN, IED>>BLK2IN, IED>>>BLK2IN and/or IED>>>>BLK2IN parameters are set to ON and a binary input is designed for selective block (Block2), the protection is blocked off by phase elements (Block2 Iph) or by any protection element (Block2 Iph/IE) according the se- lectivity block criteria.[1] The enable IED>BLK2IN, IED>>BLK2IN, IED>>>BLK2IN and/or IED>>>>BLK2IN parameters are available inside the Set\Profile A(or B)\Directional earth fault overcurrent-67N \ IED> Element (IED>> Element, IED>>> Element, IED>>>> Element) \Setpoints menus, while the Block2 Iph and Block2 Iph/IE functions must be assigned to the selected binary inputs inside the Set \ Inputs \ Binary input IN1(2) menus (IN1 or IN2 matching). Use of committed pilot wire output BLOUT1: • The information about phase or phase+earth block may be select programming the ModeBLOUT1 parameter (OFF - ON IPh - ON IPh/IE - ON IE) inside Set\Profile A(or B)\Selective block- BLOCK2\ Selective block OUT menus. Use of output relay (K1...K6): • If the IED>BLK2OUT, IED>>BLK2OUT, IED>>>BLK2OUT and/or IED>>>>BLK2OUT enable parameters are set to ON and a output relay is designed for selective block (Block2), the protection issues a block output by phase elements (BLK2OUT-Iph) or by any protection element (BLK2OUT-Iph/IE), whenever the given element (Start IED>, Start IED>>, Start IED>>> and/or Start IED>>>>) becomes active. The enable IED>BLK2OUT, IED>>BLK2OUT, IED>>>BLK2OUT and/or IED>>>>BLK2OUT parameters (ON or OFF) are available inside the Set\Profile A(or B)\Directional earth fault overcurrent-67 \ IED> Element (IED>> Element, IED>>> Element, IED>>>> Element) \Setpoints menus, while the BLK2OUT-Iph-K, BLK2OUT-Iph/IE-K and/or BLK2OUT-IE-K output relays and LEDs (BLK2OUT-Iph-L, BLK2OUT-Iph/IE-L e/o BLK2OUT- IE-L) must be select inside the Set\Profile A(or B)\Selective block-BLOCK2\ Selective block OUT menu. Internal selective block (Block4) As well as to send or transmit a selective block toward other protective relays, each protective element may be enabled for receive or transmit a selective block from/to other internal protective elements.[2] The internal selective block of one or more element concerning the directional earth fault overcur- rent function may be enabled/disabled by means the IED>BLK4, IED>>BLK4, IED>>>BLK4 and/or IED>>>>BLK4 parameters (virtual input and output common to all protective thresholds); the following operating modes are available: • IN - the element is enabled to receive the selective block from an internal input. • OUT - the element is enabled to send the selective block to an internal output. • OFF - the element is disabled to send/receive the internal selective block. Transmission and reception for the same element is not allowed, so any stall situation due to wrong setting is avoided. The internal selective block can work together with an external selective block from other protective relays (Block2). Note 1 The exhaustive treatment of the selective block (Block 2) function may be found in the “Selective Block” paragraph inside CONTROL AND MONITORING section Nota 2 The exhaustive treatment of the internal selective block (Block 4) function may be found in the “Internal selective block” paragraph inside CONTROL AND MONITORING section.

67NS1-module.ai IE IE 3Vo 3Vo 3Vo 3Vo 3Vo ≥1 & & IEDCLP>def IEDCLP>inv ≥ IEDCLP> sheet 3 Insens-Zone OFF Insens-Zone ON M A A A & State IED>inv ≥ IED>inv ≥ IED>def IED>def Angle Semisector & State OFF ON Insens-Zone ΦE inside trip sector IE ΦE inside trip sector ≥1 A = ON - Change setting within CLP A =“ON” CLP A =“OFF” A = ON - Change setting within CLP A =“ON” CLP A =“OFF” A = ON - Change setting within CLP A =“ON” CLP A =“OFF” ≥1 & State UED>inv ≥ UED>def ≥ UED>inv UED>def & State IE ≥1 & IEDCLP>def IEDCLP>inv ≥ IEDCLP> & State IED>inv ≥ IED>def ≥ IED>inv IED>def & State ≥1 & State UED>inv ≥ M∙UED>def ≥ M∙UED>inv UED>def & State IE ≥1 & IEDCLP>def IEDCLP>inv ≥ M∙IEDCLP> & State IED>inv ≥ M∙IED>def ≥ M∙IED>inv IED>def & State ≥1 & State UED>inv ≥ UED>def ≥ UED>inv UED>def & State 3Vo IE TRIP 3Vo IE TRIP IE Common configurations Insens-Zone OFF ON UE UEC 3Votype67N 3Vo I I∙cos Mode67N ≥ M∙threshold M Ground directional overcurrent (67N) - First element logic diagram (IED>) - Module operating mode (sheet 1 of 4)

67NS1-proiezione.ai IE IE 3Vo 3Vo 3Vo 3Vo IE ≥1 & & IEDCLP>def IEDCLP>inv sheet 3 P A & State IED>inv IE∙cosϕ ≥ IED>inv IE∙cosϕ ≥ IEDCLP> IE∙cosϕ ≥ 0 IED>def Angle Semisector & State IE∙cosϕ ≥ IED>def IE ≥1 IEDCLP>def IEDCLP>inv A & State IED>inv IE∙cosϕ ≥ IED>inv IE∙cosϕ ≥ IEDCLP> IED>def & State IE∙cosϕ ≥ IED>def IE ≥1 IEDCLP>def IEDCLP>inv A & State IED>inv IE∙cosϕ ≥M∙IED>inv IE∙cosϕ ≥ IEDCLP> IED>def & State IE∙cosϕ ≥M∙IED>def OFF ON Insens-Zone ΦE inside trip sector IE ΦE inside trip sector ≥1 A = ON - Change setting within CLP A =“ON” A =“OFF” ≥1 & State UED>inv ≥ UED>def ≥ UED>inv UED>def & State 3Vo IE IE∙cosϕ ≥ 0 & ≥1 & State UED>inv ≥ M∙UED>def ≥ M∙UED>inv UED>def & State & ≥1 & State UED>inv ≥ UED>def ≥ UED>inv UED>def & State 3Vo IE TRIP 3Vo IE TRIP A = ON - Change setting within CLP A =“ON” CLP A =“OFF” A = ON - Change setting within CLP A =“ON” CLP A =“OFF” IE Common configurations Insens-Zone OFF ON UE UEC 3Votype67N 3Vo I I∙cos Mode67N ≥ M∙threshold M Insens-Zone OFF Insens-Zone ON Ground directional overcurrent (67N) - First element logic diagram (IED>) - Projecting operating mode (sheet 2 of 4) Characteristic axis Half operating sector Half operating sector IED threshold IE ΦE o ΦEC Characteristic angle UE UEC Trip sector (toward No trip sector (toward busbar)

Fun_67NS1-3.ai ON≡Enable IED> directional earth fault & BF Enable (ON≡Enable) IED>BF towards BF logic IED>BF & Trip IED> A B Non-directional (from 74VT) Non-directional A = Directional B = Non-directional IED> Enable ≥1 CB-State Block1, Block2, Block4 T 0 tCLP> IEDCLP>Mode t EDCLP> A B C A =“1” A =“0 or OFF” IED> overcurrent directional element (67N) block diagram (sheet 4) A = ON - Change setting within CLP B = OFF - CLP disabled C = ON - Element blocking within CLP ≥1 CLP IED> IE IEDCLP>def ≥ IEDCLP>def & State ≥ IED>def IED>def Block by 74VT (ON≡Block) Internal or external OFF 74VT 74VTint/ext67N tED>RES T 0 RESET t ED>def/inv 0 T tED>RES Start IED> Trip IED> TRIPPING MATRIX (LED+RELAYS) IED> Curve 0 T IED>TR-K IE>TR-L IED>ST-L IED>ST-K t ED>def t ED>inv A B (sheet 1) D =“modulo” Mode67N C D D =“modulo” C =“proiezione” C D M (sheet 2) C =“proiezione” IE Common configurations Insens-Zone OFF ON UE UEC 3Votype67N 3Vo I I∙cos Mode67N ≥ M∙threshold M Ground directional overcurrent (67N) - First element logic diagram (IED>) (sheet 3 of 4)

Pilot wire output TRIPPING MATRIX (LED+RELAYS) ModeBLOUT1 A B C D BLOUT1 Block2 output ≥1 tF-IPh tF-IPh/IE tF-IE ST-Iph BLK2 ST-IE BLK2 ≥1 T 0 tF-IPh/IE T 0 tF-IPh T 0 tF-IE I> Block2 OUT BLK2OUT-Iph BLK2OUT-Iph/IE BLK2OUT-IE A = OFF B = ON IPh C = ON IPh/IE D = ON IE BLK2OUT-IPh-K BLK2OUT-IPh-L BLK2OUT-IPh/IE-K BLK2OUT-IPh/IE-L BLK2OUT-IE-K BLK2OUT-IE-L Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Block2 IPh Block2 IPh/IE ModeBLIN1 T 0 tB-Iph 67NS1_BL-diagram.ai ≥1 ≥1 ≥1 ≥1 tB-Iph tFI-Iph tB-IE BLK1IED> BLK4IN IED> & & & BLK2IN IED> & & Enable (ON≡Enable) IED>BLK1 Block2 input enable (ON≡Enable) Pilot wire input & IED>BLK2IN Block1 BLK2IN-Iph Start IED> Trip IED> ST-IE BLK4 ST-Iph BLK4 Iph Block2 IE Block2 Block4 enable BLK2IN-IE tB timeout Block2 input tB-K tB-L Block1 FROM EARTH FAULT PROTECTIONS FROM ANY PROTECTIONS FROM PHASE PROTECTIONS OFF ON IPh ON IPh/IE ON IE BLIN1 ≥1 ≥1 tFI-IE Block4 OUT ≥1 T 0 tFI-Iph T 0 tFI-IE I>> Block4 I/O I> Block4 I/O IED> Block4 OUT Block4 Block4 I>>> Block4 I/O DthAL1 Block4 I/O DthAL2 Block4 I/O Dth Block4 I/O IPD>Block4 I/O IPD>>Block4 I/O IPD>>>Block4 I/O IPD>>>>Block4 I/O I>> Block2 OUT I>>> Block2 OUT DthAL1 Block2 OUT DthAL2 Block2 OUT Dth Block2 OUT IPD>Block2 OUT IPD>>Block2 OUT IPD>>>Block2 OUT IPD>>>>Block2 OUT IE>> Block4 I/O IE> Block4 I/O IE>>> Block4 I/O IED>> Block4 I/O IED> Block4 I/O IED>>> Block4 I/O IED>>>> Block4 I/O ≥1 IE>> Block2 OUT IE> Block2 OUT IE>>> Block2 OUT IED>> Block2 OUT IED> Block2 OUT IED>>> Block2 OUT IED>>>> Block2 OUT Block4 Block1 T 0 tB-IE Block2 IE ≥1 Block1, Block2, Block4 TRIPPING MATRIX (LED+RELAYS) ≥1 ≥1 A = IN B = OFF C = OUT A = IN B = OFF C = OUT IED>BLK4 C B A “0” “0” B “0” C “0” IPD>BLK4 A Start IED> IED>BLK2OUT & Block2 output (ON≡Enable) Start IED> Ground directional overcurrent (67N) - Logic diagram of the blocking signals concerning the first element (IED>) (sheet 4 of 4)

67NS2-module.ai IE IE 3Vo 3Vo 3Vo 3Vo 3Vo ≥1 & & IEDCLP>>def IEDCLP>>inv ≥ IEDCLP>> sheet 3 Insens-Zone OFF Insens-Zone ON M A A A & State IED>>inv ≥ IED>>def ≥ IED>>inv IED>>def Angle Semisector & State OFF ON Insens-Zone ΦE inside trip sector IE ΦE inside trip sector ≥1 A = ON - Change setting within CLP A =“ON” CLP A =“OFF” A = ON - Change setting within CLP A =“ON” CLP A =“OFF” A = ON - Change setting within CLP A =“ON” CLP A =“OFF” ≥1 & State UED>>inv ≥ UED>def ≥ UED>>inv UED>>def & State IE ≥1 & IEDCLP>>def IEDCLP>>inv ≥ IEDCLP>> & State IED>>inv ≥ IED>def ≥ IED>>inv IED>>def & State ≥1 & State UED>>inv ≥ M∙UED>def ≥ M∙UED>>inv UED>>def & State IE ≥1 & IEDCLP>>def IEDCLP>>inv ≥ M∙IEDCLP>> & State IED>>inv ≥ M∙IED>def ≥ M∙IED>>inv IED>>def & State ≥1 & State UED>>inv ≥ UED>>def ≥ UED>>inv UED>>def & State 3Vo IE TRIP 3Vo IE TRIP IE Common configurations Insens-Zone OFF ON UE UEC 3Votype67N 3Vo I I∙cos Mode67N ≥ M∙threshold M Ground directional overcurrent (67N) - Second element logic diagram (IED>>) - Module operating mode (sheet 1 of 4)

67NS2-proiezione.ai IE IE 3Vo 3Vo 3Vo 3Vo IE ≥1 & & IEDCLP>>def IEDCLP>>inv sheet 3 P A & State IED>>inv IE∙cosϕ ≥ IED>>inv IE∙cosϕ ≥ IEDCLP>> IE∙cosϕ ≥ 0 IED>>def Angle Semisector & State IE∙cosϕ ≥ IED>>def IE ≥1 IEDCLP>>def IEDCLP>>inv A & State IED>>inv IE∙cosϕ ≥ IED>>inv IE∙cosϕ ≥ IEDCLP>> IED>>def & State IE∙cosϕ ≥ IED>def IE ≥1 IEDCLP>>def IEDCLP>>inv A & State IED>>inv IE∙cosϕ ≥M∙IED>>inv IE∙cosϕ ≥ IEDCLP>> IED>>def & State IE∙cosϕ ≥M∙IED>>def OFF ON Insens-Zone ΦE inside trip sector IE ΦE inside trip sector ≥1 A = ON - Change setting within CLP A =“ON” A =“OFF” ≥1 & State UED>>inv ≥ UED>>def ≥ UED>>inv UED>>def & State 3Vo IE IE∙cosϕ ≥ 0 & ≥1 & State UED>>inv ≥ M∙UED>>def ≥ M∙UED>>inv UED>>def & State & ≥1 & State UED>>inv ≥ UED>>def ≥ UED>>inv UED>>def & State 3Vo IE TRIP A = ON - Change setting within CLP A =“ON” CLP A =“OFF” A = ON - Change setting within CLP A =“ON” CLP A =“OFF” IE Common configurations Insens-Zone OFF ON UE UEC 3Votype67N 3Vo I I∙cos Mode67N ≥ M∙threshold M Insens-Zone OFF 3Vo IE TRIP Insens-Zone ON Ground directional overcurrent (67N) - Second element logic diagram (IED>>) - Projecting operating mode (sheet 2 of 4) Characteristic axis Half operating sector Half operating sector IED threshold IE ΦE o ΦEC Characteristic angle UE UEC Trip sector (toward No trip sector (toward busbar)

Fun_67NS2-3.ai ON≡Enable IED>> directional earth fault & BF Enable (ON≡Enable) IED>>BF towards BF logic IED>>BF & Trip IED>> A B Non-directional (from 74VT) Non-directional A = Directional B = Non-directional IED>> Enable ≥1 CB-State Block1, Block2, Block4 T 0 tCLP>> IEDCLP>>Mode t EDCLP>> A B C A =“1” A =“0 or OFF” IED>> overcurrent directional element (67N) block diagram (sheet 4) A = ON - Change setting within CLP B = OFF - CLP disabled C = ON - Element blocking within CLP ≥1 CLP IED>> IE IEDCLP>>def ≥ IEDCLP>>def & State ≥ IED>>def IED>>def Block by 74VT (ON≡Block) Internal or external OFF 74VT 74VTint/ext67N tED>>RES T 0 RESET t ED>>def/inv 0 T tED>>RES Start IED>> Trip IED>> TRIPPING MATRIX (LED+RELAYS) IED>> Curve 0 T IED>>TR-K IE>>TR-L IED>>ST-L IED>>ST-K t ED>>def t ED>>inv A B (sheet 1) D =“modulo” Mode67N C D D =“modulo” C =“proiezione” C D M (sheet 2) C =“proiezione” IE Common configurations Insens-Zone OFF ON UE UEC 3Votype67N 3Vo I I∙cos Mode67N ≥ M∙threshold M Ground directional overcurrent (67N) - Second element logic diagram (IED>>) (sheet 3 of 4)

Pilot wire output TRIPPING MATRIX (LED+RELAYS) ModeBLOUT1 A B C D BLOUT1 Block2 output ≥1 tF-IPh tF-IPh/IE tF-IE ST-Iph BLK2 ST-IE BLK2 ≥1 T 0 tF-IPh/IE T 0 tF-IPh T 0 tF-IE I> Block2 OUT BLK2OUT-Iph BLK2OUT-Iph/IE BLK2OUT-IE A = OFF B = ON IPh C = ON IPh/IE D = ON IE BLK2OUT-IPh-K BLK2OUT-IPh-L BLK2OUT-IPh/IE-K BLK2OUT-IPh/IE-L BLK2OUT-IE-K BLK2OUT-IE-L Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Binary input INx (x=1,2) T 0 Logic INx t ON INx t ON INx t OFF T 0 n.o. n.c. INx t OFF Block2 IPh Block2 IPh/IE ModeBLIN1 T 0 tB-Iph 67NS2_BL-diagram.ai ≥1 ≥1 ≥1 ≥1 tB-Iph tFI-Iph tB-IE BLK1IED>> BLK4IN IED>> & & & BLK2IN IED>> & & Enable (ON≡Enable) IED>>BLK1 Block2 input enable (ON≡Enable) Pilot wire input & IED>>BLK2IN IED>>BLK2OUT Block1 BLK2IN-Iph Start IED>> Trip IED> > ST-IE BLK4 ST-Iph BLK4 Iph Block2 IE Block2 Block4 enable BLK2IN-IE tB timeout Block2 input tB-K tB-L Block1 FROM EARTH FAULT PROTECTIONS FROM ANY PROTECTIONS FROM PHASE PROTECTIONS OFF ON IPh ON IPh/IE ON IE BLIN1 ≥1 ≥1 tFI-IE Block4 OUT ≥1 T 0 tFI-Iph T 0 tFI-IE I>> Block4 I/O I> Block4 I/O IED>> Block4 OUT Block4 Block4 I>>> Block4 I/O DthAL1 Block4 I/O DthAL2 Block4 I/O Dth Block4 I/O IPD>Block4 I/O IPD>>Block4 I/O IPD>>>Block4 I/O IPD>>>>Block4 I/O I>> Block2 OUT I>>> Block2 OUT DthAL1 Block2 OUT DthAL2 Block2 OUT Dth Block2 OUT IPD>Block2 OUT IPD>>Block2 OUT IPD>>>Block2 OUT IPD>>>>Block2 OUT IE>> Block4 I/O IE> Block4 I/O IE>>> Block4 I/O IED>> Block4 I/O IED> Block4 I/O IED>>> Block4 I/O IED>>>> Block4 I/O ≥1 IE>> Block2 OUT IE> Block2 OUT IE>>> Block2 OUT IED>> Block2 OUT IED> Block2 OUT IED>>> Block2 OUT IED>>>> Block2 OUT Block4 Block1 T 0 tB-IE Block2 IE ≥1 Block1, Block2, Block4 TRIPPING MATRIX (LED+RELAYS) ≥1 ≥1 A = IN B = OFF C = OUT A = IN B = OFF C = OUT C B A “0” “0” B “0” C “0” IED>>BLK4 A IPD>>BLK4 & Block2 output (ON≡Enable) Start IED>> Start IED>> Ground directional overcurrent (67N) - Logic diagram of the blocking signals concerning the second element (IED>>) (sheet 4 of 4)

67NS3-module.ai IE 3Vo 3Vo & & sheet 3 Insens-Zone OFF Insens-Zone ON M Angle Semisector OFF ON Insens-Zone ΦE inside trip sector IE ΦE inside trip sector ≥1 A = ON - Change setting within CLP A =“ON” CLP A =“OFF” A = ON - Change setting within CLP A =“ON” CLP A =“OFF” A = ON - Change setting within CLP A =“ON” CLP A =“OFF” 3Vo & State ≥ UED>>>def UED>>>def & 3Vo & State UED>>>def ≥ M∙UED>>>def 3Vo & State UED>>>def ≥ M∙UED>>>def & 3Vo IE TRIP 3Vo IE TRIP IE Common configurations Insens-Zone OFF ON UE UEC 3Votype67N 3Vo I I∙cos Mode67N ≥ M∙threshold M IE IEDCLP>>>def ≥ IEDCLP>>>def A & State ≥ IED>>>def IED>>>def IE IEDCLP>>>def ≥ IEDCLP>>>def A & State ≥ IED>>>def IED>>>def IE IEDCLP>>>def ≥ M∙IEDCLP>>def A & State ≥ M∙IED>>>def IED>>>def Ground directional overcurrent (67N) - Third element logic diagram (IED>>>) - Module operating mode (sheet 1 of 4)

67NS3-proiezione.ai IE IE 3Vo IE & & IEDCLP>>>def sheet 3 P A & State IE∙cosϕ ≥ IEDCLP>>>def IE∙cosϕ ≥ 0 IED>>>def Angle Semisector IE∙cosϕ ≥ IED>>>def OFF ON Insens-Zone ΦE inside trip sector IE ΦE inside trip sector ≥1 A = ON - Change setting within CLP A =“ON” A =“OFF” A = ON - Change setting within CLP A =“ON” A =“OFF” 3Vo IE IE∙cosϕ ≥ 0 & & 3Vo IE TRIP A = ON - Change setting within CLP A =“ON” CLP A =“OFF” IE Common configurations Insens-Zone OFF ON UE UEC 3Votype67N 3Vo I I∙cos Mode67N ≥ M∙threshold M Insens-Zone OFF 3Vo IE TRIP Insens-Zone ON 3Vo & State UED>>>def ≥ M∙UED>>>def 3Vo & State UED>>>def ≥ UED>>>def 3Vo & State UED>>>def ≥ UED>>>def IE∙cosϕ ≥M∙IED>>>def IE IEDCLP>>>def A & State IE∙cosϕ ≥M∙IEDCLP>>>def IED>>>def IE∙cosϕ ≥IED>>>def IE IEDCLP>>>def A & State IE∙cosϕ ≥IEDCLP>>>def IED>>>def Ground directional overcurrent (67N) - Third element logic diagram (IED>>>) - Projecting operating mode (sheet 2 of 4) Characteristic axis Half operating sector Half operating sector IED threshold IE ΦE o ΦEC Characteristic angle UE UEC Trip sector (toward No trip sector (toward busbar)