Transcend TS1~2GUSD-S3 Technical Information

Transcend Information Inc. 1 Description Transcend microSD card series are non-volatile, which means no external power is required to retain the information stored on it. Besides, it is also a solid-state device that without moving parts to skip or break down. Based on original NAND flash chip, Transcend microSD can offer an incredible combination of fast data transfer, great flexibility, excellent security and incredibly small size. Placement Front Back Features • ROHS compliant product. • Operating Voltage: 2.7 ~ 3.6V • Operating Temperature: -25 ~ 85°C • Durability: 10,000 insertion/removal cycles • Fully compatible with SD card spec. v1.1 • Comply with SD Association File System Specification • Mechanical Write Protection Switch with microSD adapter • SD Host allows MultiMediaCard upward compatibility • Form Factor: 11mm x 15mm x 1mm 1 2 3 4 5 6 7 8 Pin Definition SD Mode SPI Mode Pin No. Name Type Description Name Type Description 1 DAT2 I/O/PP Data Line [Bit2] RSV Reserved 2 CD/DAT3 I/O/PP Card Detect / Data Line [Bit3] CS I Chip Select 3 CMD PP Command / Response DI I Data In 4 VDD S Supply voltage VDD S Supply voltage 5 CLK I Clock SCLK I Clock 6 VSS S Supply voltage ground VSS S Supply voltage ground 7 DAT0 I/O/PP Data Line [Bit0] DO O/PP Data out 8 DAT1 I/O/PP Data Line [Bit1] RSV Reserved S: Power Supply; I:Input; O:Output; PP:Push-Pull

Transcend Information Inc. 2 Architecture

Transcend Information Inc. 3 Bus Operating Conditions • General Parameter Symbol Min. Max. Unit Remark Peak voltage on all lines -0.3 VDD+0.3 V All Inputs Input Leakage Current -10 10 µA All Outputs Output Leakage Current -10 10 µA • Power Supply Voltage Parameter Symbol Min. Max. Unit Remark Supply voltage VDD 2.0 3.6 V CMD0, 15,55,ACMD41 commands Supply voltage specified in OCR register Except CMD0, 15,55, ACMD41 commands Supply voltage differentials (VSS1, VSS2) -0.3 0.3 V Power up time 250 ms From 0v to VDD Min. Note. The current consumption of any card during the power-up procedure must not exceed 10 mA. • Bus Signal Line Load The total capacitance CL the CLK line of the SD Memory Card bus is the sum of the bus master capacitance CHOST, the bus capacitance CBUS itself and the capacitance CCARD of each card connected to this line: CL = CHOST + CBUS + Ν*CCARD Where N is the number of connected cards. Requiring the sum of the host and bus capacitances not to exceed 30 pF for up to 10 cards, and 40 pF for up to 30 cards, the following values must not be exceeded: Parameter Symbol Min. Max. Unit Remark Bus signal line capacitance CL 100 pF fPP ≤ 20 MHz, 7 cards Single card capacitance CCARD 10 pF Maximum signal line inductance 16 nH fPP ≤ 20 MHz Pull-up resistance inside card (pin1) RDAT3 10 90 KΩ May be used for card detection Note that the total capacitance of CMD and DAT lines will be consist of CHOST, CBUS and one CCARD only since they are connected separately to the SD Memory Card host. Parameter Symbol Min. Max. Unit Remark Pull-up resistance RCMD, RDAT 10 100 KΩ To prevent bus floating Bus signal line capacitance CL 250 pF fPP ≤ 5 MHz, 21 cards

Transcend Information Inc. 4 • Bus Signal Levels As the bus can be supplied with a variable supply voltage, all signal levels are related to the supply voltage. To meet the requirements of the JEDEC specification JESD8-1A, the card input and output voltages shall be within the following specified ranges for any VDD of the allowed voltage range: Parameter Symbol Min. Max. Unit Remark Output HIGH voltage VOH 0.75* VDD V IOH = -100 μA @VDD min Output LOW voltage VOL 0.125* VDD V IOL = 100 μA @VDD min Input HIGH voltage VIH 0.625* VDD VDD + 0.3 V Input LOW voltage VIL VSS – 0.3 0.25* VDD V

Transcend Information Inc. 5 • Bus Timing Parameter Symbol Min Max. Unit Remark Clock CLK (All values are referred to min (VIH) and max (VIL) Clock frequency Data Transfer Mode fPP 0 25 MHz CL ≤ 100 pF, (7 cards) Clock frequency Identification Mode (The low freq. is required for MultiMediaCard compatibility.) fOD 0 400 KHz CL ≤ 250 pF, (21 cards) tWL 10 ns CL ≤ 100 pF, (7 cards) Clock low time 50 ns CL ≤ 250 pF, (21 cards) tWH 10 ns CL ≤ 100 pF, (7 cards) Clock high time 50 ns CL ≤ 250 pF, (21 cards) tTLH 10 ns CL ≤ 100 pF, (7 cards) Clock rise time 50 ns CL ≤ 250 pF, (21 cards) tTHL 10 ns CL ≤ 100 pF, (7 cards) Clock fall time 50 ns CL ≤ 250 pF, (21 cards) Inputs CMD, DAT (referenced to CLK) Input set-up time tISU 5 ns CL ≤ 25 pF, (1 cards) Input hold time tIH 5 ns CL ≤ 25 pF, (1 cards) Outputs CMD, DAT (referenced to CLK) Output Delay time tODLY 0 14 ns CL ≤ 25 pF, (1 cards)