Korg DSS-1 Service Manual

SERVICE MANUAL CONTENTS 1. SPECIFICATIONS 2. ERROR MESSAGES 3. MIDI IMPLEMENTATION. 4. STRUTURAL DIAGRAM.. 5. CONNECTOR DIAGRAM. 6. BLOCK DIAGRAM 7. CIRCUIT DIAGRAM 8. P.C. BOARD .. 2 9. SYSTEM EXPLANATION 32 .. 3 10. MAIN CIRCUIT EXPLANATION 39 .. 4 11. CHECK AND ADJUSTMENT ..9 PROCEDURE 43 12 12. REFERENCE DATA 49 13 13. TROUBLESHOOTING GUIDE 59 14 14. PARTS LIST 62 25

• NUMBER OF SOUND SOURCES: • EFFECTS: • NUMBER OF PROGRAMS: • BUILT-IN DISK DRIVE: • SUPPLIED ACCESSORIES: • DIMENSIONS: • WEIGHT: • OPTIONS: C~C 61 Keys, Velocity, After Touch Joystick (X Asix: OSC/VCF FC Bend, + Y Axis: OSC Modulation, - Y Axis: VCF Modulation), Program Up Jack, Sustain Damper Jack 8 Voices, 16 Oscillators, (2 Oscillators per Voice), 8 VCF Modules, 8 VCA Modules Waveforms Obtained by Sampling, 128 Harmonic Synthesis, or "Drawing" can be edited, assigned to sections of the keyboard and looped. 12-bit quantization. Sampling Frequencies and Times: 16KHz, 16s, 24KHz, 11s, 32KHz, 8s, 48KHz, 5.5s (can be used together as one sound source), Number of Keyboard Split Points: Up to 16 Up to 16 in internal wave RAM, Up to 120 per Disk Digital Delay x2, Equalizer HIGH & LOW (All Programmable) 32 in memory, 128 on disk Takes 3.5-inch, Double Sided, Double Density (1MB unformatted) Floppy Disks, 770K PCM Data Storage Capacity per Disk Floppy Disks x4, AC Power Cord 1171 (W) x 436 (D) x 123 (H) mm 18.5kg PS-1 PEDAL SWITCH, PS-2 PEDAL SWITCH, TWC-030 TWIN CABLE (3m), DS-1 DAMPER SWITCH, KH-1000 DYNAMIC STEREO HEADPHONES, HC-DSS HARD CASE, MIDI CABLE (7m/10m/12m), MF-2DD MICRO FLOPPY DISKS, SOUND PROGRAM LIBRARY Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

□DTRANSMITTED DATA 1-1 CHANNEL MESSAGES • nnnn = channel numbers 0 to 15 • Okkk kkkk: note number If key transpose is used, then the transmitted note number is the transpos ed value (regular note range of 36 to 96 minus up to 6 or plus up to 5. • Oppp pppp: program number Program numbers are represented on the display by system programs ac cording to this chart. Display Progran number SYSAP0I— 0 SYSA P02 — I SYSAP3I— 30 SYSAP32 — 31 Display Program number SYSB POI— 32 SYSB P02- 33 SYSBP3I— 62 SYSB P32 - 63 Display Program number SYSC P0I — SYSC P02 — SYSC P3I - 94 SYSCP32 — 95 Display Program number SYSD P0l- SYSD P02— SYSDP3I — 126 SYSDP32 — 127 1-2 SYSTEM EXCLUSIVE MESSAGES (1 (DEVICE ID (2DSS-1 SYSTEM EXCLUSIVE MESSAGES NOTE!FUNCTION ID 42H(Mode Data) 45H(Multi Sound List) 44H(Multi Sound Parameter Dump) 43H(PCM Data Dump) 46H (Program Name List) 40H (Program Parameter Dump) 23H(Data Load Completed) 24H(Data Load Error) 21H (Write Completed) 22H (Write Error) [URECOGNIZED RECEIVE DATA 2-1 CHANNEL MESSAGES • Mode messages are received only on the specified channel even if OMNI is on. • Okkk kkkk = 0 to 127: note number • Oppp pppp = O to 127: program number The MIDI mode function 2 program change mode settings affect received pro gram numbers as shown in this chart. 2-3 SYSTEM EXCLUSIVE MESSAGES (DDEVICE ID REQUEST Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

13H (Ray Mode Request) 16H (Mufti Sound List Request) 45H(Mutti Sound List) 15H( Mutt. Sound Parameter Request) 44H(Mutti Sound Parameter Dump) I4H(PCM Data Request) 43H(PCM Data Dump) 17H (Program Name List Request) I OH (Program Parameter Request) 40H (Program Parameter Dump) 4IH(Program Parameter Change)- IIH(Wrrte Request) [3]DSS-1 SYSTEM EXCLUSIVE FORMAT 1. MODE REQUEST (FUNCTION 10 = 12. RECEIVE ONLY) 6. MULTISOUND PARAMETER REQUEST (FUNCTION 10 = 15, RECEIVE ONLY) 7. MULTISOUNO PARAMETER OUMP (FUNCTION 10 = 44, SAME FOR TRANSMIT AND RECEIVE) NOTE KMODE DATA 00 (PLAY MODE) 01 (SAMPLE MODE^ 02(EDIT SAMPLE MODE) 03 (CREATE WAVE FORM MODE) 04(MULTI SOUND MODE) 05 (MIDI MODE) 06 (SYSTEM MODE) 07 (DISK UTILITY MODE) 08 (PROGRAM PARAMETER MODE) 3. PLAY MODE REQUEST (FUNCTION ID = 13, RECEIVE ONLY) NOTE 1: MAX INTERVAL Sets maximum value obtained with following formula. (The lower 7 bits of the twos complement.) (Top key) - (Org key) •«- f - 12 (16kHz) I - 7 (24kHz) 0 (32kHz) 5 (48kHz) NOTE 2: SOUND PARAMETER 4. MULTISOUNO UST REQUEST (FUNCTION ID = 16, RECEIVE ONLY) 8. PCM DATA REQUEST (FUNCTION ID = 14, RECEIVE ONLY) 9. PCM DATA DUMP (FUNCTION ID = 43, SAME FOR TRANSMIT AND RECEIVE) NOTE i: MULTI SOUND DATA FORMAT dd- ee- •dd (8 bytes) (6 bytes) DESCRIPTION Mutti Sound Name Multi Sound Length (seeg-W)) Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

11. PROGRAM NAME UST (FUNCTION ID = 46, TRANSMIT ONLY) 12. PROGRAM PARAMETER REQUEST (FUNCTION ID = 10, RECEIVE ONLY) 13. PROGRAM PARAMETER DUMP (FUNCTION ID = 40, TRANSMIT, RECEIVE) • Program Name not sent. 14. PROGRAM PARAMETER CHANGE (FUNCTION ID = 41, RECEIVE ONLY) • 2 bytes for params 46, 52. 15. WRITE REQUEST (FUNCTION ID = 11, RECEIVE ONLY) 16. WRITE COMPLETED (FUNCTION ID = 21, SEND ONLY) 17. WRITE ERROR (FUNCTION ID = 22, SEND ONLY) 18. DATA LOAD COMPLETED (FUNCTION ID = 23, SEND ONLY) 19. DATA LOAD ERROR (FUNCTION ID = 24, SEND ONLY) [4]DATA FORMAT REFERENCE (DADDRESS. LENGTH DATA FORMAT(6 Bytes) I st Byte 2nd 3rd 4th 5th 6th bO = LSB bl8=MSB 0 -261885 (address) J -261886 (length) - : Not Used (2)PCM DATA FORMAT (2 Bytes) I st Byte 2nd Byte b0 = LSB bll=MSB 0 (- max) - 2048 (0) - 4095 (+ max) - • Not Used (3)CHECK SUM (I Byte) Lower 7 bits of sum of data after function ID to before check sum. (4)NAME FORMAT (8 bytes) 1st byte = 1st character; 8th byte = 8th character. All characters must be 7-bit ASCII in the range of 20H to 7FH, excluding 22H, 2AH, and 3FH. (5)PCM DATA MEMORY MAP Absolute Address = 0 26>SS5 Multi Sound Multi Sound | Multi Sound ! Multi Sound I | Length j Length [ r v i n=Numb€' of Mu& Sounds Sound I I I Sound 2 I Loop | l« Length 1 Sound Length | Sound Word Length m=Numbe' of Sound Start Address I . Loop Start Address _ | • The multisound parameter SOUND START address and LOOP START ad dress values are different from those displayed by the DSS-1. They are rather the relative address values from the starting address. • Absolute addresses are used in the PCM data dump. Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

Offset: Byte offset within program parameter dump. Numbers within parentheses are parameter numbers used when editing within the DSS-1. 2. Must be set for both oscillators so that OSC1 + OSC2 = 100. 3. DDL TIME Format LOW HIGH 4. The MAX BEND RANGE value is limited to the range of 0 to 12, derived by subtracting from 12 the larger MAX INTERVAL value of the multisounds assigned to OSC1 and OSC2. This must be reset if there is a change in the multisound MAX INTERVAL. Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

CN-32A CN-33A QDL-ISW Qt CN21R CN34A CN3SA OOLISIG DDL11SIG 0CN-128 CPU I CNTRL KLM-780 CPU! KLM782TG CN, 1 CN, 2 CN, 3 CN, 4 CN, 5 CN, 6 CN, 7 CN, 8 CN, 9 CN, 10 CN, 11 KLM-1036 KLM-1036 KLM-1036 KLM-786 KLM-780 KLM-780 KLM-780 KLM-781 KLM-780 KLM-780 KLM-780 POWER SW AC SOCKET P.T KLM-780 LCD BOARD KLM-785 KLM-785 KLM-780 FDD KLM-782 KLM-782 CN, 12 CN, 13 CN, 14 CN, 15 CN, 16 CN, 17 CN, 18 CN, 19 CN, 20 CN, 21 CN, 22 KLM-782 KLM-780 KLM-786 KLM-788 KLM-781 KLM-783 KLM-783 KLM-783 KLM-783 KLM-783 KLM-786 KLM-780 KLMt782 KLM-782 KLM-782 KLM-782 KLM-0161 KLM-1061 KLM-786 KLM-783 KLM-784 KLM-781 CN, 23 CN, 24 CN, 25 CN, 26 CN, 27 CN.28 CN, 29 CN, 30 CN, 31 CN, 32 CN, 33 KLM-781 KLM-781 KLM-781 KLM-781 KLM-781 KLM-781 KLM-781 KLM-781 KLM-781 KLM-784 KLM-784 KBD (BLU) KBD (OR) KBD (BL) KLM-788 JOYSTIC KLM-784 KLM-1050 KLM-1049 KLM-1050 KLM-1050 KLM-1050 CN, 34 CN, 35 CN, 36 CN, 37 CN, 38 CN, 39 CN, 40 CN, 41 CN, 42 CN, 43 CN, 44 KLM-784 KLM-784 KLM-786 KLM-788 KLM-784 KLM-785 KLM-784 KLM-785 KLM-786 KLM-786 KLM-786 KLM-1050 KLM-1050 KLM-784 KLM-784 KLM-785 KLM-1012 KLM-1013 KLM-1012 FDD KLM-1014 KLM-1014 CN, 45 CN, 46 CN.47 CN, 48 CN, 49 CN, 50 CN, 51 CN, 52 CN, 53 KLM-1049 KLM-1013 KLM-782 KLM-782 KLM-782 KLM-782 KLM-1061 KLM-1061 KLM-1061 KBD LCD KLM-1016 KLM-1016 KLM-1016 KLM-1016 KLM-783 KLM-783 KLM-782 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

DATA ENTRY B L ■*- JOY STICK X CPU I 8085 CPU 2 63B03X AUOIO LINE CONTROL LINE Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

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1. CPU SYSTEM The DSS-1 digital sampling synthesizer has 8 voices (16 oscillators), all functions are controlled by software. A dual CPU system is employed. The division of labor between the CPU is as follows. • CPU 1 (8085A-2, KLM-780) • CPU 2 (63B03X, KLM-781) 1. LCD and LED indicators 1. KEY scan, KEY assign 2. Panel switch input processing 2. MIDI processing 3. FDD control 3. VCF/VCA control 4. Tone generator processing 4. DDL control 5. Interface with CPU 2 5. Foot switch input processing 6. Interface with CPU 1 The foliowings are examples of the division of labor in specific operations. ■ Sound data processing Sound data such as waveform data and VCFA data are all stored on a floppy disk (FD). CPU 1 supervises this storage operation. In addition, waveform data are transferred to a DRAM under the supervision of CPU 1. VCFA data are transferred to CPU 2. ■ KEY input processing CPU 2 does KEY scanning and KEY assigning. Whenever KEY goes ON or OFF, CPU 2 performs VCFA ON/OFF processing, and, at the same time, output to MIDI is performed. Data are also transferred to CPU 1, and CPU 1 performs TG ON processing. ■ PITCH BEND, MASTER TUNE processing CPU 2 performs A/D conversion of CV from the bender and TUNE VR. If there is a change, the changed values are transferred to CPU 1, CPU 1 ac cesses TG and the musical interval is changed ac cordingly. I Panel switch input processing; LCD And LED in dications CPU 1 performs a switch scan and gives the necessary LCD and LED indications. I DATA ENTRY A, B potentiometer value inputs CPU 2 performs A/D conversion of CV and then changes values as necessary. The changed values are transferred to CPU 1 and then processed by CPU 1. If a cutoff is edited in PROGRAM/PARAMETER mode, when DATA ENTRY B is moved CPU 2 trans fers that value to CPU 1 and the processing is per formed by CPU 1. Then the value is transferred back to CPU 2, and CPU 2 changes the VCF CUTOFF CV. I Sampling The length of the sampling frequency is controlled by CPU 1. Sampling start trigger level data are then transferred to CPU 2, and CPU 2 controls the CV in accordance with those data. I Hand drawing After hand drawing is started, CPU 2 performs A/D conversion of DATA ENTRY A data every 16 ms. The resulting values are transferred to CPU 1. CPU 1 stores those values in the RAM. When 512 values have been transferred, the operation terminates. CPU 1 produces 8 waveforms (for 8 octaves) from those data and transfers them to the DRAM. I Sine synthesis CPU 1 performs the synthesis based on the sine table in the EPROM, produces 8 waveforms (for 8 octaves) and transfers them to the DRAM. 2. Explanation of custom LSI In the DSS-1, since it is necessary to transfer a large quantity of data at high speed, the DMA (DIRECT MEMORY ACCESS) system is adopted. In this system, data are transferred directly between I/O and memory without going through the CPU registers. The LSIs developed for this purpose are the custom GATE AR RAY ^PD65030G-043 (GA-I) and /*PD65040G-099 (GA- n). The GA-I receives DMA requests on 16 channels (maximum of 24 channels), encodes them and gener ates timing. The GA-E stores 8 channels worth of generates timing. The GA-n stores 8 channels worth of memory addresses, increments addresses in response to requests and outputs in accordance with the GA-I timing. In the DSS-1, two GA-IIs are needed for each GA-I to cover 16 channels. ■ Caution Both the GA-I and GA-n use 80-pin flat packages. Use caution in repair and replacement. 3. FDD (FLOPPY DISK DRIVE) A FDD (MD350) is used to READ/WRITE sound parameter data on an FD (3.5-inch FLOPPY DISK). The basic mechanical movement in the FDD is that when the DISK rotates the HEAD moves in the radial direction. It is made up of a great many mechanical parts. Special jigs developed by the manufacturer are needed for repair and adjustment, so repair by anyone other than the manufacturer is impossible. Consequently, complete units must be replaced. Judge whether an FDD is malfunctioning by swapping FDDs. 32 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

OOOOH 8000H AOOOH COOOH C400H C800H DOOOH D004H D008H DOOCH DO1OH DO14H D018H DO1CH EP-ROM 27256 (BANK 0) (KLM-780 IC19) EP-ROM 2764 (KLM-780 IC12) RAM 4364 (KLM-780 IC11) 8155-2 (KLM-780 IC17) 8255-2 (KLM-780 IC14) BANK SWITCH PORT HC74 (KLM-780 IC30) 82C53 (1) (KLM-782 IC1) 82C53 (2) (KLM-782 IC2) 82C53 (3) (KLM-782 IC3) 82C53 (4) (KLM-782 IC6) 82C53 (5) (KLM-782 IC7) 82C53 (6) (KLM-782 IC8) DMA RAM LOW BYTE WRITE PORT HC374 (KLM-782 IC23) DMA RAM HIGH BYTE WRITE PORT HC374 (KLM-782 IC23) EP-ROM 27256 (BANK 1) (KLM-780 IC18) BANK 0 AND BANK 1 OF 27256 IS SWITCHED EACH OTHER BY HC74 ADDRESSED AT C800H. D020H D040H D060H D080H DOAOH DOCOH DOEOH D400H D800H DCOOH EOOOH FFFFH ICPU1 PROGRAM ROM MAP 33 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

CPU-1 MEMORY MAP AND COMMON USE WORKING AREA ■RAM MEMORY MAP AD SELECT etc. ICPU2 ROM MAP 0000H OO1FH 0040H OOFFH 0100H 0200H 0300H 4000H 4008H 400FH 8000H 9FFFH C000H EFFFH INTERNAL REGISTER PORT INTERNAL RAM bit 0-3 DDL CONTROL bit 4-7 DACO-3 DAC4-11 CPU 1 I/O KBD1 HC138 IC6 KBD2 HC138 IC7 RAM 8K IC14 EPROM 16K IC15 C000H C100H C800H CDOOH D300H EOOOH E300H F000H F500H FFFF INITIAL KEY VCFA A/D DATA KEY VCFA EG MIDI CPU1 I/F DAC bit O~etc. 34 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

■OUTLINE OF DSS-1 INTERNAL INSPECTION MODE The inspection program given below is stored in the DSS-1 system ROM. When the power switch is switched from OFF to ON while pressing both the DATA ENTRY A section UP and DOWN keys (A T) simultaneously, the TEST MODE is activated. In this mode, the system runs in the following sequence, and inspection is carried out. Software: version indication and date indication FDD function test W^RAM test Panel switch confirmation It is convenient for one FD to be set aside to be used ex clusively for FDD tests. (Caution) For FDD tests, use one that has already been formatted. Also, when an FDD test is run, all of the data are erased. Note 2, MIDI MIDI is "90", "3C" and "40" note-on data signals. Every time the voice changes from 1 to 8, conversion to the following data is performed (the lower 4 digits of the status change). Notel After entering "SYSTEM MODE", everything is in normal status except for the following conditions: MASTER TUNE, PITCH BENDER, AUTO BEND, and PITCH MODULATION are ineffective. VOICE NO. data are output to MIDI-OUT. VOICE NO. is indicated on LCD in PLAY MODE. 35 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

***KORGDSS-1*** SAMPLING SYNTHESIZER NO *** TEST MODE** Ver. nn '86. xx. xx *** TEST MODE *** FDD TEST? (y/n) *** TEST MODE *** SAVE TEST DATA? (y/n) *** TEST MODE*** FDD TESTING FDD TEST RESULT FDD GOOD! FDD TEST? (y/n) YES NO When there is an Error, one of these ^ Messages will be shown. DRIVE NOT READY! FDD TEST? (y/n) UNFORMATED FDD TEST? (y/n) PROTECTED! (HARD) FDD TEST? (y/n) WRITE ERROR (n-nnH-n) FDD TEST? (y/n) READ ERROR (n-nnH-n) FDD TEST? (y/n) SEEK ERROR (n-nnH-n) FDD TEST? (y/n) NO YES *** TEST MODE *** WRAM CHECK ON 00 <^Write data: 000H to all RAMs^> fdatT are read correctly? *** TEST MODE*** WRAM CHECK OK 00 *** TEST MODE *** WRAM CHECK ON FF

1. Turn power ON (of course while simultaneously pressing section A data entry switches es e^) and select the DSS-1 internal inspection mode. Note: If this indication appears, you can assume that CPU 1 and the LCD are operating normally. 2. One to two seconds later an indication that the test mode has been entered appears. The internal ROM version No. and the creation data are indicated simultaneously. Note: If there are problems on the TG circuit board, the system does not proceed to the TEST MODE indica tion. 3. Use the cursor (Y/N) to select whether or not the floppy disk drive is to be inspected. If NO, proceed to step 12. 4. Cursor (Y/N) key judgment 5. Insert a previously formatted medium and ask the system whether it is all right to write in (save) test data for that medium. This is also selected by the cursor (Y/N). 6. Cursor (Y/N) key judgement 7. Save test data for the medium (while writing in). 9. Errors: "refer to S-1" 10. From the results of reading and writing the test data for the medium, an indication that the FDD is normal is given. Asks whether it is necessary to try one more time. 11. Cursor (Y/N) key judgment 12. Asks whether to perform a TG (KLM-782) WAVE RAM check. 13. Cursor (Y/N) key judgment 14. The data 0000 0000 0000B are written in to the 12-bit WAVE RAM on the TG circuit board 1 bit at a time; if the writing can be done until the last ad dress, the fact that they are 0000 0000 0000B is read in. 18. The data 1111 1111 1111B are written in to the 12-bit WAVE RAM on the TG circuit board 1 bit at a time; if the writing is completed to the last address, then the fact that they are 1111 1111 1111Bisread in. 21. Each write/read operation is performed, and the fact that the WAVE RAM is normal is indicated. 22. Check whether or not the "DEL/CANCEL" works. If it doesn't work when pressed (system does not proceed to the next step) then the switch is bad, 24. Similarly, check whether the "COMPARE" switch works. 26. The checks in the internal inspection mode shall be passed. 27. W^RAM error; refer to "S-2". 4 1 'S-1" FDD ERROR MESSAGES Note: (D-DDH-D) = (D-DDH-^)! - Physical sector number (1 to 5) -Cylinder address (00 to 4F) -Head number (0 or 1) 37 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

• The IC number is classified as low or high (W«RAM on TG circuit board) Assume that OOH (0000 0000 OOOOB) has been written in the W«RAM, and that one of the bits is no good. LOW Fig. 1 *** TEST MODE *** ERROR LOW 0000 0110 _____ / / I \ If the indication in Fig. 1 ap pears, then one of the low ICs, IC26 or IC27 (25 to 28 are all low) is no good. IC28 / IIC26 IC27 IC25 Fig. 2 *** TEST MODE *** ERROR High 0110 0100 Should the indication in Fig. 2 appear, then IC31, IC34 or IC35 (among ICs 29 to 36) is bad. IC29 IC30 IC31 IC32 IC33 IC34 IC35 IC36 ■EXPLANATION OF VOICE NO. INDICATIONS When the system is rising in TEST MODE, the VOICE number is indicated on the LCD in "PLAY MODE". Example: When the VOICE No. is "1" SYSAP01:TEST-1 VOICE No. 1 (Set MIDI PGM CHANGE MODE to "OFF" or "MODE 3".) If this is not done then the second digit of the LCD in dication will go off. The VOICE numbers are 1 to 8. Every time the first gate turns ON, the indication changes. • When this function is being used, make sure that system loading is not done by program change by the MIDI. 38 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

1. KLM-780 The CPU employs an 8085A-2 (IC21) 8-bit micro computer; the system clock is 10 MHz. The clock output is frequency divided by about 2 to give an output fre quency of about 5 MHz and input to the counter timer in put terminal of 8155 (IC17). A 1.14 kHz rectangular waveform is output from 8155 TIMER OUT (PIN 6), so that interrupt processing is performed for musical scale data sets for 8 voices, BEND processing, LFO period etc. (Processing is done 9 times per period.) The EPROM consists of two 32 KB ICs (IC18 and IC19) and one 8 KB IC (IC12). The CPU memory space is a maximum of 64 KB, so the HC74 (IC30) controls changeover between the two 32 KB EPROMs (IC18, IC19). Two 8 KB RAMs (IC11 and IC13) are used. These are used for program parameter storage and working, and for multisound parameter storage and working. An 8155 (IC17) and 8255 (IC14) are used for I/O. The functions of the ports are as follows. ■8155 PORTA0-A7 PORTB0-B7 PORT CO ~C2 PORTC3-C5 ■8255 PORTA0-A7 PORTB0-B3 PORTB4-B7 PORT CO LCD control data input/output port Panel LED control signal output LCD control address output FDC control signal output Panel switch DATA INPUT PORT Panel switch scan OUT PORT TG WAVEFORM RESOLUTION Input signal GAIN, ATT control data output LS139 (IC28) and LS138 (IC15) respectively have address decoder functions. IC28 uses the two high-order address bits A14 and A15, and selects the ROM and RAM chips. IC15 similarly uses the 3 bits A10 to A12, and outputs the chipselection YO to Y7 for other chips. The interface with TG (KLM-782) consists of IC8 (LS245), IC9 (LS367) and IC10 (LS367). IC25 (LS374) and IC26 (LS374) from a D TYPE FLIP- FLOP, configuring 2 complete input/output systems to the interface circuit with CPU 2 (KLM-781). In addition, IC32 (LS74) performs CPU interrupt control. Since the FDD cannot be connected directly to the CPU bus, an FDC (FLOPPY DRIVE CONTROLLER) is necessary. In the KLM-780 circuit diagram, IC6 (/*PD765A) corresponds to the FDC. Also, data read out from the disk include both CLOCK and DATA which must be separated. DATA SEPARATOR IC7 (SED9420C) is used for this pur pose. The principal functions are as follows. (The FDD control signal output by the FDC is defined as OUT.) 39 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

The CPU2 is 8 bit Microcomputer HD63B03X (IC11) and each port function is as follows. Additionally Program ROM (IC15) is 16K byte, Work RAM (IC14) is 8K byte. ■CPU2 PORT FUNCTION Port P20 CV, S/H Channel control Output Port Port P21 CV, S/H Channel control Output Port Port P22 CV, S/H Channel control Output Port Port P23 MIDI IN PortP24 MIDI OUT Port P25 CV, S/H INHIBIT 0 - 2 Output Port Port P26 CV, S/H INHIBIT 0 - 2 Output Port Port P27 CV, S/H INHIBIT 0 - 2 Output Port Port P54 PROGRAM UP (by FOOT SW) Input Port Port P55 DAMPER (by FOOT SW) Input Port Port P60 A/D Input Channel control Output Port P61 A/D Input Channel control Output Port P62 A/D Input Channel control Output Port P63 VCF MODE (24dB/OCT, 12dB/OCT switch) PortP64 SERIAL CONTROL CLOCK PortP65 SERIAL CONTROL DATA Port P66 EQ, DDL1 LEVEL STB Port P67 DDL2 INPUT SELECT By Keyboard Scan, lower address (A0 - A3) 4 bit is latched at IC9 (HC77), and is decoded at IC6, IC7 (HC138) and is output to Keyboard Matrix. IC6 is to out put address for the first contact, and IC7 is to output ad dress for the second contact. Keyboard data, such as Note Data, key Velocity Data are read to CPU2 after through Octal Buffer HC240 (IC5). CV for VCF/A (KLM-783) latches Data Bus DO - D7 at IC12 (4 bit) and IC13 (8 bit) to control 12 bit DAC BA9221 (IC16). Also, Reference voltage (15V) at DAC is generated at OP AMP 4558 (IC19). Analog voltage of Slide VRs on the panel goes through Multiplexer 4051 (IC 3) and is converted A/D by CPU2. IC4 is two-way Data Bus Buffer IC and constructs Interface Circuit with CPU 1. 3. KLM-782 KLM-782 is combined with the SAMPLE AND HOLD (S/H) circuit board KLM-1061 to form the DSS-1 TONE GENERATOR (TG) section. The block configuration is as shown in Fig. 1. IOUTUNE OF FUNCTIONS . Creation of DMA request clock in accordance with command from CPU 1. ICs 1,2, 3,6,7 and 8 are CMOS programmable inter val timers which have 3 independent 16-bit counters inside one chip. In combination with the custom gate array /^PD65011C-023 (GA-ffl) (IC4, 5) predivider, they form a 19-bit divider. The master clock is 32 MHz. TO to T17, which are produced from it, are rec tangular waveforms with approximately 50% duty cycles. The frequencies of TO to T15 vary from 64 Hz to 64 kHz depending on conditions and determine the musical intervals. T16 is the ADC system clock with a frequency of about 500 kHz. T17 is a clock with a frequency of about 31 kHz for refreshing DRAM. TO and T1 are the EOC of ADC respectively. In com bination with CPU WRITE (Y7), CPU READ (Y14) and the logic formed by IC59, IC60, IC61 and IC62, become DREQ0 and DREQ1 signals only when selected. Fig. 1 CPU-1 Adrs Bus Data Bus CN-10, 11 OREQ GEN GAIN ATTN H DMA TIMING CNTRL IC 11 ADDRESS CNTRL IC 12,13 WE RAS CAS IC25-36 256K DRAM Ac -A8 PCM DATA BUS Latch ft Resolution INPUT SIGNAL IC 64. 65. 66 IC 17. 18 21.22 h IC 37 38 J_L IC41.44, 47, 50 40. 42, 43, 45, 46, 48, 49. 51 S/H x 16 KLM-1061 S/H x 16 TO- To VCFi, A 40 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

(256 K bits x 12) The above clocks TO to T15 are input from the GA-I DMA request clock input terminals DREQO to DREQ15. A 16-channel DMA request received by GA-I is en coded by addresses used to specify 3 channels (CHO to CH2) and three GA-n chip select signals. Channels 0 to 7 are processed by CSL1 and chan nels 8 to 15 by CSL2. CSL3 uses the IC15 NAND as the ROW address for refreshing. GA-n processing is done by outputting an acknowledgment (ACK) cor responding to the DREQ channel on GA-I timing, specifying the address in memory by address infor mation, and incrementing the address (DMA AD DRESS CONTROL). 3. Transfer of PCM DATA read out by the DMA from the DRAM to CPU 1 PCM data are latched from CPU 1 to the DRAM by the respective interface circuits listed below, then connected to the data bus. To the DAC, among the 12 bits from SDO to SD11 the low-order 6 bits from SDO to SD5 pass through the logic HC 08 (IC17 and IC18) for resolution to be latched, then are connected to the 12-bit DAC BA9221 (IC37). D/A resolution is for the purpose of controlling the resolution of the reproduced sound and is controlled by CPU 1 (panel switch parameter 16). 4. SAMPLE AND HOLD (S/H) The DAC signal output type is converted from current type to voltage type by OP AMP 5534 (IC38). This output contains a mixture of 16 channels, so S/H is performed for each channel by the ACK signal pro duced by GA-n, the high-speed analogue switches (HC4066) of IC41, IC44, IC47 and IC50, and the OP AMP. Connectors CN49 and CN50 can observe wave forms; S/H is performed again by KLM-1061 and noise is removed (the CLOCKs are T2 to T15 and DR1). 5. Audio input signal control The signal that is input for sampling from connector CN15 enters the filter circuit (panel control by CPU 1) with the GAIN and ATT determined by IC64. This filter circuit is an LPF formed by operational amplifiers IC67 and IC68; the frequency is 20 kHz. IC67 and IC70 form an absolute value circuit the out put of which is read into CPU 2 as an LCD level meter. IC58 and IC63 produce a trigger which starts sampl ing. The transition from "H" to "L" is observed at the start of sampling by connector CN12A-9. While the level is "H", GA-I Do to D6 DATA are not read into GA—I (GH). IC54, IC55, IC56 and IC57 form SAR (Successive Ap proximation Registers). 4. KLM-783 This circuit board consists of the DSS-1 VCF and VCA sections, and equalizer and noise generator sections. Its outline is as follows. The VCF/VCA circuit employs 8 custom IC NJM2069BDS (IC101 to IC801) and operates upon receiving control voltage (CV) from CPU 2 (KLM-781). ICM5201 (IC102 to IC802) selects the VCF output format with software, selects 12 dB/OCT or 24 dB/OCT and in puts VCF output to the 2069 VCA INPUT terminal. Voice processing of the MULTIPLEX CVs from CPU 2 is performed by the following respective exclusive multi plexers: VCF: IC9 (4051) output voltage ±5V; IC5 and IC6 (M5224) form the S/H. VCA: IC8 (4051) output voltage 0 to 10V; IC3 and IC4 (M5224) form the S/H. ■NOISE, RESONANCE OSC MIX RATIO and so on for the other CVs: IC7 (4051) output voltage 0 to 10V; IC1 and IC2 (M5224) form the S/H. The VCA output for each voice is mixed by a mixer cir cuit (IC15), enters the equalizer TC9156P (IC16) con trolled by CPU 2; then equalizing processing is per formed and the result is output from OP AMP 4558 (IC14). The noise generator is formed by transistor 2SC2785 selected and OP AMP 4558 (IC12). The noise VCA cor responds to transistors Q1 and Q2, and operational amplifier 4558 (IC13). 5. KLM-786 This circuit board, which forms the power supply circuit, consists of the following. 1. Regulators 7805 (IC1) and 7905 (IC2) this is a ± 5V power supply used principally for VCFA and DDL. 2. Regulators 7812 (IC3) and 7912 (IC4) this is a ±12V power supply used mainly for the operational amplifiers. 3. Regulators 7812 (IC5) this is a + 12V power supply used for the FDD motor. 4. Power transistor 2SB533 (Q1) this is a + 5V 2.5A power supply used for the digital system. 41 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

,.w Frequency I / Counter Oscilloscope TP-AG O O TP-CLK VR3 (CLOCK ADJ) TP-EXP (g)VR1 (FEEDBACK ADJ) ®VR2 (CENTER ADJ) DIGITAL DELAY BOARD KLM-1050 POWER SUPPLY BOARD KLM-786 CPU DAC ADJ KLM-781 VCF fc LEVEL ADJ 0SC1 LEVEL ADJ VCF RESONANCE ADJ NOISE LEVEL ADJ IC59 IC60 IC61 IC62 IC63 DDDD Oscilloscope \ TP3 TP4 (GND) KLM-782 VCF fo LEVEL ADJ VOICE1 VR101 VR102 VR103 GNP OSC2 LEVEL ADJ IC 15 (7 pin) VOICE8 VOICE7 V0ICE6 VOICE5 V0ICE4 VOICE3 ®®® ®0® ®0® ®®O ®®® ®® VR801 802 803 VR701 702 703 VR601 602 603 VR501502 503 401 402 403 301 302 0® 0® ®® ®® 0® ®®® 804 805 704 705 604 605 504 505 404 405 304 305 303 - Oscilloscope VCF-A BOARD KLM-787 KLM-1049 42 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

■CAUTION 1. This product has been throughly adjusted at the fac tory before shipment. Therefore never turn any Semi- Fixed VRs other than those required for repair. When adjust Semi Fixed VRs, please refer to Semi-Fixed VR Location Diagram. 2. After turning on Power, wait at least 15 minutes before beginning test and adjustment. Necessary equipments for the procedure are as follows. © Oscilloscope ® Digital Volt Meter (DVM) (3) Fre quency Counter ® Noise Meter • Power Supply Voltage Check and Adjustment (KLM-786) 1. Connect a Digital Voltmeter (DVM) to Connector CN4 1 pin (red wire) of KLM-786. (GND to GND on the board) 2. Confirm if the DVM value is within +5V ±0.2V 3. Adjust VR1 if necessary. Note: As other Power Supplies ±5V, ± 12V are produced by three terminal regulators, adjustment is not necessary. Deviation of the regulator is less than 20%. • DAC Power Supply Check and Adjustment (KLM-781) 1. Connect a DVM to IC18 1 pin of CPU2 board KLM-781. (GND to GND of the board) 2. Confirm if the DVM value is within + 5V±0.2V. 3. Adjust VR1 if necessary. • TG Board A/D Check and Adjustment (KLM-782) 1. Connect an oscilloscope (DC, 2V/div, 5/xsec/div) to TP3. (GND to TP4) Note: Probe is 10 : 1. 2. Press Sample Key. LED is lit and Display shows as Fig. 1. Fig. 1 SAMPLE MODE *•* SELECT S.Frq = 32KHZ 3. Press Enter Key Fig. 2 SELECT TOTAL TIME 4.0 or 8.0 (sec) 4. Press Enter Key Fig. 3 F1 SMPL-NO. MEN DIV 01 01 5. Press No. 2 Key Fig. 4 ATTN=00dB GAIN-OOdB 6. Confirm waveform of Fig. 5. 7. Adjust VR 1 if necessary. Fig. 5 Fig. 6 Fig. 7 GOOD Not synchronized with trig ger of the oscilloscope. NO GOOD Synchronized with trigger of the oscilloscope. Pulsewave- form from "H" to "L" is observed. NO GOOD Synchronized with trigger of the oscilloscope. Pulsewave- form from ML" to "H" is observed. Note: Though it may be difficult, you can get it by ad justing TIME/div value of the oscilloscope within 20sec. ~ 2/tsec. 43 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

For testing DSS-1, load test data from this disk at first and make it according to following procdure. When data is loaded, display shows as Fig. 8. Fig. 8 F1 SYS: A Completed Select (1-9): I PROCEDURE! 1. Press System Sw. (LED becomes lit) to call test pro gram. Display shows as Fig. 9. Fig. 9 SYSAP01: VCA1-R1 VOICE No.1 Now it is in OSC 1 Level Check Mode • OSC 1 Level Check and Adjustment (KLM-783) 1. Connect an oscilloscope (DC, 0.1 V/div., 0.5mS/div) to TP2 (IC15 7 pin). (GND to TP1) Note: While checking KLM-783, connect an oscilloscope as above unless specified. Fig. 10 0.5Vp-p 3. Adjust VR101 if necessary. 4. Repeat above 2), 3) to check Voice 2 — Voice 8 and adjust VR201 — VR801 if necessary. 5. Among the 8 voices, difference of Max. and Min. value must be less than 40mVp-p. 2. Play C4 key to confirm waveform of Fig. 10. ■ PROCEDURE 2. Press up key (A) of Data Entry to advance program number. Display shows as Fig. 11. Fig. 11 SYSA P02: VCA2-R5 VOICE No.1 Now it is in OSC 2 Level Check Mode • OSC 2 Level Check and Adjustment (KLM-783) 1. Play C4 key to confirm waveform of Fig. 12 (Fig. 10) 2. Adjust VR105 if necessary. 3. Repeat above 1, 2 to check Voice 2 — Voice 8 and adjust VR205 — VR805 if necessary. 4. Among the 8 voices, difference between Max. and Min. value must be less than 40mVp-p. 44 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

number. Display shows as Fig. 13. Fig. 13 SYSA P03: VCF0-R3 VOICE No.1 Now it is in VCF fo Check Mode. • VCF fo level check and Adjustment (KLM-783) 1. Play C4 key and confirm waveform of Fig. 14 (Voice 1) Fig. 14 0.4 - 0.45V! \ Note: The point of the widest amplitude of the waveform is for adjustment. However as the point of each voice is not completely same, select one point of a voice as a standard adjusting point and adjust other 7 voices with it. 4. Among the 8 voices, difference between Max. and Min. value must be less than 40mVp-p. 5. Play C6 key to confirm if level is as Fig. 14 (Voice 1). (Frequency is about 4 times as much) 6. Adjust VR102 if necessary. 7. Repeat above 5, 6 to check Voice 2 — Voice 8 and adjust VR202 — VR802 if necessary. 8. Among the 8 voices, difference between Max. and Min. value must be less than 40mVp-p. 2. Adjust VR103 if necessary. 3. Repeat above 1, 2 to check Voice 2 — Voice 8 and adjust VR203 - VR803 if necessary. IPROCEDURE 4 Press Up Key (A) of Data Entry to advance Program Number. Display shows as Fig. 15. Fig. 15 SYSA P04: RES0-R4 VOICE No.1 Now It is In Resonance Check Mode. • Resonance Check and Adjustment (KLM-783) 1. Play C4 key to confirm waveform as Fig. 16 (Voice 1) Fig. 16 DC, 0.1V/div, 1mS/div 2. Confirm if the value of the envelope of resonance oscillation waveform is 2mS. Adjust VR104 if necessary. 3. Repeat above 1, 2 to check Voice 2 — Voice 8. Ad just VR204 — VR804 if necessary. 4. Also confirm if there is no irregular oscillation in each voice. 2mS 45 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

Number. Display shows as Fig. 17. Fig. 17 SYSA P05: NOISE VOICE No.1 Now it is in Noise Level Check Mode. • Noise Level Check and Adjustment (KLM-783) 1. Connect a Noise Meter (1HF-A, -10dBm) to TP1. (GND to TP2) Fig. 18 2. Play any single key to confirm if the meter value is -15dBm. 3. Adjust VR1 if necessary. IPROCEDURE6 Press Up Key (▲) of Data Entry to advance Program Number. Display shows as Fig. 19. Fig. 19 SYSA P06: Offset VOICE No.1 Now it is in DC Offset Check • DC Offset Check (KLM-783) 1. Setting of the oscilloscope is DC, 5mV/div, 10mS/div. 2. Play C2, D2, E2, F2, G2, A2, B2, C3 in order, and confirm waveform of Fig. 20. Fig. 20 20mVp-p KEY-ON KEY-OFF Alteration of the signal at Key ON/OFF must be less than 20mV. (With new version, Semi-Fixed VRs for ad justing each voice will be added. VR106 ~ VR806) IPROCEDURE 7 Press Up Key (A) of Data Entry to advance Program Number. Display shows as Fig. 21 Fig. 21 SYSA P07: CENTER-1 VOICE No. 1 Now it is in DDL-1 Check Mode Note: There are two KLM-1050s for DDLs. Placed in the left side of the panel is for DDL-1 and right side is for DDL-2. • DDL-1 Clock Check and Adjustment (KLM-1050) 1. Connect a Frequency Counter to TP-CLK of KLM-1050 fixed in the left side of the panel. (GND to TP-AG). 2. Confirm if the value is 20.0kHz. 46 3. Adjust VR3 if necessary. 4. Connect an oscilloscope (DC, 0.2V/div, 5mS/div) to TP-EXP. (GND to TP-AG). 5. Play C4 key to confirm waveform of Fig. 22. 6. Adjust VR2 if necessary. Fig. 22 Note: Adjust lit line of the oscilloscope to the center and then play C4 key to confirm center of amplitude of the waveform is on the lit line. Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

shows as Fig. 23. Fig. 23 SYSA P08: DDL1-Sho VOICE No.1 Now it is in DDL-1 Short Delay Feedback Check Mode. • DDL-1 Short Delay Feedback Check and Adjust ment 1. Connect an oscilloscope (DC, 0.2V/div, 50mS/div) to TP-EXP. (GND to AG). 2. Play C4 key to confirm if the decay time of waveform is less than 250ms ±50ms as Fig. 24. Fig. 24 250ms ±50ms 3. Adjust VR1 if necessary. IPROCEDURE 9 Press Up key (▲) of Data Entry to advance Program Number. Display shows as Fig. 25. Fig. 25 SYSA P09: CENTER-2 VOICE No.1 Not it is in DDL-2 Check Mode. Note: Refer to Procedure 7 as everything is quite same except DDL-2 board (KLM-1050) being in the right side of the panel. IPROCEDURE 10 Press Up key (A) of Data Entry to advance Program Number. Display shows as Fig. 26. DDL-2 Short Delay Feedback Check Mode (KLM-1050) Fig. 26 SYSA P10: DDL2-Sho VOICE No.1 Now it is in DDL-2 Short Delay Feedback Check Mode. ■PROCEDURE 11 Note: Refer to Procedure 8 as everything is quite same. Press Up key (A) of Data Entry to advance Program Number. Display shows as Fig. 27. Fig. 27 SYSAP11:DDL1-Lon VOICE No.1 Now it is in DDL-1 Long Delay Check Mode. • DDL-1 Long Delay Check Mode (KLM-1050) 1. Play C5 key to confirm delay sound of line-out "L" starts to decay after about 2 sec. without oscillation. 47 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

Number. Display shows as Fig. 28. Fig. 28 SYSA P12: DDL2-Lon VOICE No.1 Now it is in DDL-2 Long Delay Check Mode. • DDL-2 Long Delay Check Mode (KLM-1050) 1. As Procedure 11, play C4 key to confirm if delay sound of line-out "FT starts to decay after about 2 sec. (Sound check just by listening is enough.) IPROCEDURE 13 Press Up key (▲) of Data Entry to advance Program Number. Display shows as Fig. 29. Fig. 29 SYSA P13: DDL-MUT VOICE No.1 Now it is in Delay Time Mute Check Mode • Delay Time Mute Check Mode 1 Press Mode Sw. (Program/Parameter) and select Parameter No. 81 (Delay Time). 2 While pressing any single key, move Data Entry B Slider randamly. 3 Confirm if Delay Time is changed following the Slider's move, and if the mute is on the sound when the time is changed. 4 Repeat above 1 - 3 to check DDL-2 with Parameter Number 92. 48 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

REFERENCE DATA Here we are introducing newly adopted parts for DSS-1 mainly. However, please note, though they are same name, such as CPU8085, processing speed of the one for DSS-1 is much faster than the one for POLY-800 and not compati ble each other. If misused, malfunction will happen. For those parts in replacing and ordering, please refer to our parts list. They are listed separately with different code number. 1. PROGRAMMABLE FLOPPY DISK CONTROLLER ^PD-765A ■ PIN CONFIGURATION ■ BLOCK DIAGRAM RESETo RDo * WRg CSo DB5c DB6c DB7c DRQc DACKc TCc INDEX c INTc GNDc >Vcc(-5Vc) :> RW/SEEK > LCT/DIR -> FLTR/STEP > HOLD > READY > WPRT/2 SIDE > FLT/TRKO >PSO >PS1 > WDATA >uso >US1 >SIDE >MFM )WE >SYNC > RDATA ) WINDOW >WCLK DBO-7 DATA BUS BUFFER VV Vcc- GND- VV M W SERIAL INTERFACE CONTROLLER WCLK -WDATA -WE -PSO -PS1 -RDATA -WINDOW -SYNC vv DRIVE INTERFACE CONTROL LER - READY - WPRT/2 SIDE INDEX FLT/TRKO -USO -US1 -MFM -RW/SEEK -HOLD -SIDE -LCT/DIR -FLTR/STEP 49 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

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■ BLOCK DIAGRAM RDDATAI iiii oooo illj OSC1 OCS2 SYNC field detection circuit DO Digital one-shot circuit o S If Frequency divider circuit Phase comparator and charge pump Voltage control oscillaror (VCO) std; FM: I Offset voltage generator circuit 16MHz: 4MHz: Frequency divider circuit FEED BACK (WN or WIND) Switching timing detection circuit Input switching I—p DT si9nal | WN WIND Data output circuit ill Timer circuit -OCR PIN CONFIGURATION SED 9420C O— 10SC1 24 VM —O O— 2 0SC2 23TM0UT —O O— 3CLK1 22 TRIG IN —O O— 4 TEST 2 21 CLK2 —O O— 5NC 20 CR —O O— 6 SYNC 19WCLK —O O— 7RDDATA 18 TEST 1 —O O— 8 WINDOW 17 LPF2 —O O— 9 DATA 16LPF1 —O O— 10MFM/FM 15 OFFSET —Q- O— 11 MIN/STD 14 CONTROL —O O— 12 VW1 13 V^ _O 51 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

■ PIN CONFIGURATION O A M5M4256L ITC 9154 AP PIN CONFIGURATION g I 5 I S I g >Q i i 2 o A6 CAS A8 W At A7 A4 v n e nemo n 12 ni4 1U 3 |J 5 |J 7 L| 9 IJ 11 U13IJ151 Q V« D RAS A2 Vec A5 A, (BOTTOM VIEW) TC 9154 AP BLOCK DIAGRAM 53 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

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■PERFORMANCE SPECIFICATIONS Note 1) Only when optional accessory solenoid is installed. Note 2) Under chucked condition IFUNCTIONAL SPECIFICATIONS 57 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

500 nsec. (max) 1 sec. (max) -9 400 msec, (min) -h 500 nsec. (min) -«■ ILL 200 ±3 msec. 1-5 msec. -B- 1 /tsec. (min) - -|—- 12 fisec. (min) 3 msec, (min) 1.2 msec, (max) — IT . (min) (max) 25 msec, (min) 23 msec, (min) -25 msec, (min) —25 msec, (min)- -100/isec. (min)— 4-—8usec. (max) -W— (Note 3) 23 msec, (min) - (Only for MD350/352) -120/iSec. (min) DISK CHANGE TIMING (Option) (CASSETTE) DISK CHANGE DISK CHANGE RESET IN OUT IN ■»■ u 12 /tsec. (min) 1200 nsec. (min) ¥ 1.33 msec, (min) 1200 /tsec. (min) . (min) 58 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

TROUBLESHOOTING GUIDE In this chapter, a simple explanation is given of how to troubleshopt the DSS-1. Note: Checking of the WAVE RAM on the TG circuit board (KLM-782) and the floppy disk drive are explained in the description of the special test program (p.32). I Start the system up as follows. 1. Turn the power switch ON. The LCD indication is shown in Fig. 1. Fig. 1 • *• *** KORG DSS-1 SAMPLING SYNTHESIZER 2. Two to three seconds later, the LCD indication becomes as shown in Fig. 2. Fig. 2 *•• SYSTEM MODE SELECT (1-9): _ • •• 3. Insert an accessory floppy disk into the floppy disk drive. Turn No. 1 key On (GET SYSTEM). The LCD indication becomes as shown in Fig. 3 and the ENTER key LED flashes. Fig. 3 F1 GET SYSTEM: A Select & Press ENTER 4. When the ENTER key is turned ON, the ENTER key LED goes off and the indication becomes as shown in Fig. 4. Fig. 4 F1 GET SYSTEM: A Are you sure (Y/N) 5. Now if the YES key is turned ON, the floppy disk drive is accessed, and the indication becomes as shown in Fig. 5. Fig. 5 F1 Loading... Please Wait a Minute 6. When loading is completed, the indication becomes as shown in Fig. 6 and normal pronunciation is per formed, producing a sound indicating that all keys have been loaded. Fig. 6 F1 SYS: A Completed Select (1-9): _ IPROBLEM 1 The indication in Fig. 1 does not appear. (Note: It can also happen that the indication appears but the BACK lamp does not light up.) Does the LCD BACK LAMP light up blue? YES There is trouble in the power supply circuit (KLM-786) or control circuit (KLM-1013). Which unit is bad can be judged by successively replacing first KLM-780 (or part thereof) and then the LCD module by good units. If the trouble is in KLM-780, check the CPU, ROM RAM and I/O (8155). In the case of the LCD module, the entire module has to be replaced. There is trouble in CPU 1 (KLM-780) or the LCD | module. 59 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

The indication in Fig. 1 appears but fails to progress to the indication in Fig. 2. There is trouble in CPU 1 (KLM-780) or TG (KLM-782). Which one the trouble is in can be judged by replacing each circuit board in turn with a good one. If the trouble is in CPU 1, it is necessary to check the CPU, ROM, RAM and TG interface. If the trouble is in the TG, check according to the follow ing procedure. i 1 Remark: The steps up to here do not determine which part of a circuit board is bad. Replace KLM-782 (if neces sary return it to KORG). i • Check KLM-782 connector CN12-9 with an oscilloscope. Is CN12-9 at "H" level? YES NO L Is a 20 MHz clock input to PIN 1 ofGA-I (IC11)? YES Are connectors CN10 (data bus) and CN11 (address bus) inserted correctly? YES I Is the KLM-782 power sup ply normal? ±12V, ±5V It is possible that there is trouble in IC58, IC63, etc. is possible that there is trouble in the time base NO I module. Noi Insert connectors CN10 and CN11 correctly. NO^ There is trouble in the load circuit drawing power from power supply circuit KLM- 786 or KLM-782. IPROBLEM 3 The indication does not progress from Fig. 2 to Fig. 3 or Fig. 4 (switch input is not received). The trouble could be in the CPU 1 circuit board (KLM-780) or the panel switch circuit board. Check the switch scan circuit in IC14 (8255) on KLM-780 and the connected harnesses and connectors. IPROBLEM 4 GET is not performed normally, or while GET is in pro gress an error message appears or the indication re mains stuck on Fig. 5. The trouble could be in the KLM-780 FDC or FDD. Perform the FDD test which is described separately. If there is trouble in the FDD, replace it with a good one. Check the KLM-780 FDC referring to p.46. 60 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

comes out at all. Check according to the following procedure; mainly check the TG circuit board. fCheck KLM-782 connectors^ CN49 and CN50 with an os cilloscope. Are normal waveforms observed? YES l f Check IC47 PIN 5 with an oscilloscope to see if the ACK signal is being entered ^correctly. YES I Have RAS, CAS and AD DRESS been input correctly into the DRAM? YEsI Is A/D conversion being per formed correctly? YES Is a WE signal being output to the DRAM during sampl ing? NO KLM-782 is probably OK. Check KLM-1061 and KLM- 783. Check GATE ARRAY IC12, IC13 and IC11. NO|^ Check IC11.IC12 and IC13. Check the IC37DAC and the IC38 operational amplifier. Nol Check IC11. Remarks: Keyboard scan assignment is being done by CPU 2 (KLM-781), so also check the KBD MATRIX circuit at the same time. The basic method of checking if no sound comes out in case of a special voice is the same as for PROBLEM 5. YES Is the CREATE WAVEFORM function OK? YES I During sampling, is a signal being input into IC57 pin 3? YES \ Tol it can be judged that there is trouble in the IC56 SAR. Check the LPF (IC64 to IC69). 61 Scan by Manual Manor http://www.markglinsky.com/ManualManor.html

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