Intersil HI5905EVAL2 Operation & User’s Manual

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Brand: Intersil
Category: Motherboard
Model: HI5905EVAL2 (Operation & User’s Manual), prWNHsthZYA.c
File Type: PDF
File Size: —
Pages: 16 pages

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HI5905EVAL2 Evaluation Board User’s Manual

Description The HI5905EVAL2 evaluation board allows the circuit designer to evaluate the performance of the Intersil HI5905 monolithic 14-bit, 5MSPS analog-to-digital converter (ADC). As shown in the Evaluation Board Functional Block Diagram, the evaluation board includes sample clock generation circ ...

Reference Generator, VROUT and VRIN

The HI5905 has an internal reference voltage generator, therefore no external reference voltage is required. The eval board, however, offers the ability to use the internal or an external reference. VROUT must be connected to VRIN when using the internal reference. Internal to the converter, two reference voltages of 1 ...

The analog and digital supplies are also kept separate on

the evaluation board and should be driven by clean linear regulated supplies. The external power supplies are hooked up with the twisted pair wires soldered to the plated through holes marked +5VAIN, +5VAIN1, -5VAIN, +5VDIN, +5VD1IN, +5VD2IN, -5VDIN, AGND and DGND near the analog prototyping area. ...

The sample clock and digital output data signals are made

available through two connectors contained on the evaluation board. The line buffering provided by the data output latches allows for driving long leads or analyzer inputs. These data latches are not necessary for the digital output data if the load presented to the converter does not exceed the d ...

HI5905EVAL2 Typical Performance (Input Amplitude at -0.5dBFS)

FIGURE 5. EFFECTIVE NUMBER OF BITS (ENOB) vs INPUT FREQUENCY FIGURE 6. TOTAL HARMONIC DISTORTION (THD) vs INPUT FREQUENCY FIGURE 7. SINAD vs INPUT FREQUENCY FIGURE 8. SECOND HARMONIC DISTORTION (2HD) vs INPUT FREQUENCY FIGURE 9. SNR vs INPUT FREQUENCY FIGURE 10. THIRD HARMONIC DISTORTION (3HD) ...

Appendix A Board Layout

FIGURE 11. HI5905EVAL2 EVALUATION BOARD PARTS LAYOUT (NEAR SIDE) FIGURE 12. HI5905EVAL2 EVALUATION BOARD COMPONENT NEAR SIDE (LAYER 1) Application Note 9785 ...

FIGURE 13. HI5905EVAL2 EVALUATION BOARD GROUND PLANE LAYER (LAYER 2)

FIGURE 14. HI5905EVAL2 EVALUATION BOARD POWER PLANE LAYER (LAYER 3) Appendix A Board Layout (Continued) Application Note 9785 ...

FIGURE 15. HI5905EVAL2 EVALUATION BOARD COMPONENT FAR SIDE (LAYER 4)

FIGURE 16. HI5905EVAL2 EVALUATION BOARD PARTS LAYOUT (FAR SIDE) Appendix A Board Layout (Continued) Application Note 9785 ...

Appendix B Schematic Diagrams

VCC + CLK VIN+ VDC VIN- +5VA +5VD1 R4 C10 C9 C7 C6 VCC OE D7 D6 D5 D4 D3 D2 D1 D0 GND CP Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 ‘ALS574 1 2 3 4 5 6 7 8 9 10 11 12 13 14 17 18 19 20 15 16 VCC OE D7 D6 D5 D4 D3 D2 D1 D0 GND CP Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 ‘ALS574 1 2 3 4 5 6 7 8 9 10 11 12 13 14 17 18 19 20 15 16 JP1 U2 U3 R6 R5 D10 D9 D8 D7 ...

Appendix B Schematic Diagrams (Continued)

CLK IN -5VD 1 5 2 3 8 7 4 6 U4 V+ LE GND Q + - V- 1 5 2 3 8 7 4 6 V+ + - V- NC V+ V- VIN+ VDC VIN- -5VD +5VD +5VD U5 C20 R7 R18 R20 R8 R9 R11 R10 C21 C26 C25 C2 C4 C5 C37 R3 R12 R2 R14 R15 R13 C1 CLK CLK + 1 5 2 3 8 7 4 6 V+ + - V- NC V+ V- U6 C42 + R17 C43 C22 +5VA -5VA +5VA -5VA OPA628AU OPA628U MAX9686BCSA 0 ...

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