Dynamic Engineering PMC-4U-CACI Operation & User’s Manual

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Brand: Dynamic Engineering
Category: Network Card
Model: PMC-4U-CACI (Operation & User’s Manual), prbxmPPX8Depo
File Type: PDF
File Size: 0.3 Mb
Pages: 33 pages

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435 Park Dr., Ben Lomond, Calif. 95005

831-336-8891 Fax 831-336-3840 [email protected] www.dyneng.com Est. 1988 User Manual PMC-4U-CACI Quad UART - Dual Synchronous Serial Data Interface PMC Module Revision OR Corresponding Hardware: Revision 01 ...

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P a g e 2 PMC-4U Quad UART - Dual Synchronous Serial Data Interface PMC Module Dynamic Engineering 435 Park Drive Ben Lomond, CA 95005 831-336-8891 831-336-3840 FAX This document contains information of proprietary interest to Dynamic Engineering. It has been supplied in confidence and the recipie ...

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P a g e 3 Table of Contents PRODUCT DESCRIPTION 6 THEORY OF OPERATION 9 ADDRESS MAP 10 PROGRAMMING 12 REGISTER DEFINITIONS 13 PMC4U_BASE 13 PMC4U_STAT 16 PMC4U_MSK 16 PMC4U_SCC_IVEC 17 PMC4U_DIR_TERM 17 PMC4U_SW_IN 18 PMC4U_SCC_A_CNTL 19 PMC4U_SCC_A_DATA 19 PMC4U_SCC_B_CNTL 19 PMC4U_SCC_B_DATA 19 ...

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P a g e 4 Interfacing 28 CONSTRUCTION AND RELIABILITY 29 THERMAL CONSIDERATIONS 29 WARRANTY AND REPAIR 30 SERVICE POLICY 31 OUT OF WARRANTY REPAIRS 31 FOR SERVICE CONTACT: 31 SPECIFICATIONS 32 ORDER INFORMATION 33 SCHEMATICS 33 ...

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P a g e 5 List of Figures FIGURE 1 PMC-4U BLOCK DIAGRAM 6 FIGURE 2 PMC-4U INTERNAL ADDRESS MAP 10 FIGURE 3 PMC-4U UART ADDRESS MAP 11 FIGURE 4 PMC-4U BASE CONTROL REGISTER BIT MAP 13 FIGURE 5 PMC-4U TX CONTROL REGISTER BIT MAP 16 FIGURE 6 PMC-4U INTERRUPT MASK REGISTER BIT MAP 16 FIGURE 7 PMC-4U D ...

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P a g e 6 Product Description PMC-4U-CACI is part of the PMC Module family of modular I/O components by Dynamic Engineering. The PMC-4U is capable of providing multiple serial protocols both synchronous and asynchronous with a wide range of baud rates. The CACI interface uses an RS-423 driver, an ...

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P a g e 7 An EXAR XR16C854 implements the UART interface. This quad UART device is compatible with the industry standard 16550 UART, but is equipped with 128 byte FIFOs, independent Tx and Rx FIFO counters, automatic hardware/software flow control, and many other enhanced features. An 18.432 MHz ...

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P a g e 8 There is also a master interrupt enable that can be set to gate the interrupt onto the PCI bus. The interrupt status is still available in a status register even when the master interrupt enable is off. This facilitates polled operation of interrupt conditions. The individual interrup ...

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P a g e 9 Theory of Operation The PMC-4U is designed for transferring data from one point to another with a variety of serial protocols. The PMC-4U features a Xilinx FPGA. The FPGA contains the general control and status registers as well as the interface to the quad UART, SCC, and IO drivers and ...

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P a g e 10 Address Map REGISTER OFFSET FUNCTION TYPE PMC4U_BASE 0X00 base control read/write PMC4U_STAT 0X04 status read read PMC4U_MSK 0X08 interrupt mask control read/write PMC4U_SCC_IVEC 0X0C SCC interrupt vector read read PMC4U_DIR_TERM 0X10 direction and termination control read/write PMC4U_S ...

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