Texas Instruments TSW3003 Manual 

TSW3003 Demonstration Kit Contents 1 Demonstration Kit Configuration Options................................................................................. 3 2 Block Diagrams .............................................................................................................. 4 3 Key Texas ...

4 Input/Output Connections ................................................................................................. 12 5 Demo Kit Typical Specifications......................................................... ...

1.1 DAC Component 1.2 VComm Configuration 1.3 VCXO 1.4 LO Generation Demonstration Kit Configuration Options The TSW3003 Demonstration (Demo) Kit can be configured in different ways to evaluate different components in different frequency bands. This section outlines the various component configurations. Ba ...

DAC I/Q Modulator 90° 0° LPA TX Diplexer ANT RX LNA A/D I/Q Demod 2.2 Demo Kit Block Diagram 16 DAC5687 16 CLK1 TRF3703 I/Q Modulator RF Out TRF3750 VCXO TRF3761 PLL LO Generator Ref Osc CDCM7005 Clock Gen CLK2 Block Diagrams The basic radio system block diagram in Figure 1 demonstrates where the TSW3003 ...

3.1 CDCM7005 3.2 DAC5687 3.3 TRF3703 3.4 TRF3761 4 Software Installation 5 Software Operation Key Texas Instruments Components The CDCM7005 clock distribution chip is used to generate and synchronize the clock outputs to the system. The device has five outputs which can be either LVPECL or LVCMOS and can be divid ...

By using the provided CDCM7005 serial peripheral interface (SPI) software, the user can load settings to the CDCM7005 internal registers. This must be performed every time the TSW3003 Demo Kit is powered up, because the CDCM7005 has default settings that are loaded at power ...

The divider parameters, M and N, are determined according to the following equation based on the internal reference frequency and internal VCXO frequency. FREF = (FVCXO × M)/(N × P) The p parameter is the VCXO input divider and set through the FB_MUX value. The M and N counter values need to ...

frequency output. The main menu of the program is shown in Figure 5. Figure 5. TRF3761 GUI - Main Menu The options in the front panel allow the user to program the desired frequency of the VCO, the desired ...

5.4.1 Register Controls Software Operation sheet (SLWS181). The register of interest in this menu is the MUXOUT CONTROL which can be used to determine the function of LED D4. This mode defaults to Digital PLL Lock Detect and causes the LED D4 to light up when the PLL successfully locks. No ...

• FIR Bypass – Bypass all interpolation filters. QMC INCO functional. Limited to FDAC = 250 MHz • FIFO Bypass – When set to bypass, the internal four sample FIFO is disabled. When cleared, the FIFO is enabled. � ...